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Searched refs:RASP0_BANK0_REG_CTRL_BASE (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregNDSRASP.h416 #define RASP0_BANK0_REG_CTRL_BASE (0x23600) //0x11B<<9 //bank 0x111B macro
419 #define RASP0_BANK0_PIDFLT_BASE (RASP0_BANK0_REG_CTRL_BASE+0x80)
H A DhalNDSRASP.c321 _RASPReg[0] = (REG_RASP*)(_u32RegBase + RASP0_BANK0_REG_CTRL_BASE); in HAL_NDSRASP_SetBank()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregNDSRASP.h416 #define RASP0_BANK0_REG_CTRL_BASE (0x23600) //0x11B<<9 //bank 0x111B macro
419 #define RASP0_BANK0_PIDFLT_BASE (RASP0_BANK0_REG_CTRL_BASE+0x80)
H A DhalNDSRASP.c321 _RASPReg[0] = (REG_RASP*)(_u32RegBase + RASP0_BANK0_REG_CTRL_BASE); in HAL_NDSRASP_SetBank()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregNDSRASP.h416 #define RASP0_BANK0_REG_CTRL_BASE (0x23600) //0x11B<<9 //bank 0x111B macro
419 #define RASP0_BANK0_PIDFLT_BASE (RASP0_BANK0_REG_CTRL_BASE+0x80)
H A DhalNDSRASP.c321 _RASPReg[0] = (REG_RASP*)(_u32RegBase + RASP0_BANK0_REG_CTRL_BASE); in HAL_NDSRASP_SetBank()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/curry/nsk2/
H A DregNDSRASP.h416 #define RASP0_BANK0_REG_CTRL_BASE (0x23600) //0x11B<<9 //bank 0x111B macro
419 #define RASP0_BANK0_PIDFLT_BASE (RASP0_BANK0_REG_CTRL_BASE+0x80)
H A DhalNDSRASP.c321 _RASPReg[0] = (REG_RASP*)(_u32RegBase + RASP0_BANK0_REG_CTRL_BASE); in HAL_NDSRASP_SetBank()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregNDSRASP.h416 #define RASP0_BANK0_REG_CTRL_BASE (0x23600) //0x11B<<9 //bank 0x111B macro
419 #define RASP0_BANK0_PIDFLT_BASE (RASP0_BANK0_REG_CTRL_BASE+0x80)
H A DhalNDSRASP.c321 _RASPReg[0] = (REG_RASP*)(_u32RegBase + RASP0_BANK0_REG_CTRL_BASE); in HAL_NDSRASP_SetBank()