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Searched refs:R2_REG_SDR_LO_DATA_BASE (Results 1 – 25 of 32) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/cpu/hal/mooney/cpu/
H A DregCPU.h134 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE + 0x0086UL) macro
H A DhalCPU.c546 …HAL_COPRO_RegWrite2Byte(R2_REG_SDR_LO_DATA_BASE, (base_addr &0x0000FFFFUL)); //D Fetch Offset - L… in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/maldives/cpu/
H A DregCPU.h133 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE + 0x0086) macro
H A DhalCPU.c473 HAL_COPRO_RegWrite2Byte(R2_REG_SDR_LO_DATA_BASE, (base_addr&0x0000FFFF)); //D Fetch Offset - Low in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/mainz/cpu/
H A DregCPU.h134 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE + 0x0086UL) macro
H A DhalCPU.c544 …HAL_COPRO_RegWrite2Byte(R2_REG_SDR_LO_DATA_BASE, (base_addr &0x0000FFFFUL)); //D Fetch Offset - L… in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/messi/cpu/
H A DregCPU.h134 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE + 0x0086UL) macro
H A DhalCPU.c544 …HAL_COPRO_RegWrite2Byte(R2_REG_SDR_LO_DATA_BASE, (base_addr &0x0000FFFFUL)); //D Fetch Offset - L… in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/mustang/cpu/
H A DregCPU.h133 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE + 0x0086) macro
H A DhalCPU.c473 HAL_COPRO_RegWrite2Byte(R2_REG_SDR_LO_DATA_BASE, (base_addr&0x0000FFFF)); //D Fetch Offset - Low in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/k6lite/cpu/
H A DregCPU.h132 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
H A DhalCPU.c480 … HAL_COPRO_RegWrite2Byte(R2_REG_SDR_LO_DATA_BASE, (base_addr&0x0000FFFFUL)); //D Fetch Offset - Low in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/k7u/cpu/
H A DregCPU.h132 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
H A DhalCPU.c480 … HAL_COPRO_RegWrite2Byte(R2_REG_SDR_LO_DATA_BASE, (base_addr&0x0000FFFFUL)); //D Fetch Offset - Low in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/curry/cpu/
H A DregCPU.h132 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/k6/cpu/
H A DregCPU.h132 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
H A DhalCPU.c480 … HAL_COPRO_RegWrite2Byte(R2_REG_SDR_LO_DATA_BASE, (base_addr&0x0000FFFFUL)); //D Fetch Offset - Low in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/kano/cpu/
H A DregCPU.h132 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
H A DhalCPU.c480 … HAL_COPRO_RegWrite2Byte(R2_REG_SDR_LO_DATA_BASE, (base_addr&0x0000FFFFUL)); //D Fetch Offset - Low in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/manhattan/cpu/
H A DregCPU.h159 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/macan/cpu/
H A DregCPU.h159 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/maxim/cpu/
H A DregCPU.h169 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/maserati/cpu/
H A DregCPU.h171 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7621/cpu/
H A DregCPU.h169 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7821/cpu/
H A DregCPU.h170 #define R2_REG_SDR_LO_DATA_BASE (R2_REG_BASE+0x0086UL) macro

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