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Searched refs:R2_MAULV1_REG_BASE (Results 1 – 17 of 17) sorted by relevance

/utopia/UTPA2-700.0.x/modules/cpu/hal/mooney/cpu/
H A DregCPU.h111 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
147 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/maldives/cpu/
H A DregCPU.h112 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
144 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/mainz/cpu/
H A DregCPU.h111 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
147 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/messi/cpu/
H A DregCPU.h111 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
147 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/mustang/cpu/
H A DregCPU.h112 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
144 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/k6lite/cpu/
H A DregCPU.h112 #define R2_MAULV1_REG_BASE 0x003600UL //0x122B00 //sec_r2_maulv1 macro
144 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/k7u/cpu/
H A DregCPU.h112 #define R2_MAULV1_REG_BASE 0x003600UL //0x122B00 //sec_r2_maulv1 macro
144 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/curry/cpu/
H A DregCPU.h112 #define R2_MAULV1_REG_BASE 0x003600UL //0x122B00 //sec_r2_maulv1 macro
144 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/k6/cpu/
H A DregCPU.h112 #define R2_MAULV1_REG_BASE 0x003600UL //0x122B00 //sec_r2_maulv1 macro
144 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/kano/cpu/
H A DregCPU.h112 #define R2_MAULV1_REG_BASE 0x003600UL //0x122B00 //sec_r2_maulv1 macro
144 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/manhattan/cpu/
H A DregCPU.h117 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
171 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/macan/cpu/
H A DregCPU.h117 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
171 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/maxim/cpu/
H A DregCPU.h124 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
181 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/maserati/cpu/
H A DregCPU.h125 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
183 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
H A DhalCPU.c609 HAL_COPRO_RegWrite2Byte(R2_MAULV1_REG_BASE + 0x70UL, 0x0080UL); in HAL_COPRO_Enable()
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7621/cpu/
H A DregCPU.h124 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
181 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7821/cpu/
H A DregCPU.h125 #define R2_MAULV1_REG_BASE 0x022B00UL //0x122B00 //sec_r2_maulv1 macro
182 #define R2_MAULV1_REG (R2_MAULV1_REG_BASE + 0x0002UL) //0x122B00 //sec…