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Searched refs:PM_REG_BASE_SLEEP (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/cpu/hal/k6lite/cpu/
H A DregCPU.h122 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
157 #define PM_REG_CPUX_SW_RSTZ (PM_REG_BASE_SLEEP+0x0052UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/k7u/cpu/
H A DregCPU.h122 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
157 #define PM_REG_CPUX_SW_RSTZ (PM_REG_BASE_SLEEP+0x0052UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/curry/cpu/
H A DregCPU.h122 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
158 #define PM_REG_CPUX_SW_RSTZ (PM_REG_BASE_SLEEP+0x0052UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/k6/cpu/
H A DregCPU.h122 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
157 #define PM_REG_CPUX_SW_RSTZ (PM_REG_BASE_SLEEP+0x0052UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/kano/cpu/
H A DregCPU.h122 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
157 #define PM_REG_CPUX_SW_RSTZ (PM_REG_BASE_SLEEP+0x0052UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/mooney/cpu/
H A DregCPU.h124 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/maldives/cpu/
H A DregCPU.h123 #define PM_REG_BASE_SLEEP 0x000E00 //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/mainz/cpu/
H A DregCPU.h124 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/messi/cpu/
H A DregCPU.h124 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/mustang/cpu/
H A DregCPU.h123 #define PM_REG_BASE_SLEEP 0x000E00 //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/manhattan/cpu/
H A DregCPU.h127 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/macan/cpu/
H A DregCPU.h127 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/maxim/cpu/
H A DregCPU.h135 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/maserati/cpu/
H A DregCPU.h137 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7621/cpu/
H A DregCPU.h135 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7821/cpu/
H A DregCPU.h136 #define PM_REG_BASE_SLEEP 0x000E00UL //0x002E00 //pm_sleep macro