Searched refs:OSAL_HVD_ISR_Enable (Results 1 – 17 of 17) sorted by relevance
122 MS_BOOL OSAL_HVD_ISR_Enable(void);
128 #define OSAL_HVD_ISR_Enable() //enable_irq(HVD_ISR_VECTOR) macro
138 inline MS_BOOL OSAL_HVD_ISR_Enable(void) in OSAL_HVD_ISR_Enable() function
1053 OSAL_HVD_ISR_Enable(); in _DRV_HVD_ISRHandler()1080 OSAL_HVD_ISR_Enable(); in _DRV_HVD_ISRHandler()2705 OSAL_HVD_ISR_Enable(); in MDrv_HVD_SetISREvent()2727 OSAL_HVD_ISR_Enable(); in MDrv_HVD_SetISREvent()
1061 OSAL_HVD_ISR_Enable(); in _DRV_HVD_Sub_ISRHandler()2596 OSAL_HVD_ISR_Enable(); in MDrv_HVD_Sub_SetISREvent()2618 OSAL_HVD_ISR_Enable(); in MDrv_HVD_Sub_SetISREvent()
122 MS_BOOL OSAL_HVD_ISR_Enable(MS_BOOL isHVDIsr);
149 inline MS_BOOL OSAL_HVD_ISR_Enable(MS_BOOL isHVDIsr) in OSAL_HVD_ISR_Enable() function
1305 if(TRUE == OSAL_HVD_ISR_Enable())//enable cpu interrupt mask in _HVD_EX_ISRHandler()1375 …if(TRUE == OSAL_HVD_ISR_Enable(pHVDDrvContext->gHVDCtrl_EX[hvd_index].HVDISRCtrl.bIsHvdIsr))//enab… in _HVD_EX_ISRHandler()1388 …if(TRUE == OSAL_HVD_ISR_Enable(pHVDDrvContext->gHVDCtrl_EX[evd_index].HVDISRCtrl.bIsHvdIsr))//enab… in _HVD_EX_ISRHandler()3974 if (OSAL_HVD_ISR_Enable(pCtrl->HVDISRCtrl.bIsHvdIsr) != TRUE) in MDrv_HVD_EX_SetISREvent()4009 OSAL_HVD_ISR_Enable(); in MDrv_HVD_EX_SetISREvent()
122 MS_BOOL OSAL_HVD_ISR_Enable(MS_U32 u32ISRType);
164 inline MS_BOOL OSAL_HVD_ISR_Enable(MS_U32 u32ISRType) in OSAL_HVD_ISR_Enable() function
1423 if(TRUE == OSAL_HVD_ISR_Enable())//enable cpu interrupt mask in _HVD_EX_ISRHandler()1475 OSAL_HVD_ISR_Enable(E_HWDEC_ISR_HVD); in _HVD_EX_ISRHandler()1523 OSAL_HVD_ISR_Enable(E_HWDEC_ISR_EVD); in _EVD_EX_ISRHandler()4721 if (OSAL_HVD_ISR_Enable(E_HWDEC_ISR_HVD) != TRUE) in MDrv_HVD_EX_SetISREvent()4746 if (OSAL_HVD_ISR_Enable(E_HWDEC_ISR_EVD) != TRUE) in MDrv_HVD_EX_SetISREvent()
123 MS_BOOL OSAL_HVD_ISR_Enable(MS_U32 u32IsrVector);
154 inline MS_BOOL OSAL_HVD_ISR_Enable(MS_U32 u32IsrVector) in OSAL_HVD_ISR_Enable() function
1416 if (TRUE == OSAL_HVD_ISR_Enable())//enable cpu interrupt mask in _HVD_EX_ISRHandler()1465 if (TRUE == OSAL_HVD_ISR_Enable(HVD_ISR_VECTOR))//enable cpu interrupt mask in _HVD_EX_ISRHandler()1514 if (TRUE == OSAL_HVD_ISR_Enable(EVD_ISR_VECTOR))//enable cpu interrupt mask in _EVD_EX_ISRHandler()1563 if (TRUE == OSAL_HVD_ISR_Enable(EVD_LITE_ISR_VECTOR))//enable cpu interrupt mask in _EVDLITE_EX_ISRHandler()4713 if (OSAL_HVD_ISR_Enable(u32IsrVector) != TRUE) in MDrv_HVD_EX_SetISREvent()4747 OSAL_HVD_ISR_Enable(); in MDrv_HVD_EX_SetISREvent()