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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvHVD_EX.c
98 /// @brief HVD Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102
103 //-------------------------------------------------------------------------------------------------
104 // Include Files
105 //-------------------------------------------------------------------------------------------------
106 // Common Definition
107 #ifdef MSOS_TYPE_LINUX_KERNEL
108 #include <linux/string.h>
109 #if defined(__aarch64__)
110 #include <asm/io.h>
111 #endif
112 #else
113 #include <string.h>
114 #endif
115 #include "drvHVD_Common.h"
116 #include "drvHVD_EX.h"
117 #include "drvHVD_def.h"
118 #include "HVD_EX_Common.h"
119
120 #include "fwHVD_if.h"
121 #include "halVPU_EX.h"
122 #include "halHVD_EX.h"
123 #include "drvSYS.h"
124 #if defined(SUPPORT_CMA)
125
126 #include "drvCMAPool_v2.h"
127 #include "msos/linux/ion_uapi.h"
128 #include "msos/linux/mdrv_cma_pool_st.h"
129 #endif
130
131 #if HVD_ENABLE_AUTO_SET_REG_BASE
132 #include "drvMMIO.h"
133 #endif
134
135 #if (!defined(MSOS_TYPE_NUTTX) && !defined(MSOS_TYPE_OPTEE)) || defined(SUPPORT_X_MODEL_FEATURE)
136
137 #include "ULog.h"
138
139 #ifdef MSOS_TYPE_LINUX_KERNEL
140 #define VPRINTF printk
141 #elif defined(MSOS_TYPE_ECOS)
142 #define VPRINTF diag_printf
143 #else
144 #define VPRINTF(format,args...) ULOGI("VDEC", format, ##args)
145 #endif
146
147 //-------------------------------------------------------------------------------------------------
148 // Driver Compiler Options
149 //-------------------------------------------------------------------------------------------------
150 //#define SUPPORT_X_MODEL_FEATURE
151 //#define SUPPORT_X_MODEL_HVD_FEATURE //there is a side effect for CB when enable this define.should find the root cause then enable it
152 #define DISABLE_ISR_DETACH
153
154 //-------------------------------------------------------------------------------------------------
155 // Local Defines
156 //-------------------------------------------------------------------------------------------------
157
158 // Drv memory usage
159 #if defined(REDLION_LINUX_KERNEL_ENVI)
160 #define HVD_DTV_VIDEO_DELAY 0 // ms
161 #else
162 #define HVD_DTV_VIDEO_DELAY 0 // ms
163 #endif
164 #define HVD_FW_CMD_TIMEOUT_DEFAULT 100 // ms
165 #define HVD_FW_EXIT_ACTION_TIMEOUT 3500 // ms
166
167 #ifdef VDEC3
168 #define HVD_MAX_STREAMS 16
169 #else
170 #define HVD_MAX_STREAMS 2
171 #endif
172 #define HVD_MIN_PACKET_SIZE 16
173
174 #define HVD_CTRL_INIT_FINISHED BIT(0) // deflaut: 0
175 #define HVD_CTRL_PROCESSING BIT(1) // deflaut: 0
176 #define HVD_CTRL_DATA_END BIT(2) // deflaut: 0
177 #define HVD_CTRL_DISPLAY_CTRL BIT(3) // deflaut: 0
178 #define HVD_CTRL_DISP_INFO_RDY BIT(4) // deflaut: 0
179
180 #define HVD_CTRL_DISP_OUTSIDE BIT(5)//BIT(9) // deflaut: 0
181 typedef enum
182 {
183 E_HVD_CHECK_CMD_NONE = 0, //decode -> decode_finish
184 E_HVD_CHECK_CMD_INIT,
185 E_HVD_CHECK_CMD_TRIGGER_DISP,
186 E_HVD_CHECK_CMD_SEEK2PTS,
187 E_HVD_CHECK_CMD_MAX,
188 } HVD_Check_Cmd;
189
190 #define HVD_MIU_PROTECT_HVD BIT(0)
191 #define HVD_MIU_PROTECT_MVD BIT(1)
192 #define HVD_MIU_PROTECT_VPU BIT(2)
193
194 #define _DRV_HVD_EX_Entry(u8DrvId) \
195 do \
196 { \
197 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_PROCESSING; \
198 } while (0)
199
200 #define _DRV_HVD_EX_RET(u8DrvId, _ret_) \
201 do \
202 { \
203 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= (~HVD_CTRL_PROCESSING); \
204 return (_ret_); \
205 } while (0)
206
207 #define _DRV_HVD_Inited(u8DrvId,_ret_) \
208 do \
209 { \
210 if (!(pHVDDrvContext->bHVDIsInited[u8DrvId])) \
211 { \
212 return _ret_; \
213 } \
214 } while (0)
215
216 #define _DRV_HVD_Rsting(u8DrvId,_ret_) \
217 do \
218 { \
219 if (pHVDDrvContext->bHVDIsIniting[u8DrvId]) \
220 { \
221 return _ret_; \
222 } \
223 } while (0)
224
225 #define _DRV_HVD_Ctrl(u8DrvId, x) ( pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & (x) )
226
227 #define _DRV_HVD_SetCtrl(u8DrvId, x) \
228 do \
229 { \
230 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= (x); \
231 } while (0)
232
233 #ifndef UNUSED
234 #define UNUSED(x) (void)(x)
235 #endif
236
237 #define _MS_TO_90K(x) (x*90) //ms ==> 90k counter
238 #define _90K_TO_MS(x) (x/90) //90k counter ==> ms
239
240 //-------------------------------------------------------------------------------------------------
241 // Local Structures
242 //-------------------------------------------------------------------------------------------------
243
244 //-------------------------------------------------------------------------------------------------
245 // Local Functions Prototype
246 //-------------------------------------------------------------------------------------------------
247 static void _HVD_EX_SetShareInfoAddr(MS_U32 u32Id);
248 static HVD_EX_Result _HVD_EX_InitVariables(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams);
249 static HVD_EX_Result _HVD_EX_Check_Cmd(MS_U32 u32Id, HVD_Check_Cmd eCmd);
250 #ifdef VDEC3
251 static HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id, MS_BOOL bFWdecideFB);
252 #else
253 static HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id);
254 #endif
255 static HVD_EX_Result _HVD_EX_SetSyncMode(MS_U32 u32Id, HVD_Sync_Tbl_Type eMode);
256 static HVD_EX_Result _HVD_EX_InitFW_AVC(MS_U32 u32Id);
257 static HVD_EX_Result _HVD_EX_InitFW_RM(MS_U32 u32Id);
258 static HVD_EX_Result _HVD_EX_CheckFWVersion(MS_U32 u32Id);
259 static HVD_EX_Result _HVD_EX_InitFW(MS_U32 u32Id);
260 static MS_BOOL _HVD_EX_IsAllBufferEmpty(MS_U32 u32Id, MS_BOOL bFlush);
261 #ifndef VDEC3
262 static MS_BOOL _HVD_EX_IsAllBufferEmpty_VP8(MS_U32 u32Id);
263 #endif
264 static MS_U8 _HVD_EX_GetDrvId(MS_U32 u32Id);
265
266 #if defined(REDLION_LINUX_KERNEL_ENVI)
267 static MS_S32 _HVD_EX_ISRHandler(void);
268 #else
269 static void _HVD_EX_ISRHandler(void);
270 static void _EVD_EX_ISRHandler(void);
271 #endif
272
273 static MS_U32 _HVD_EX_ReportLow32BitPTS(MS_U32 u32Id, MS_U32 u32PTS);
274 static MS_U32 _HVD_EX_Map2HVDErrCode(MS_U32 u32ErrCode);
275 static MS_U32 _HVD_EX_Map2HVDESBufStatus(MS_U32 u32ESBufStatus);
276 static MS_U32 _HVD_EX_GetMIUBase(MS_U8 u8DrvId, MS_U32 u32MIU);
277
278 #if 0
279 //-------------------------------------------------------------------------------------------------
280 // Global Variables
281 //-------------------------------------------------------------------------------------------------
282 MS_U32 u32UartCtrl = (E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_MUST);
283 MS_U32 u32InitSysTimeBase = 0;
284
285 //-------------------------------------------------------------------------------------------------
286 // Local Variables
287 //-------------------------------------------------------------------------------------------------
288 static MSIF_Version _drv_hvd_version =
289 {
290 .DDI = {HVD_DRV_VERSION,},
291 };
292 static MS_BOOL bHVDIsInited;
293 static MS_BOOL bHVDIsIniting;
294 static HVD_EX_DrvInfo DrvInfo;
295 static HVD_EX_Drv_Ctrl gHVDCtrl_EX[HVD_MAX_STREAMS] =
296 {
297 { .bUsed = FALSE,
298 },
299 { .bUsed = FALSE,
300 },
301 };
302
303 static MS_BOOL bHVDIsrAttached = FALSE;
304 #endif
305 MS_U32 u32UartCtrl = (E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_MUST);
306
307 typedef struct
308 {
309 MS_U32 u32InitSysTimeBase[HVD_MAX_STREAMS];
310 MS_BOOL bHVDIsInited[HVD_MAX_STREAMS];
311 MS_BOOL bHVDIsIniting[HVD_MAX_STREAMS];
312 HVD_EX_Drv_Ctrl gHVDCtrl_EX[HVD_MAX_STREAMS];
313 MS_BOOL bCMAUsed;
314 #if defined(SUPPORT_CMA)
315 struct CMA_Pool_Init_Param cmaInitParam[2]; // support two MIU
316 struct CMA_Pool_Free_Param cmaFreeParam[2][HVD_MAX_STREAMS];
317 MS_BOOL bCMATwoMIU[HVD_MAX_STREAMS];
318 #endif
319 MS_BOOL bHVDIsrAttached; //HVD ISR is attach or not
320 MS_BOOL bHVDMSOSIsrEnable; //HVD msos isr enable or not
321 MS_BOOL bEVDIsrAttached; //EVD ISR is attach or not
322 MS_BOOL bEVDMSOSIsrEnable; //EVD msos isr enable or not
323
324 MS_BOOL bVPUIsSecureMode;
325 //pre_set
326 HVD_Pre_Ctrl gHVDPreCtrl[HVD_MAX_STREAMS];
327 #ifdef VDEC3
328 MS_BOOL bFWdecideFB;
329 #endif
330 } HVD_Drv_CTX;
331
332 //global variables
333 HVD_Drv_CTX* pHVDDrvContext = NULL;
334 HVD_Drv_CTX gHVDDrvContext;
335 MSIF_Version _drv_hvd_version =
336 {
337 .DDI = {HVD_DRV_VERSION,},
338 };
339 HVD_EX_DrvInfo DrvInfo;
340
341
342 MS_BOOL bHVDIsIsrAttached = FALSE; //check HVD isr already attached, avoid HVD+HVD re-attached
343 MS_BOOL bEVDIsIsrAttached = FALSE; //check EVD isr already attached, avoid HVD+HVD re-attached
344 MS_BOOL bHVDDisableISRFlag = TRUE;
345 MS_BOOL bEVDDisableISRFlag = TRUE;
346
347 //-------------------------------------------------------------------------------------------------
348 // Debug Functions
349 //-------------------------------------------------------------------------------------------------
350
351
352 //-------------------------------------------------------------------------------------------------
353 // Local Functions
354 //-------------------------------------------------------------------------------------------------
_HVD_MapRetEx(HVD_Return eHvd_Ret)355 static HVD_EX_Result _HVD_MapRetEx(HVD_Return eHvd_Ret)
356 {
357 HVD_EX_Result eRes = E_HVD_EX_FAIL;
358 switch(eHvd_Ret)
359 {
360 case E_HVD_RETURN_FAIL : eRes = E_HVD_EX_FAIL;break;
361 case E_HVD_RETURN_SUCCESS : eRes = E_HVD_EX_OK;break;
362 case E_HVD_RETURN_INVALID_PARAMETER : eRes = E_HVD_EX_RET_INVALID_PARAMETER;break;
363 case E_HVD_RETURN_ILLEGAL_ACCESS : eRes = E_HVD_EX_RET_ILLEGAL_ACCESS;break;
364 case E_HVD_RETURN_HARDWARE_BREAKDOWN: eRes = E_HVD_EX_RET_HARDWARE_BREAKDOWN;break;
365 case E_HVD_RETURN_OUTOF_MEMORY : eRes = E_HVD_EX_RET_OUTOF_MEMORY;break;
366 case E_HVD_RETURN_UNSUPPORTED : eRes = E_HVD_EX_RET_UNSUPPORTED;break;
367 case E_HVD_RETURN_TIMEOUT : eRes = E_HVD_EX_RET_TIMEOUT;break;
368 case E_HVD_RETURN_NOTREADY : eRes = E_HVD_EX_RET_NOTREADY;break;
369 case E_HVD_RETURN_MEMORY_OVERWIRTE : eRes = E_HVD_EX_RET_MEMORY_OVERWIRTE;break;
370 case E_HVD_RETURN_ES_FULL : eRes = E_HVD_EX_RET_QUEUE_FULL;break;
371 case E_HVD_RETURN_RE_INIT : eRes = E_HVD_EX_RET_RE_INIT;break;
372 case E_HVD_RETURN_NOT_RUNNING : eRes = E_HVD_EX_RET_NOT_RUNNING;break;
373 default: break;
374 }
375 return eRes;
376 }
377
378
_HVD_EX_Context_Init(void)379 static void _HVD_EX_Context_Init(void)
380 {
381 pHVDDrvContext->bHVDIsrAttached = FALSE;
382 pHVDDrvContext->bEVDIsrAttached = FALSE;
383 return;
384 }
385
_HVD_EX_SetShareInfoAddr(MS_U32 u32Id)386 static void _HVD_EX_SetShareInfoAddr(MS_U32 u32Id)
387 {
388 MS_U32 u32ShmAddr = HAL_VPU_EX_GetSHMAddr();
389
390 HAL_VPU_EX_SetShareInfoAddr(u32Id, u32ShmAddr);
391
392 return;
393 }
394
_HVD_EX_InitVariables(MS_U32 u32Id,HVD_EX_MemCfg * pStMemCfg,HVD_Init_Params * pStInitParams)395 static HVD_EX_Result _HVD_EX_InitVariables(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams)
396 {
397 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
398 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
399
400 memset((void *) pCtrl, 0, sizeof(HVD_EX_Drv_Ctrl));
401 pCtrl->bFrmRateSupported = TRUE;
402
403 // PreSetControl
404 HAL_HVD_EX_SetPreCtrlVariables(u32Id,(MS_VIRT)(&pHVDDrvContext->gHVDPreCtrl[u8DrvId]));
405
406 if (sizeof(HVD_Init_Params) == sizeof(HVD_EX_InitSettings))
407 {
408 HVD_memcpy((void *) &pCtrl->InitParams, pStInitParams, sizeof(HVD_Init_Params));
409 }
410 else
411 {
412 HVD_EX_MSG_ERR("HVD struct define is diff: HVD_Init_Params(%u) vs HVD_Init_Settings(%u)\n",
413 (MS_U32) sizeof(HVD_Init_Params), (MS_U32) sizeof(HVD_EX_InitSettings));
414 return E_HVD_EX_FAIL;
415 }
416
417 // fill memory
418 if (pStMemCfg->u32MIU1BaseAddr == 0)
419 {
420 // Get physical address from MIU selection= E_CHIP_MIU_2 and offset=0x10000000
421 _miu_offset_to_phy(E_CHIP_MIU_1, 0, pCtrl->MemMap.u32MIU1BaseAddr);
422 _miu_offset_to_phy(E_CHIP_MIU_2, 0, pCtrl->MemMap.u32MIU2BaseAddr);
423
424 }
425 else
426 {
427 pCtrl->MemMap.u32MIU1BaseAddr = pStMemCfg->u32MIU1BaseAddr; /// TODO : pStMemCfg need member u32MIU2BaseAddr
428 }
429
430 pCtrl->MemMap.eFWSourceType = (HVD_FWInputSourceType) pStMemCfg->eFWSourceType;
431 pCtrl->MemMap.u32FWBinaryVAddr = pStMemCfg->u32FWBinaryVAddr;
432 pCtrl->MemMap.u32FWBinaryAddr = (MS_U32) pStMemCfg->u32FWBinaryAddr;
433 pCtrl->MemMap.u32FWBinarySize = pStMemCfg->u32FWBinarySize;
434 pCtrl->MemMap.u32VLCBinaryVAddr = pStMemCfg->u32VLCBinaryVAddr;
435 pCtrl->MemMap.u32VLCBinaryAddr = (MS_U32) pStMemCfg->u32VLCBinaryAddr;
436 pCtrl->MemMap.u32VLCBinarySize = pStMemCfg->u32VLCBinarySize;
437 pCtrl->MemMap.u32CodeBufVAddr = pStMemCfg->u32CodeBufVAddr;
438 pCtrl->MemMap.u32CodeBufAddr = (MS_U32) pStMemCfg->u32CodeBufAddr;
439 pCtrl->MemMap.u32CodeBufSize = pStMemCfg->u32CodeBufSize;
440 pCtrl->MemMap.u32FrameBufVAddr = pStMemCfg->u32FrameBufVAddr;
441 pCtrl->MemMap.u32FrameBufAddr = (MS_U32) pStMemCfg->u32FrameBufAddr;
442 pCtrl->MemMap.u32FrameBufSize = pStMemCfg->u32FrameBufSize;
443 #ifdef VDEC3
444 pCtrl->MemMap.u32TotalBitstreamBufAddr = pStMemCfg->u32TotalBitstreamBufAddr;
445 pCtrl->MemMap.u32TotalBitstreamBufSize = pStMemCfg->u32TotalBitstreamBufSize;
446 #endif
447
448 #if HVD_ENABLE_MVC
449 if (((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC) &&
450 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_DUAL_ES_MASK) == HVD_INIT_DUAL_ES_ENABLE))
451 {
452 HVD_EX_Drv_Ctrl *pDrvCtrl_sub = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]);
453 memset((void *) pDrvCtrl_sub, 0, sizeof(HVD_EX_Drv_Ctrl));
454
455 /// Copy to sub view ctrl
456 HVD_memcpy((void *) &pDrvCtrl_sub->InitParams, pStInitParams, sizeof(HVD_Init_Params));
457
458 // fill memory
459 if (pStMemCfg->u32MIU1BaseAddr == 0)
460 {
461 _miu_offset_to_phy(E_CHIP_MIU_1, 0, pDrvCtrl_sub->MemMap.u32MIU1BaseAddr);
462 _miu_offset_to_phy(E_CHIP_MIU_2, 0, pDrvCtrl_sub->MemMap.u32MIU2BaseAddr);
463 }
464 else
465 {
466 pDrvCtrl_sub->MemMap.u32MIU1BaseAddr = pStMemCfg->u32MIU1BaseAddr; /// TODO : pStMemCfg need member u32MIU2BaseAddr
467 }
468
469 pCtrl->MemMap.u32BitstreamBufVAddr= pStMemCfg->u32BitstreamBufVAddr;
470 pCtrl->MemMap.u32BitstreamBufAddr = (MS_PHY) pStMemCfg->u32BitstreamBufAddr ;
471 #if 1
472 pCtrl->MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize/2 ;
473 pDrvCtrl_sub->MemMap.u32BitstreamBufVAddr = pStMemCfg->u32BitstreamBufVAddr + pStMemCfg->u32BitstreamBufSize/2;
474 pDrvCtrl_sub->MemMap.u32BitstreamBufAddr = (MS_PHY) pStMemCfg->u32BitstreamBufAddr + pStMemCfg->u32BitstreamBufSize/2;
475 pDrvCtrl_sub->MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize/2 ;
476 #else
477 pCtrl->MemMap.u32BitstreamBufSize = (pStMemCfg->u32BitstreamBufSize*57/128) ;
478 pDrvCtrl_sub->MemMap.u32BitstreamBufVAddr = pStMemCfg->u32BitstreamBufVAddr + (pStMemCfg->u32BitstreamBufSize*57/128);
479 pDrvCtrl_sub->MemMap.u32BitstreamBufAddr = (MS_PHY) pStMemCfg->u32BitstreamBufAddr + (pStMemCfg->u32BitstreamBufSize*57/128);
480 pDrvCtrl_sub->MemMap.u32BitstreamBufSize = (pStMemCfg->u32BitstreamBufSize*71/128) ;
481 #endif
482
483 pCtrl->MemMap.u32DrvProcessBufVAddr = pDrvCtrl_sub->MemMap.u32DrvProcessBufVAddr = pStMemCfg->u32DrvProcessBufVAddr;
484 pCtrl->MemMap.u32DrvProcessBufAddr = pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr = (MS_PHY) pStMemCfg->u32DrvProcessBufAddr;
485 pCtrl->MemMap.u32DrvProcessBufSize = pDrvCtrl_sub->MemMap.u32DrvProcessBufSize = pStMemCfg->u32DrvProcessBufSize;
486
487 pDrvCtrl_sub->MemMap.u32CodeBufVAddr = pStMemCfg->u32CodeBufVAddr;
488 pDrvCtrl_sub->MemMap.u32CodeBufAddr = (MS_PHY) pStMemCfg->u32CodeBufAddr;
489 pDrvCtrl_sub->MemMap.u32CodeBufSize = pStMemCfg->u32CodeBufSize;
490
491 HVD_EX_MSG_INF("[MVC] Bitstream buffer: 1st = [0x%lx, 0x%lx, 0x%lx], 2nd = [0x%lx, 0x%lx, 0x%lx].\n",
492 (unsigned long) pCtrl->MemMap.u32BitstreamBufVAddr,
493 (unsigned long)pCtrl->MemMap.u32BitstreamBufAddr,
494 (unsigned long)pCtrl->MemMap.u32BitstreamBufSize,
495 (unsigned long) pDrvCtrl_sub->MemMap.u32BitstreamBufVAddr,
496 (unsigned long)pDrvCtrl_sub->MemMap.u32BitstreamBufAddr,
497 (unsigned long)pDrvCtrl_sub->MemMap.u32BitstreamBufSize);
498 }
499 else
500 #endif
501 {
502 pCtrl->MemMap.u32BitstreamBufVAddr = pStMemCfg->u32BitstreamBufVAddr;
503 pCtrl->MemMap.u32BitstreamBufAddr = (MS_U32) pStMemCfg->u32BitstreamBufAddr;
504 pCtrl->MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize;
505 pCtrl->MemMap.u32DrvProcessBufVAddr = pStMemCfg->u32DrvProcessBufVAddr;
506 pCtrl->MemMap.u32DrvProcessBufAddr = (MS_U32) pStMemCfg->u32DrvProcessBufAddr;
507 pCtrl->MemMap.u32DrvProcessBufSize = pStMemCfg->u32DrvProcessBufSize;
508 }
509
510 HVD_EX_MSG_INF("HVD mmap: MIU1base:0x%lx, MIU2base:0x%lx,FW(type:%d addr=0x%lx size=0x%x), VLC(addr=0x%lx size=0x%x), Code(addr=0x%lx size=0x%x), FB(addr=0x%lx size=0x%x), Bit(addr=0x%lx size=0x%x), Drv(addr=0x%lx size=0x%x)\n",
511 (unsigned long)pCtrl->MemMap.u32MIU1BaseAddr,
512 (unsigned long)pCtrl->MemMap.u32MIU2BaseAddr,
513 pCtrl->MemMap.eFWSourceType, (unsigned long)pCtrl->MemMap.u32FWBinaryAddr, pCtrl->MemMap.u32FWBinarySize,
514 (unsigned long)pCtrl->MemMap.u32VLCBinaryAddr, pCtrl->MemMap.u32VLCBinarySize,
515 (unsigned long)pCtrl->MemMap.u32CodeBufAddr, pCtrl->MemMap.u32CodeBufSize,
516 (unsigned long)pCtrl->MemMap.u32FrameBufAddr, pCtrl->MemMap.u32FrameBufSize,
517 (unsigned long)pCtrl->MemMap.u32BitstreamBufAddr, pCtrl->MemMap.u32BitstreamBufSize,
518 (unsigned long)pCtrl->MemMap.u32DrvProcessBufAddr, pCtrl->MemMap.u32DrvProcessBufSize);
519
520 pCtrl->InitParams.u16DecoderClock = HAL_HVD_EX_GetCorretClock(pStInitParams->u16DecoderClock);
521 pCtrl->InitParams.u16ChipECONum = (MS_U16)MDrv_SYS_GetChipRev();
522
523
524 HVD_EX_MSG_INF("[VDEC]pCtrl->InitParams.u16ChipECONum : %d \n ", pCtrl->InitParams.u16ChipECONum);
525
526 MS_U32 i;
527 pCtrl->CloseCaptionInfo.u8ParsingStatus = 0xff;
528 pCtrl->CloseCaptionInfo.u8BufMiuSel[0] = pCtrl->CloseCaptionInfo.u8BufMiuSel[1] = E_CHIP_MIU_0;
529 pCtrl->CloseCaptionInfo.b708Enable = FALSE;
530 pCtrl->CloseCaptionInfo.u32FWUsrDataRIdx = pCtrl->CloseCaptionInfo.u32FWUsrDataWIdx = 0;
531 pCtrl->CloseCaptionInfo.u32PktLen708 = 0;
532 pCtrl->CloseCaptionInfo.u32PktHdrAddr708 = 0;
533
534
535 for (i=0;i<2;i++)
536 {
537 pCtrl->CloseCaptionInfo.u32RingBufStartPAddr[i] = 0;
538 pCtrl->CloseCaptionInfo.u32RingBufLen[i] = 0;
539 pCtrl->CloseCaptionInfo.u32RingBufVacancy[i] = 0;
540 pCtrl->CloseCaptionInfo.u32RingBufRPAddr[i] = 0;
541 pCtrl->CloseCaptionInfo.u32RingBufWPAddr[i] = 0;
542 pCtrl->CloseCaptionInfo.bOverFlow[i] = FALSE;
543 }
544
545 pCtrl->CloseCaptionInfo.b608InfoEnhance = FALSE;
546
547 #if HVD_ENABLE_STOP_ACCESS_OVER_256
548 pCtrl->bCannotAccessMIU256 = TRUE;
549 #endif
550
551 pCtrl->bAutoRmLastZeroByte = TRUE;
552 pCtrl->u32CmdTimeout = HVD_FW_CMD_TIMEOUT_DEFAULT;
553
554 if (pStInitParams->u8TurboInit & E_HVD_EX_TURBOINIT_FW_RELOAD)
555 {
556 pCtrl->bTurboFWMode = TRUE;
557 }
558
559 HAL_HVD_EX_SetMiuBurstLevel(pCtrl, E_HVD_BURST_CNT_DISABLE);
560
561 pCtrl->u32FlushRstPtr = 0;
562
563 return E_HVD_EX_OK;
564 }
565
_HVD_EX_Check_Cmd(MS_U32 u32Id,HVD_Check_Cmd eCmd)566 static HVD_EX_Result _HVD_EX_Check_Cmd(MS_U32 u32Id, HVD_Check_Cmd eCmd)
567 {
568 MS_U32 u32Tmp0 = 0;
569 MS_U32 u32Tmp1 = 0;
570 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
571
572 switch (eCmd)
573 {
574 case E_HVD_CHECK_CMD_INIT:
575 {
576 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_CHECK))
577 {
578 // Check mode
579 u32Tmp0 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK;
580
581 if (!MDrv_HVD_EX_GetCaps((HVD_EX_Codec) u32Tmp0))
582 {
583 HVD_EX_MSG_ERR("Init: HW not support type:%d\n", eCmd);
584 return E_HVD_EX_RET_UNSUPPORTED;
585 }
586
587 u32Tmp0 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
588
589 if (u32Tmp0 == HVD_INIT_MAIN_LIVE_STREAM)
590 {
591 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_DRV)
592 {
593 HVD_EX_MSG_ERR("Init: Live stream mode can not use Drv input\n");
594 return E_HVD_EX_RET_INVALID_PARAMETER;
595 }
596 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI | HVD_INIT_DBG_FW)))
597 {
598 // need not to check this under debug mode
599 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK) ==
600 HVD_INIT_START_CODE_REMOVED)
601 {
602 HVD_EX_MSG_ERR("Init: Live stream mode must have start code\n");
603 return E_HVD_EX_RET_INVALID_PARAMETER;
604 }
605 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON)
606 {
607 HVD_EX_MSG_ERR("Init: Live stream mode can not use none ATS sync mode\n");
608 return E_HVD_EX_RET_INVALID_PARAMETER;
609 }
610 }
611 }
612 else if ((u32Tmp0 == HVD_INIT_MAIN_FILE_RAW) || (u32Tmp0 == HVD_INIT_MAIN_FILE_TS))
613 {
614 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI | HVD_INIT_DBG_FW)))
615 {
616 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_DTS)
617 && (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_STS)
618 && (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_PTS)
619 && (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON))
620 {
621 HVD_EX_MSG_ERR("Init: sync mode is not set. use default value:%d\n",
622 (MS_U16) E_HVD_SYNC_TBL_TYPE_PTS);
623 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType = E_HVD_SYNC_TBL_TYPE_PTS;
624 }
625 }
626 }
627 else if ((u32Tmp0 != HVD_INIT_MAIN_FILE_RAW) && (u32Tmp0 != HVD_INIT_MAIN_FILE_TS))
628 {
629 HVD_EX_MSG_ERR("Init: main type can not be recognized:%d\n", u32Tmp0);
630 return E_HVD_EX_RET_INVALID_PARAMETER;
631 }
632
633 // check memory map
634 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr == 0)
635 {
636 HVD_EX_MSG_ERR("Init: MIU 1 Base addr should not be zero\n");
637 return E_HVD_EX_RET_INVALID_PARAMETER;
638 }
639
640 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr & 0x7FF) != 0)
641 {
642 HVD_EX_MSG_ERR("Init: Error HVD code address(0x%lx) must 2048 byte alignment\n",
643 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr);
644 return E_HVD_EX_RET_INVALID_PARAMETER;
645 }
646 }
647
648 u32Tmp0 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
649 u32Tmp1 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK;
650
651 if (u32Tmp0 != HVD_INIT_MAIN_LIVE_STREAM)
652 {
653 if (u32Tmp1 == HVD_INIT_INPUT_DRV)
654 {
655 // check if driver process buffer is in bitstream buffer.
656 MS_U32 tmpAddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr;
657
658 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr == 0)
659 {
660 HVD_EX_MSG_ERR("Init: Drv process buffer address should not be zero\n");
661 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
662 //return E_HVD_EX_RET_INVALID_PARAMETER;
663 }
664
665 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr > tmpAddr)
666 || (tmpAddr >
667 (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr +
668 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufSize)))
669 {
670 HVD_EX_MSG_ERR
671 ("Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or MP4) and Drv input.\n");
672 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
673 //return E_HVD_EX_RET_INVALID_PARAMETER;
674 }
675
676 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize
677 <
678 (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) +
679 8))
680 {
681 #if 0
682 HVD_EX_MSG_ERR
683 ("Init: File mode(TS or MP4) and Drv input must set the process buffer size and must be larger than %u Bytes:%d\n",
684 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize,
685 (MS_U32) (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF +
686 (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) + 8));
687 #endif
688 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
689 //return E_HVD_EX_RET_OUTOF_MEMORY;
690 }
691
692 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize > 1)
693 {
694 tmpAddr =
695 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr +
696 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize - 1;
697 }
698 else
699 {
700 tmpAddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr;
701 }
702
703 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr > tmpAddr)
704 || (tmpAddr >
705 (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr +
706 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufSize)))
707 {
708 HVD_EX_MSG_ERR
709 ("Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or PS) and Drv input.\n");
710 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
711 //return E_HVD_EX_RET_INVALID_PARAMETER;
712 }
713 }
714 else
715 {
716 // TODO: check if the TSP MIU sel is the same with the MIU lacation of process buffer.
717 }
718 }
719 break;
720 }
721 case E_HVD_CHECK_CMD_SEEK2PTS:
722 case E_HVD_CHECK_CMD_TRIGGER_DISP:
723 {
724 #if 0
725 if (MDrv_HVD_EX_GetPlayMode(E_HVD_EX_GMODE_IS_SYNC_ON))
726 {
727 HVD_EX_MSG_ERR("Cmd type:%d Sync Active: %lx\n", (MS_U16) eCmd,
728 (MS_S32) MDrv_HVD_EX_GetPlayMode(E_HVD_EX_GMODE_IS_SYNC_ON));
729 return E_HVD_EX_RET_ILLEGAL_ACCESS;
730 }
731 #endif
732 break;
733 }
734 default:
735 return E_HVD_EX_OK;
736 }
737
738 return E_HVD_EX_OK;
739 }
740 #ifdef VDEC3
_HVD_EX_InitRegCPU(MS_U32 u32Id,MS_BOOL bFWdecideFB)741 HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id, MS_BOOL bFWdecideFB)
742 #else
743 HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id)
744 #endif
745 {
746 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
747
748 // check MIU select
749 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_CHECK))
750 {
751 HAL_HVD_EX_CheckMIUSel(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_UTOPIA_ENVI);
752 }
753 #ifdef VDEC3
754 return (HVD_EX_Result) HAL_HVD_EX_InitRegCPU(u32Id,bFWdecideFB);
755 #else
756 return (HVD_EX_Result) HAL_HVD_EX_InitRegCPU(u32Id);
757 #endif
758 }
759
_HVD_EX_RstVariables(MS_U32 u32Id)760 static HVD_EX_Result _HVD_EX_RstVariables(MS_U32 u32Id)
761 {
762 //MS_BOOL bBitMIU1 = FALSE;
763 //MS_BOOL bCodeMIU1 = FALSE;
764 MS_U8 u8BitMiuSel;
765 MS_U32 u32BitStartOffset;
766 MS_U8 u8CodeMiuSel;
767 MS_U32 u32CodeStartOffset;
768 MS_U8 u8FrmMiuSel;
769 MS_U32 u32FrmStartOffset;
770 MS_U8 u8DrvProccMiuSel;
771 MS_U32 u32DrvProccStartOffset;
772 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
773 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
774
775 // Init control flg
776 pCtrl->u32CtrlMode = 0;
777
778 #if 1
779 _phy_to_miu_offset(u8CodeMiuSel, u32CodeStartOffset, pCtrl->MemMap.u32CodeBufAddr);
780 pCtrl->u8CodeMiuSel = u8CodeMiuSel;
781 _phy_to_miu_offset(u8BitMiuSel, u32BitStartOffset, pCtrl->MemMap.u32BitstreamBufAddr);
782 pCtrl->u8ESMiuSel = u8BitMiuSel;
783 _phy_to_miu_offset(u8FrmMiuSel, u32FrmStartOffset, pCtrl->MemMap.u32FrameBufAddr);
784 pCtrl->u8FrmMiuSel = u8FrmMiuSel;
785 pCtrl->u8Frm2MiuSel = u8FrmMiuSel;
786 _phy_to_miu_offset(u8DrvProccMiuSel, u32DrvProccStartOffset, pCtrl->MemMap.u32DrvProcessBufAddr);
787 pCtrl->u8DrvProccMiuSel = u8DrvProccMiuSel;
788 #else
789 if (pCtrl->MemMap.u32CodeBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
790 {
791 pCtrl->u32CtrlMode |= HVD_CTRL_CODE_MIU_1;
792 bCodeMIU1 = TRUE;
793 }
794
795 if (pCtrl->MemMap.u32BitstreamBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
796 {
797 pCtrl->u32CtrlMode |= HVD_CTRL_ES_MIU_1;
798 bBitMIU1 = TRUE;
799 }
800
801 if (pCtrl->MemMap.u32FrameBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
802 {
803 pCtrl->u32CtrlMode |= HVD_CTRL_FRM_MIU_1;
804 }
805
806 if (pCtrl->MemMap.u32DrvProcessBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
807 {
808 pCtrl->u32CtrlMode |= HVD_CTRL_DRVPROCC_MIU_1;
809 }
810 #endif
811
812 if (!pCtrl->bNoDrvProccBuf)
813 {
814 // init nal table buffer start address.
815 if ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
816 {
817 if (u8BitMiuSel != u8CodeMiuSel)
818 {
819 #if HVD_ENABLE_MVC
820 if( ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC) &&
821 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_DUAL_ES_MASK) == HVD_INIT_DUAL_ES_ENABLE) &&
822 (pCtrl->MemMap.u32DrvProcessBufSize > (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB)<<1 ) <<3) + 8) ))
823 {
824 pCtrl->u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF;
825 if( (( pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr) % 8) != 0)
826 {
827 pCtrl->u32BBUTblInBitstreamBufAddr = pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr + 7;
828 pCtrl->u32BBUTblInBitstreamBufAddr -= (pCtrl->u32BBUTblInBitstreamBufAddr ) % 8;
829 pCtrl->u32BBUTblInBitstreamBufAddr -= pCtrl->MemMap.u32DrvProcessBufAddr;
830 HVD_EX_MSG_ERR("Nal table in bitstream buffer start address is not aligned. old:%lx new:%lx" , (unsigned long) HVD_BBU_ST_ADDR_IN_BITSTREAMBUF, (unsigned long) pCtrl->u32BBUTblInBitstreamBufAddr );
831 }
832
833 /// Setting BBU for MVC dual bbu input
834 HVD_EX_Drv_Ctrl *pDrvCtrl_sub = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]);
835 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3); //// need to check
836 if( (( pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr + pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr) % 8) != 0)
837 {
838 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr = pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr + pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr + 7;
839 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr -= (pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr ) % 8;
840 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr -= pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr;
841 HVD_EX_MSG_ERR("[MVC]: Nal table in bitstream buffer start address is not aligned. old:%lx new:%lx" , (unsigned long) HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) , (unsigned long) pCtrl->u32BBUTblInBitstreamBufAddr);
842 }
843
844 }
845 else
846 #endif
847 if (pCtrl->MemMap.u32DrvProcessBufSize >
848 (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) + 8)))
849 {
850 pCtrl->u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF;
851
852 if (((pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr) % 8) != 0)
853 {
854 pCtrl->u32BBUTblInBitstreamBufAddr =
855 pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr + 7;
856 pCtrl->u32BBUTblInBitstreamBufAddr -= (pCtrl->u32BBUTblInBitstreamBufAddr) % 8;
857 pCtrl->u32BBUTblInBitstreamBufAddr -= pCtrl->MemMap.u32DrvProcessBufAddr;
858 HVD_EX_MSG_ERR
859 ("Nal table in bitstream buffer start address is not aligned. old:%x new:%x",
860 (MS_U32) HVD_BBU_ST_ADDR_IN_BITSTREAMBUF, pCtrl->u32BBUTblInBitstreamBufAddr);
861 }
862 }
863 else
864 {
865 HVD_EX_MSG_ERR
866 ("Driver process buffer size is not enough for driver input path. input:%x required:%lx",
867 (MS_U32) pCtrl->MemMap.u32DrvProcessBufSize,
868 (unsigned long)(HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) +
869 8));
870 return E_HVD_EX_RET_OUTOF_MEMORY;
871 }
872 }
873 }
874
875 // init AVI NULL packet pattern && RM flush pattern
876 if ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
877 {
878 MS_U8 *pNULLPattern = NULL;
879 pCtrl->u32NULLPacketAddr = pCtrl->MemMap.u32DrvProcessBufAddr;
880 // TODO: use other non-cachable VA addr
881 //Use shared memory instead of f/w code buffer.
882 pNULLPattern = (MS_U8 *) HAL_HVD_EX_GetShmAddr(u32Id);
883 if(pNULLPattern == NULL)
884 {
885 HVD_EX_MSG_ERR("########## VDEC patch for Debug %s %d###########\n", __FUNCTION__, __LINE__);
886 return E_HVD_EX_FAIL;
887 }
888 memset((void *) pNULLPattern, 0, 12);
889
890 switch ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
891 {
892 case HVD_INIT_HW_AVC:
893 case HVD_INIT_HW_AVS:
894 case HVD_INIT_HW_MVC:
895 #if SUPPORT_EVD
896 case HVD_INIT_HW_VP9: // MStar VP9 or G2 VP9
897 case HVD_INIT_HW_HEVC:
898 case HVD_INIT_HW_HEVC_DV:
899 #endif
900 {
901 if (pCtrl->InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK)
902 {
903 // start code removed
904 pCtrl->u32NULLPacketSize = 8;
905
906 if (pCtrl->MemMap.u32DrvProcessBufSize < pCtrl->u32NULLPacketSize)
907 {
908 return E_HVD_EX_RET_OUTOF_MEMORY;
909 }
910
911 memset((void *) pNULLPattern, 0xAA, pCtrl->u32NULLPacketSize);
912 pNULLPattern[4] = 0X55;
913 }
914 else // start code remained
915 {
916 pCtrl->u32NULLPacketSize = 12;
917
918 if (pCtrl->MemMap.u32DrvProcessBufSize < pCtrl->u32NULLPacketSize)
919 {
920 return E_HVD_EX_RET_OUTOF_MEMORY;
921 }
922
923 memset((void *) pNULLPattern, 0xAA, pCtrl->u32NULLPacketSize);
924
925 pNULLPattern[0] = 0;
926 pNULLPattern[1] = 0;
927 pNULLPattern[2] = 1;
928 pNULLPattern[3] = 0xFF;
929 pNULLPattern[8] = 0X55;
930 }
931
932 //if (bBitMIU1 != bCodeMIU1)
933 if(u8BitMiuSel != u8CodeMiuSel)
934 {
935 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
936 HAL_HVD_EX_FlushMemory();
937 HVD_dmacpy(pCtrl->MemMap.u32DrvProcessBufAddr, pCtrl->MemMap.u32CodeBufAddr,
938 pCtrl->u32NULLPacketSize);
939 #else
940 HVD_memcpy((void *) (pCtrl->MemMap.u32DrvProcessBufVAddr), pNULLPattern,
941 pCtrl->u32NULLPacketSize);
942 HAL_HVD_EX_FlushMemory();
943 #endif
944 }
945 else
946 {
947 HVD_memcpy((void *) (pCtrl->MemMap.u32DrvProcessBufVAddr), pNULLPattern,
948 pCtrl->u32NULLPacketSize);
949 HAL_HVD_EX_FlushMemory();
950 }
951
952 break;
953 }
954 case HVD_INIT_HW_RM:
955 {
956 // RM has no NULL packet
957 pCtrl->u32NULLPacketSize = 0;
958 pCtrl->u32NULLPacketAddr = 0;
959 #if HVD_ENABLE_RV_FEATURE
960 pCtrl->u32RV_FlushPacketAddr = pCtrl->MemMap.u32DrvProcessBufAddr;
961 pCtrl->u32RV_FlushPacketSize = 8;
962
963 if (pCtrl->MemMap.u32DrvProcessBufSize < pCtrl->u32RV_FlushPacketSize)
964 {
965 return E_HVD_EX_RET_OUTOF_MEMORY;
966 }
967 memset((void *) pNULLPattern, 0xFF, pCtrl->u32RV_FlushPacketSize);
968 {
969 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
970 HAL_HVD_EX_FlushMemory();
971 HVD_dmacpy(pCtrl->MemMap.u32DrvProcessBufAddr, pCtrl->MemMap.u32CodeBufAddr,
972 pCtrl->u32RV_FlushPacketSize);
973 #else
974 HVD_memcpy((void *) (pCtrl->MemMap.u32DrvProcessBufVAddr), pNULLPattern,
975 pCtrl->u32RV_FlushPacketSize);
976 HAL_HVD_EX_FlushMemory();
977 #endif
978 }
979 #endif
980 break;
981 }
982 default:
983 pCtrl->u32NULLPacketSize = 0;
984 pCtrl->u32NULLPacketAddr = 0;
985 break;
986 }
987 }
988 else
989 {
990 pCtrl->u32NULLPacketSize = 0;
991 pCtrl->u32NULLPacketAddr = 0;
992 }
993 }
994
995 // reset other driver control variables
996 pCtrl->u32StepDecodeCnt = 0;
997 pCtrl->u32LastESRptr = 0;
998 pCtrl->u32BBUPacketCnt = 0;
999 pCtrl->u32BBUWptr_Fired = 0;
1000 pCtrl->u32LastErrCode = 0;
1001 pCtrl->bIsDispInfoChg = 0;
1002
1003 memset((void *) &(pCtrl->LastNal), 0, sizeof(HVD_Nal_Entry));
1004 memset((void *) &(pCtrl->LivingStatus), 0, sizeof(HVD_Alive_Status));
1005
1006 #if HVD_ENABLE_MVC
1007 if((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
1008 {
1009 /// TODO: MVC want to used 2nd HVDCtrl data.
1010 //u8DrvId = _HVD_EX_GetDrvId(u32Id);
1011 //pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId + 1]);
1012 HVD_EX_Drv_Ctrl *pDrvCtrl_sub = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]);
1013
1014 pDrvCtrl_sub->u32StepDecodeCnt = 0;
1015 pDrvCtrl_sub->u32LastESRptr = 0;
1016 pDrvCtrl_sub->u32BBUPacketCnt = 0;
1017 pDrvCtrl_sub->u32BBUWptr_Fired = 0;
1018 pDrvCtrl_sub->u32LastErrCode = 0;
1019 pDrvCtrl_sub->bIsDispInfoChg = 0;
1020
1021 memset((void *) &(pDrvCtrl_sub->LastNal), 0, sizeof(HVD_Nal_Entry));
1022
1023 pDrvCtrl_sub->bNoDrvProccBuf = pCtrl->bNoDrvProccBuf;
1024 pDrvCtrl_sub->bAutoRmLastZeroByte = pCtrl->bAutoRmLastZeroByte;
1025 pDrvCtrl_sub->bCannotAccessMIU256 = pCtrl->bCannotAccessMIU256;
1026 pDrvCtrl_sub->u32CmdTimeout = pCtrl->u32CmdTimeout;
1027 pDrvCtrl_sub->u32CtrlMode = pCtrl->u32CtrlMode;
1028 pDrvCtrl_sub->u32DummyWriteBuf = pCtrl->u32DummyWriteBuf;
1029 pDrvCtrl_sub->u32NULLPacketSize = pCtrl->u32NULLPacketSize;
1030 pDrvCtrl_sub->u32NULLPacketAddr = pCtrl->u32NULLPacketAddr;
1031 }
1032 #endif
1033 // Init HAL variables
1034 return (HVD_EX_Result) HAL_HVD_EX_InitVariables(u32Id);
1035 }
1036
1037 //-----------------------------------------------------------------------------
1038 /// @brief \b Function \b Name: _HVD_EX_SetSyncMode()
1039 /// @brief \b Function \b Description: specify the way to sync video time stamp and STC.
1040 /// @param -eMode \b IN : sync type
1041 /// @param -u32Arg \b IN : only work under (eMode == E_HVD_EX_SYNC_ATS) , video delay toward Audio time stamp. It's minimun value is 0, and maximun value is 4500 ( unit:ms)
1042 /// @return -The result of command set sync type
1043 //-----------------------------------------------------------------------------
_HVD_EX_SetSyncMode(MS_U32 u32Id,HVD_Sync_Tbl_Type eMode)1044 static HVD_EX_Result _HVD_EX_SetSyncMode(MS_U32 u32Id, HVD_Sync_Tbl_Type eMode)
1045 {
1046 HVD_EX_Result eRet = E_HVD_EX_OK;
1047 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1048
1049 _DRV_HVD_EX_Entry(u8DrvId);
1050
1051 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_TYPE, eMode);
1052
1053 _DRV_HVD_EX_RET(u8DrvId, eRet);
1054 }
1055
_HVD_EX_InitFW_AVC(MS_U32 u32Id)1056 static HVD_EX_Result _HVD_EX_InitFW_AVC(MS_U32 u32Id)
1057 {
1058 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1059 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1060 MS_U32 u32InitMode = pCtrl->InitParams.u32ModeFlag;
1061
1062 // common settings
1063 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1064 {
1065 _HVD_EX_SetSyncMode(u32Id, (HVD_Sync_Tbl_Type) pCtrl->InitParams.u8SyncType);
1066
1067 if (pCtrl->InitParams.u8MinFrmGap)
1068 {
1069 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_MIN_FRAME_GAP, pCtrl->InitParams.u8MinFrmGap);
1070 }
1071
1072 if (pCtrl->InitParams.u32MaxDecTick)
1073 {
1074 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_MAX_DEC_TICK, pCtrl->InitParams.u32MaxDecTick);
1075 }
1076
1077 if (pCtrl->InitParams.u16Pitch)
1078 {
1079 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PITCH, pCtrl->InitParams.u16Pitch);
1080 }
1081
1082 if (pCtrl->InitParams.bSyncEachFrm)
1083 {
1084 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_EACH_FRM, TRUE);
1085 }
1086
1087 if (pCtrl->InitParams.bFastDisplay)
1088 {
1089 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FAST_DISP, TRUE);
1090 }
1091
1092 if (pCtrl->InitParams.bDynamicScaling)
1093 {
1094 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE, TRUE);
1095 }
1096
1097 if (pCtrl->InitParams.bUserData)
1098 {
1099 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DPO_CC, TRUE);
1100 }
1101 }
1102
1103 if (pCtrl->InitParams.u8TimeUnit)
1104 {
1105 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_TIME_UNIT_TYPE, pCtrl->InitParams.u8TimeUnit);
1106 }
1107
1108 // specific settings
1109 switch (u32InitMode & HVD_INIT_MAIN_MASK)
1110 {
1111 case HVD_INIT_MAIN_FILE_RAW:
1112 {
1113 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_VDEAD, TRUE);
1114 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, TRUE);
1115 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1116
1117 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1118 {
1119 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
1120 }
1121
1122 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PARSER_BYPASS, TRUE);
1123 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_GET_MORE_FRM_BUF, TRUE);
1124
1125 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, TRUE);
1126 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, TRUE);
1127 break;
1128 }
1129 case HVD_INIT_MAIN_FILE_TS:
1130 {
1131 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_VDEAD, TRUE);
1132 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, TRUE);
1133 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1134
1135 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1136 {
1137 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
1138 }
1139
1140 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, TRUE);
1141 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVOID_PTS_TBL_OVERFLOW, TRUE);
1142
1143 if((u32InitMode & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
1144 {
1145 HAL_HVD_EX_SpareBandwidth(u32Id); //// For MVC
1146 }
1147 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, TRUE);
1148 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, TRUE);
1149 break;
1150 }
1151 case HVD_INIT_MAIN_LIVE_STREAM:
1152 {
1153 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, TRUE);
1154 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1155
1156 if (pCtrl->InitParams.u8TimeUnit)
1157 {
1158 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32) HVD_DTV_VIDEO_DELAY);
1159 }
1160 else
1161 {
1162 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32) HVD_DTV_VIDEO_DELAY * 90);
1163 }
1164
1165 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, TRUE);
1166
1167 break;
1168 }
1169 default:
1170 break;
1171 }
1172
1173 return E_HVD_EX_OK;
1174 }
1175
_HVD_EX_InitFW_RM(MS_U32 u32Id)1176 static HVD_EX_Result _HVD_EX_InitFW_RM(MS_U32 u32Id)
1177 {
1178 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1179 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1180 MS_U32 u32InitMode = pCtrl->InitParams.u32ModeFlag;
1181
1182 // common settings
1183 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1184 {
1185 _HVD_EX_SetSyncMode(u32Id, (HVD_Sync_Tbl_Type) pCtrl->InitParams.u8SyncType);
1186
1187 if (pCtrl->InitParams.u16Pitch)
1188 {
1189 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PITCH, pCtrl->InitParams.u16Pitch);
1190 }
1191
1192 if (pCtrl->InitParams.bSyncEachFrm)
1193 {
1194 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_EACH_FRM, TRUE);
1195 }
1196
1197 if (pCtrl->InitParams.bFastDisplay)
1198 {
1199 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FAST_DISP, TRUE);
1200 }
1201
1202 if (pCtrl->InitParams.bDynamicScaling)
1203 {
1204 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE, TRUE);
1205 }
1206 }
1207
1208 if (pCtrl->InitParams.u8TimeUnit)
1209 {
1210 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_TIME_UNIT_TYPE, pCtrl->InitParams.u8TimeUnit);
1211 }
1212 // specific settings
1213 switch (u32InitMode & HVD_INIT_MAIN_MASK)
1214 {
1215 case HVD_INIT_MAIN_FILE_RAW:
1216 break;
1217 case HVD_INIT_MAIN_FILE_TS:
1218 case HVD_INIT_MAIN_LIVE_STREAM:
1219 default:
1220 break;
1221 }
1222
1223 // fix FFx4 display error
1224 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1225
1226 return E_HVD_EX_OK;
1227 }
1228
_HVD_EX_CheckFWVersion(MS_U32 u32Id)1229 static HVD_EX_Result _HVD_EX_CheckFWVersion(MS_U32 u32Id)
1230 {
1231 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1232 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1233
1234 // check FW version ID
1235 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_CHECK))
1236 {
1237 if ((HVD_FW_IF_VERSION >> 16) != (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_IF_VERSION_ID) >> 16))
1238 {
1239 HVD_EX_MSG_ERR("fw interface and binary is not the same. fw ID: interface:%x binary:%lx\n",
1240 (MS_U32) HVD_FW_IF_VERSION, (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_IF_VERSION_ID));
1241 return E_HVD_EX_FAIL;
1242 }
1243 }
1244
1245 return E_HVD_EX_OK;
1246 }
1247
_HVD_EX_InitFW(MS_U32 u32Id)1248 static HVD_EX_Result _HVD_EX_InitFW(MS_U32 u32Id)
1249 {
1250 HVD_EX_Result eRet = E_HVD_EX_OK;
1251 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1252
1253 eRet = _HVD_EX_CheckFWVersion(u32Id);
1254
1255 if (eRet != E_HVD_EX_OK)
1256 {
1257 return eRet;
1258 }
1259
1260 switch (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK)
1261 {
1262 case HVD_INIT_HW_AVC:
1263 case HVD_INIT_HW_AVS:
1264 case HVD_INIT_HW_MVC:
1265 #if SUPPORT_EVD
1266 case HVD_INIT_HW_VP9: // MStar VP9 or G2 VP9
1267 case HVD_INIT_HW_HEVC:
1268 case HVD_INIT_HW_HEVC_DV:
1269 #endif
1270 eRet = _HVD_EX_InitFW_AVC(u32Id);
1271 break;
1272 case HVD_INIT_HW_RM:
1273 eRet = _HVD_EX_InitFW_RM(u32Id);
1274 break;
1275 default:
1276 break;
1277 }
1278
1279 HAL_HVD_EX_PowerSaving(u32Id);
1280
1281 return eRet;
1282 }
1283
_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id,MS_BOOL bFlush)1284 static MS_BOOL _HVD_EX_IsAllBufferEmpty(MS_U32 u32Id, MS_BOOL bFlush)
1285 {
1286 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1287 MS_U32 u32PlaybackType = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
1288 MS_BOOL bCondition;
1289 #ifndef VDEC3
1290 MS_U32 u32FwIdleThreshold = 5000;
1291 #endif
1292 //MS_U32 u8DispCntThreshold = 0;
1293 if (u32PlaybackType == HVD_INIT_MAIN_FILE_RAW)
1294 {
1295 #ifdef VDEC3
1296 MS_VIRT u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
1297 if (!HAL_VPU_EX_IsVBBUEmpty(u32VBBUAddr))
1298 #else
1299 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) != 0)
1300 #endif
1301 {
1302 return FALSE;
1303 }
1304 }
1305 else //if( u32PlaybackType == HVD_INIT_MAIN_FILE_TS ) TSP input
1306 {
1307 #if 0
1308 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR) != HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR))
1309 {
1310 return FALSE;
1311 }
1312 #endif
1313 }
1314 #ifndef VDEC3
1315 if(_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE))
1316 #endif
1317 {
1318 #ifdef VDEC3
1319 bCondition = (bFlush)? (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE):
1320 (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE || HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_PLAYBACK_FINISH));
1321
1322 if (bCondition && (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0) && HAL_HVD_EX_DispFrameAllViewed(u32Id))
1323 #else // VDEC3
1324 if ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0 && HAL_HVD_EX_DispFrameAllViewed(u32Id)) &&
1325 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold)||((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) )))
1326 #endif // VDEC3
1327 {
1328 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1329
1330 return TRUE;
1331 }
1332
1333 return FALSE;
1334 }
1335 #ifndef VDEC3
1336 //other Queues
1337 //LOGD("R: %d %d %d", HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT));
1338 if (((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0) && (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB) == u8DispCntThreshold)) &&
1339 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold)||((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) )))
1340 {
1341 //HVD_PRINT("Flush success, flush_status: %d !!!\n",HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS));
1342 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1343
1344 return TRUE;
1345 }
1346 else
1347 {
1348 return FALSE;
1349 }
1350 #endif
1351 }
1352
1353 #ifndef VDEC3
_HVD_EX_IsAllBufferEmpty_VP8(MS_U32 u32Id)1354 static MS_BOOL _HVD_EX_IsAllBufferEmpty_VP8(MS_U32 u32Id)
1355 {
1356 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1357 MS_U32 u32PlaybackType = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
1358 MS_U32 u32FwIdleThreshold = 5000;
1359 MS_U32 u8DispCntThreshold = 0;
1360
1361 if (u32PlaybackType == HVD_INIT_MAIN_FILE_RAW)
1362 {
1363 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) != 0)
1364 {
1365 return FALSE;
1366 }
1367 }
1368
1369 #if 0
1370 if(_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE))
1371 {
1372 u32FwIdleThreshold = 5;
1373 }
1374 #endif
1375 if(_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE))
1376 {
1377 if ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR) == HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR) && HAL_HVD_EX_DispFrameAllViewed(u32Id)) &&
1378 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold)||((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) )))
1379 {
1380 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1381
1382 return TRUE;
1383 }
1384
1385 return FALSE;
1386 }
1387 // other Queues
1388 if (((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0) && (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB) == u8DispCntThreshold)) &&
1389 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold) || (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) ))
1390 {
1391 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1392 return TRUE;
1393 }
1394 else
1395 {
1396 return FALSE;
1397 }
1398 }
1399 #endif
1400
1401 #if defined(REDLION_LINUX_KERNEL_ENVI)
_HVD_EX_ISRHandler(void)1402 static MS_S32 _HVD_EX_ISRHandler(void)
1403 {
1404 if (gHVDISRCtrl.pfnISRCallBack != NULL)
1405 {
1406 gHVDISRCtrl.bInISR = TRUE;
1407 gHVDISRCtrl.u32ISRInfo = HAL_HVD_EX_GetData(E_HVD_GDATA_HVD_ISR_STATUS);
1408
1409 if (gHVDISRCtrl.u32ISRInfo)
1410 {
1411 HAL_HVD_EX_EnableISR(FALSE);
1412 gHVDISRCtrl.pfnISRCallBack();
1413 HAL_HVD_EX_EnableISR(TRUE);
1414 }
1415 }
1416 else
1417 {
1418 HVD_EX_MSG_DBG("ISR callback is NULL.\n");
1419 }
1420
1421 gHVDISRCtrl.bInISR = FALSE;
1422 HAL_HVD_EX_SetClearISR();
1423 if(TRUE == OSAL_HVD_ISR_Enable())//enable cpu interrupt mask
1424 {
1425 _bHVDDisableISRFlag = FALSE;
1426 }
1427 return 1;
1428 }
1429 #else
_HVD_EX_ISRHandler(void)1430 static void _HVD_EX_ISRHandler(void)
1431 {
1432 MS_U8 u8Idx;
1433 HVD_ISRCallBack pfnCb = NULL;
1434 // MS_U32 u32tempIdx = 0;
1435
1436 //we can attach only one ISR, so we need to check the INT is from which decoder.
1437 for (u8Idx = 0; u8Idx < HVD_MAX_STREAMS; u8Idx++)
1438 {
1439
1440 if(pHVDDrvContext->gHVDCtrl_EX[u8Idx].bUsed == FALSE)
1441 {
1442 continue;
1443 }
1444
1445 if(pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.eHWDecIsr != E_HWDEC_ISR_HVD)
1446 {
1447 continue;
1448 }
1449
1450 pfnCb = pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.pfnISRCallBack;
1451
1452 if (pfnCb)
1453 {
1454 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = TRUE;
1455 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo =
1456 HAL_HVD_EX_GetData(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, E_HVD_GDATA_HVD_ISR_STATUS);
1457
1458 if (pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo)
1459 {
1460 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, FALSE);
1461 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1462 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, TRUE);
1463 }
1464 }
1465 else
1466 {
1467 HVD_EX_MSG_DBG("ISR callback is NULL.\n");
1468 }
1469
1470 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = FALSE;
1471
1472 }
1473
1474 HAL_HVD_EX_SetClearISR(E_HWDEC_ISR_HVD);
1475 OSAL_HVD_ISR_Enable(E_HWDEC_ISR_HVD);
1476 }
1477
_EVD_EX_ISRHandler(void)1478 static void _EVD_EX_ISRHandler(void)
1479 {
1480 MS_U8 u8Idx;
1481 HVD_ISRCallBack pfnCb = NULL;
1482
1483
1484 //we can attach only one ISR, so we need to check the INT is from which decoder.
1485 for (u8Idx = 0; u8Idx < HVD_MAX_STREAMS; u8Idx++)
1486 {
1487 if(pHVDDrvContext->gHVDCtrl_EX[u8Idx].bUsed == FALSE)
1488 {
1489 continue;
1490 }
1491
1492 if(pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.eHWDecIsr != E_HWDEC_ISR_EVD)
1493 {
1494 continue;
1495 }
1496
1497 pfnCb = pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.pfnISRCallBack;
1498
1499 if (pfnCb)
1500 {
1501 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = TRUE;
1502 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo =
1503 HAL_HVD_EX_GetData(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, E_HVD_GDATA_HVD_ISR_STATUS);
1504
1505 if (pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo)
1506 {
1507 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, FALSE);
1508 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1509 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, TRUE);
1510 }
1511
1512 }
1513 else
1514 {
1515 HVD_EX_MSG_DBG("ISR callback is NULL.\n");
1516 }
1517
1518 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = FALSE;
1519 }
1520
1521
1522 HAL_HVD_EX_SetClearISR(E_HWDEC_ISR_EVD);
1523 OSAL_HVD_ISR_Enable(E_HWDEC_ISR_EVD);
1524 }
1525
1526 #endif
1527
_HVD_EX_RecoverySettings(MS_U32 u32Id)1528 HVD_EX_Result _HVD_EX_RecoverySettings(MS_U32 u32Id)
1529 {
1530 // TODO: complete this function. and consider more cases. step decoder, display?
1531 HVD_EX_Result eRst = E_HVD_EX_OK;
1532 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1533 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1534
1535 switch (pCtrl->InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK)
1536 {
1537 case HVD_INIT_MAIN_LIVE_STREAM:
1538 {
1539 // temp solution
1540 // must before play().
1541 if ((pCtrl->Settings.DispInfoTH.u32FrmrateLowBound != 0) ||
1542 (pCtrl->Settings.DispInfoTH.u32FrmrateUpBound != 0) ||
1543 (pCtrl->Settings.DispInfoTH.u32MvopLowBound != 0) || (pCtrl->Settings.DispInfoTH.u32MvopUpBound != 0))
1544 {
1545 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISP_INFO_TH, (MS_VIRT) (&pCtrl->Settings.DispInfoTH));
1546 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
1547 }
1548
1549 if (pCtrl->Settings.u32IsrEvent)
1550 {
1551 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, pCtrl->Settings.u32IsrEvent);
1552 }
1553
1554 #if defined(HAL_CHIP_SUPPORT_EVD)
1555 HAL_HVD_EX_EnableISR(u32Id, pCtrl->Settings.bEnISR);
1556 #else
1557 HAL_HVD_EX_EnableISR(pCtrl->Settings.bEnISR);
1558 #endif
1559 // play()
1560 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
1561
1562 if (pCtrl->Settings.u8SkipMode)
1563 {
1564 if (E_HVD_EX_OK != (eRst = MDrv_HVD_EX_SetSkipDecMode(u32Id, (HVD_EX_SkipDecode) (pCtrl->Settings.u8SkipMode))))
1565 {
1566 HVD_EX_MSG_ERR("Set Skip Mode fail!!.\n");
1567 return eRst;
1568 }
1569 }
1570
1571 if (pCtrl->Settings.bIsShowErrFrm)
1572 {
1573 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ERR_FRM, TRUE);
1574 }
1575
1576 if (pCtrl->Settings.u8FrcMode)
1577 {
1578 if (E_HVD_EX_OK != (eRst = MDrv_HVD_EX_SetFrcMode(u8DrvId, (HVD_EX_FrmRateConvMode) (pCtrl->Settings.u8FrcMode))))
1579 {
1580 HVD_EX_MSG_ERR("Set Frc Mode fail!!.\n");
1581 return eRst;
1582 }
1583 }
1584
1585 if (pCtrl->Settings.bIsErrConceal)
1586 {
1587 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ERR_CONCEAL, TRUE);
1588 }
1589
1590 if (pCtrl->Settings.bAutoFreeES)
1591 {
1592 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AUTO_FREE_ES, TRUE);
1593 }
1594
1595 if (pCtrl->Settings.bDisDeblocking)
1596 {
1597 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_DBF, TRUE);
1598 }
1599
1600 if (pCtrl->Settings.bDisQuarterPixel)
1601 {
1602 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_QUART_PIXEL, TRUE);
1603 }
1604
1605 if (pCtrl->Settings.bIsSyncOn)
1606 {
1607 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_ACTIVE, TRUE);
1608 }
1609
1610 if (pCtrl->Settings.u32SyncTolerance)
1611 {
1612 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_TOLERANCE, pCtrl->Settings.u32SyncTolerance);
1613 }
1614
1615 if (pCtrl->Settings.u32SyncRepeatTH)
1616 {
1617 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_THRESHOLD, pCtrl->Settings.u32SyncRepeatTH);
1618 }
1619
1620 if (pCtrl->Settings.u32SyncVideoDelay)
1621 {
1622 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, pCtrl->Settings.u32SyncVideoDelay);
1623 }
1624
1625 if (pCtrl->Settings.u32SyncFreeRunTH)
1626 {
1627 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FREERUN_THRESHOLD, pCtrl->Settings.u32SyncFreeRunTH);
1628 }
1629
1630 if (E_HVD_BURST_CNT_DISABLE != (HVD_MIU_Burst_Cnt_Ctrl) pCtrl->Settings.u32MiuBurstLevel)
1631 {
1632 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_MIU_BURST_CNT, pCtrl->Settings.u32MiuBurstLevel);
1633 }
1634
1635 //HAL_HVD_EX_SetCmd(E_HVD_CMD_BLUE_SCREEN, FALSE);
1636 pCtrl->bStepDecoding = 0;
1637
1638 break;
1639 }
1640 case HVD_INIT_MAIN_FILE_RAW:
1641 default:
1642 pCtrl->bStepDecoding = 0;
1643 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
1644 break;
1645 }
1646
1647 return eRst;
1648 }
1649
MDrv_HVD_checkISR(MS_U32 u32Id,MS_U8 u8DrvId,HWDEC_ISR_TYPE hwdec_Isr_type)1650 MS_BOOL MDrv_HVD_checkISR(MS_U32 u32Id, MS_U8 u8DrvId, HWDEC_ISR_TYPE hwdec_Isr_type)
1651 {
1652 MS_U8 i = 0;
1653 MS_BOOL bUsed = FALSE;
1654 UNUSED(u32Id);
1655 for(i = 0; i < HVD_MAX_STREAMS; i++)
1656 {
1657 if(i != u8DrvId)
1658 {
1659 if((hwdec_Isr_type == pHVDDrvContext->gHVDCtrl_EX[i].HVDISRCtrl.eHWDecIsr)
1660 && (TRUE == pHVDDrvContext->gHVDCtrl_EX[i].bUsed))
1661 {
1662 bUsed = TRUE;
1663 break;
1664 }
1665 }
1666 }
1667
1668 return bUsed;
1669 }
1670
_HVD_EX_Rst(MS_U32 u32Id,MS_BOOL bErrHandle)1671 HVD_EX_Result _HVD_EX_Rst(MS_U32 u32Id, MS_BOOL bErrHandle)
1672 {
1673 HVD_EX_Result eRst = E_HVD_EX_RET_ILLEGAL_ACCESS;
1674 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1675 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1676
1677 if (bErrHandle == TRUE)
1678 {
1679 HVD_EX_MSG_ERR("HVD Not supported reset(TRUE) yet\n");
1680 return E_HVD_EX_RET_INVALID_PARAMETER;
1681 }
1682
1683 pHVDDrvContext->bHVDIsIniting[u8DrvId] = TRUE;
1684
1685 #if (defined(CHIP_NAPOLI))
1686 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM)
1687 {
1688 if(!HAL_HVD_EX_Is_RM_Supported(u32Id))
1689 return E_HVD_EX_RET_UNSUPPORTED;
1690 }
1691 #endif
1692
1693 // disable ISR when there is no one using ISR
1694 #if defined(HAL_CHIP_SUPPORT_EVD)
1695 MS_BOOL bUsed;
1696 if (((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC) ||
1697 ((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC_DV))
1698 {
1699 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_EVD);
1700 }
1701 else
1702 {
1703 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_HVD);
1704 }
1705 if (bUsed == FALSE)
1706 HAL_HVD_EX_EnableISR(u32Id, FALSE);
1707 #else
1708 HAL_HVD_EX_EnableISR(FALSE);
1709 #endif
1710
1711 #if HVD_ENABLE_TIME_MEASURE
1712 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1713 #endif
1714
1715 eRst = _HVD_EX_RstVariables(u32Id);
1716
1717 if (eRst != E_HVD_EX_OK)
1718 {
1719 goto DRV_HVD_Rst_Failed;
1720 }
1721
1722 #if HVD_ENABLE_TIME_MEASURE
1723 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1724 #endif
1725
1726 #ifdef VDEC3
1727 eRst = (HVD_EX_Result) HAL_HVD_EX_InitShareMem(u32Id, pHVDDrvContext->bFWdecideFB, pHVDDrvContext->bCMAUsed);
1728 #else
1729 eRst = (HVD_EX_Result) HAL_HVD_EX_InitShareMem(u32Id);
1730 #endif
1731
1732 if (E_HVD_EX_OK != eRst)
1733 {
1734 goto DRV_HVD_Rst_Failed;
1735 }
1736
1737 #if HVD_ENABLE_TIME_MEASURE
1738 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1739 #endif
1740 #ifdef VDEC3
1741 eRst = _HVD_EX_InitRegCPU(u32Id,pHVDDrvContext->bFWdecideFB);
1742 #else
1743 eRst = _HVD_EX_InitRegCPU(u32Id);
1744 #endif
1745 if (eRst != E_HVD_EX_OK)
1746 {
1747 goto DRV_HVD_Rst_Failed;
1748 }
1749
1750 #if HVD_ENABLE_TIME_MEASURE
1751 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1752 #endif
1753
1754 eRst = _HVD_EX_InitFW(u32Id);
1755
1756 if (eRst != E_HVD_EX_OK)
1757 {
1758 goto DRV_HVD_Rst_Failed;
1759 }
1760
1761 eRst = E_HVD_EX_OK;
1762
1763 DRV_HVD_Rst_Failed:
1764 // disable ISR when there is no one using ISR
1765 #if defined(HAL_CHIP_SUPPORT_EVD)
1766 bUsed = FALSE;
1767 if (((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC) ||
1768 ((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC_DV))
1769 {
1770 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_EVD);
1771 }
1772 else
1773 {
1774 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_HVD);
1775 }
1776 if (bUsed == FALSE)
1777 HAL_HVD_EX_EnableISR(u32Id, FALSE);
1778 #else
1779 HAL_HVD_EX_EnableISR(pCtrl->Settings.bEnISR);
1780 #endif
1781 pHVDDrvContext->bHVDIsIniting[u8DrvId] = FALSE;
1782
1783 #if defined(SUPPORT_CMA)
1784 if (pHVDDrvContext->bCMAUsed)
1785 {
1786 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_CMA_USED, 1);
1787 /*if (((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_HEVC) ||
1788 ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP9))
1789 {
1790 pHVDDrvContext->bCMATwoMIU[u8DrvId] = 1;
1791 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_CMA_TWO_MIU, 1);
1792
1793 HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FB2ADDR, pHVDDrvContext->cmaInitParam[1].heap_miu_start_offset);
1794 HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FB2SIZE, pHVDDrvContext->cmaInitParam[1].heap_length);
1795 }
1796 else
1797 {
1798 pHVDDrvContext->bCMATwoMIU[u8DrvId] = 0;
1799 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_CMA_TWO_MIU, 0);
1800 }*/
1801
1802 HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FBADDR, pHVDDrvContext->cmaInitParam[0].heap_miu_start_offset);
1803 HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FBSIZE, pHVDDrvContext->cmaInitParam[0].heap_length);
1804 }
1805 #endif
1806 return eRst;
1807 }
1808
_HVD_EX_GetDrvId(MS_U32 u32Id)1809 static MS_U8 _HVD_EX_GetDrvId(MS_U32 u32Id)
1810 {
1811 return (0xFF & (u32Id >> 16));
1812 }
1813
_HVD_EX_GetDispInfo(MS_U32 u32Id,HVD_EX_DispInfo * pInfo,MS_BOOL bClearSeqChg)1814 static HVD_EX_Result _HVD_EX_GetDispInfo(MS_U32 u32Id, HVD_EX_DispInfo *pInfo, MS_BOOL bClearSeqChg)
1815 {
1816 MS_U32 u32Seqtimes = 10;
1817 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
1818 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1819 MS_VIRT u32DispInfoAddr = 0;
1820
1821 HVD_EX_MSG_TRACE();
1822 _DRV_HVD_Inited(u8DrvId,eRet);
1823
1824 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
1825 {
1826 if (MDrv_HVD_EX_CheckDispInfoRdy(u32Id) == E_HVD_EX_RET_NOTREADY)
1827 {
1828 return E_HVD_EX_RET_NOTREADY;
1829 }
1830 }
1831
1832 if (pInfo == NULL)
1833 {
1834 return E_HVD_EX_RET_INVALID_PARAMETER;
1835 }
1836
1837 _DRV_HVD_EX_Entry(u8DrvId);
1838
1839 if (TRUE == bClearSeqChg)
1840 {
1841 HVD_GETDISPINFO_START:
1842 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_GET_DISP_INFO_START, 0);
1843 u32DispInfoAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_INFO_ADDR);
1844 if(u32DispInfoAddr == 0)
1845 {
1846 return E_HVD_EX_RET_NOTREADY;
1847 }
1848 HVD_memcpy((void *) pInfo, (void *) u32DispInfoAddr, sizeof(HVD_Display_Info));
1849 //Check if another SeqChg occurs
1850 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_UNCOPYED))
1851 {
1852 u32Seqtimes--;
1853 if (u32Seqtimes > 0)
1854 {
1855 goto HVD_GETDISPINFO_START;
1856 }
1857 else
1858 {
1859 HVD_EX_MSG_ERR("GetDispInfo Timeout:%d\n",
1860 (MS_S16) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_UNCOPYED));
1861 _DRV_HVD_EX_RET(u8DrvId, E_HVD_EX_RET_TIMEOUT);
1862 }
1863 }
1864 }
1865 else
1866 {
1867 u32DispInfoAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_INFO_ADDR);
1868 if(u32DispInfoAddr == 0)
1869 {
1870 return E_HVD_EX_RET_NOTREADY;
1871 }
1872 HVD_memcpy((void *) pInfo, (void *)u32DispInfoAddr, sizeof(HVD_Display_Info));
1873 }
1874
1875 eRet = E_HVD_EX_OK;
1876
1877 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg)
1878 {
1879 HVD_EX_MSG_DBG("u32FrameRate=%u, u8Interlace=%x, u16HorSize=%u, u16VerSize=%u, \
1880 u16Crop R/L=%u/%u, u16Crop B/T=%u/%u, u8AspectRate=%u, u16SarWidth=%u \
1881 u16SarHeight=%u, u16Pitch=%u, u8ColourPrimaries=%u\n",
1882 pInfo->u32FrameRate,
1883 pInfo->u8Interlace,
1884 pInfo->u16HorSize,
1885 pInfo->u16VerSize,
1886 pInfo->u16CropRight, pInfo->u16CropLeft,
1887 pInfo->u16CropBottom, pInfo->u16CropTop,
1888 pInfo->u8AspectRate,
1889 pInfo->u16SarWidth,
1890 pInfo->u16SarHeight,
1891 pInfo->u16Pitch,
1892 pInfo->u8ColourPrimaries);
1893 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = FALSE;
1894 }
1895
1896 _DRV_HVD_EX_RET(u8DrvId, eRet);
1897 }
1898
_HVD_EX_ReportLow32BitPTS(MS_U32 u32Id,MS_U32 u32PTS)1899 static MS_U32 _HVD_EX_ReportLow32BitPTS(MS_U32 u32Id, MS_U32 u32PTS)
1900 {
1901 MS_U32 u32RetPTS = u32PTS;
1902 MS_U32 u32UpperInMs = (HVD_U32_MAX/90);
1903 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1904 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1905
1906 if(u32RetPTS != HVD_U32_MAX)
1907 {
1908 if (pCtrl->InitParams.u8TimeUnit)
1909 {
1910 //unit: ms
1911 if (u32RetPTS > u32UpperInMs)
1912 {
1913 u32RetPTS = u32RetPTS - u32UpperInMs;
1914 }
1915 }
1916 else
1917 {
1918 //unit: 90KHz, bit 33 is not included in u32PTS, no need to handle
1919 }
1920 }
1921 return u32RetPTS;
1922 }
1923
_HVD_EX_Map2HVDErrCode(MS_U32 u32ErrCode)1924 static MS_U32 _HVD_EX_Map2HVDErrCode(MS_U32 u32ErrCode)
1925 {
1926
1927 MS_U32 u32Ret=E_HVD_EX_ERRCODE_GENERAL_BASE;
1928
1929
1930 switch (u32ErrCode)
1931 {
1932 case E_HVD_ERR_OUT_OF_SPEC:
1933 u32Ret = E_HVD_EX_ERRCODE_OUT_OF_SPEC;
1934 break;
1935 case E_HVD_ERR_UNKNOW_ERR:
1936 u32Ret = E_HVD_EX_ERRCODE_UNKNOW_ERR;
1937 break;
1938 case E_HVD_ERR_HW_BREAK_DOWN:
1939 u32Ret = E_HVD_EX_ERRCODE_HW_BREAK_DOWN;
1940 break;
1941 case E_HVD_ERR_HW_DEC_TIMEOUT:
1942 u32Ret = E_HVD_EX_ERRCODE_HW_DEC_TIMEOUT;
1943 break;
1944 case E_HVD_ERR_OUT_OF_MEMORY:
1945 case E_HVD_ERR_CMA_FAILED:
1946 u32Ret = E_HVD_EX_ERRCODE_OUT_OF_MEMORY;
1947 break;
1948 case E_HVD_ERR_UNKNOWN_CODEC:
1949 u32Ret = E_HVD_EX_ERRCODE_UNKNOWN_CODEC;
1950 break;
1951 case E_HVD_ERR_RES_NOT_SUPPORT:
1952 u32Ret = E_HVD_EX_ERRCODE_RES_NOT_SUPPORT;
1953 break;
1954 case E_HVD_ERR_AVC_SPS_BROKEN:
1955 u32Ret = E_HVD_EX_ERRCODE_AVC_SPS_BROKEN;
1956 break;
1957 case E_HVD_ERR_AVC_SPS_NOT_IN_SPEC:
1958 u32Ret = E_HVD_EX_ERRCODE_AVC_SPS_NOT_IN_SPEC;
1959 break;
1960 case E_HVD_ERR_AVC_SPS_NOT_ENOUGH_FRM:
1961 u32Ret = E_HVD_EX_ERRCODE_AVC_SPS_NOT_ENOUGH_FRM;
1962 break;
1963 case E_HVD_ERR_AVC_PPS_BROKEN:
1964 u32Ret = E_HVD_EX_ERRCODE_AVC_PPS_BROKEN;
1965 break;
1966 case E_HVD_ERR_AVC_REF_LIST:
1967 u32Ret = E_HVD_EX_ERRCODE_AVC_REF_LIST;
1968 break;
1969 case E_HVD_ERR_AVC_NO_REF:
1970 u32Ret = E_HVD_EX_ERRCODE_AVC_NO_REF;
1971 break;
1972 case E_HVD_ERR_AVC_RES:
1973 u32Ret = E_HVD_EX_ERRCODE_AVC_RES;
1974 break;
1975 case E_HVD_ERR_AVS_RES:
1976 u32Ret = E_HVD_EX_ERRCODE_AVS_RES;
1977 break;
1978 case E_HVD_ERR_RM_PACKET_HEADER:
1979 u32Ret = E_HVD_EX_ERRCODE_RM_PACKET_HEADER;
1980 break;
1981 case E_HVD_ERR_RM_FRAME_HEADER:
1982 u32Ret = E_HVD_EX_ERRCODE_RM_FRAME_HEADER;
1983 break;
1984 case E_HVD_ERR_RM_SLICE_HEADER:
1985 u32Ret = E_HVD_EX_ERRCODE_RM_SLICE_HEADER;
1986 break;
1987 case E_HVD_ERR_RM_BYTE_CNT:
1988 u32Ret = E_HVD_EX_ERRCODE_RM_BYTE_CNT;
1989 break;
1990 case E_HVD_ERR_RM_DISP_TIMEOUT:
1991 u32Ret = E_HVD_EX_ERRCODE_RM_DISP_TIMEOUT;
1992 break;
1993 case E_HVD_ERR_RM_NO_REF:
1994 u32Ret = E_HVD_EX_ERRCODE_RM_NO_REF;
1995 break;
1996 case E_HVD_ERR_RM_RES:
1997 u32Ret = E_HVD_EX_ERRCODE_RM_RES;
1998 break;
1999 case E_HVD_ERR_RM_VLC:
2000 u32Ret = E_HVD_EX_ERRCODE_RM_VLC;
2001 break;
2002 case E_HVD_ERR_RM_SIZE_OUT_FB_LAYOUT:
2003 u32Ret = E_HVD_EX_ERRCODE_RM_SIZE_OUT_FB_LAYOUT;
2004 break;
2005 default:
2006 break;
2007 }
2008 return u32Ret;
2009 }
2010
_HVD_EX_Map2HVDESBufStatus(MS_U32 u32ESBufStatus)2011 static MS_U32 _HVD_EX_Map2HVDESBufStatus(MS_U32 u32ESBufStatus)
2012 {
2013
2014 MS_U32 u32Ret = E_HVD_EX_ES_BUF_STATUS_UNKNOWN;
2015
2016
2017 switch (u32ESBufStatus)
2018 {
2019 case E_HVD_ES_BUF_STATUS_UNDERFLOW:
2020 u32Ret = E_HVD_EX_ES_BUF_STATUS_UNDERFLOW;
2021 break;
2022 case E_HVD_ES_BUF_STATUS_OVERFLOW:
2023 u32Ret = E_HVD_EX_ES_BUF_STATUS_OVERFLOW;
2024 break;
2025 case E_HVD_ES_BUF_STATUS_NORMAL:
2026 u32Ret = E_HVD_EX_ES_BUF_STATUS_NORMAL;
2027 break;
2028 default:
2029 break;
2030 }
2031 return u32Ret;
2032 }
2033
_HVD_EX_GetMIUBase(MS_U8 u8DrvId,MS_U32 u32MIU)2034 static MS_U32 _HVD_EX_GetMIUBase(MS_U8 u8DrvId, MS_U32 u32MIU)
2035 {
2036 if (u32MIU == 1)
2037 return pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr;
2038 else if (u32MIU == 2)
2039 return pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU2BaseAddr;
2040 else
2041 return 0;
2042 }
2043
2044 //-------------------------------------------------------------------------------------------------
2045 // Global Functions
2046 //-------------------------------------------------------------------------------------------------
2047
2048 //-----------------------------------------------------------------------------
2049 /// @brief \b Function \b Name: MDrv_HVD_SetOSRegBase()
2050 /// @brief \b Function \b Description: Set system register base
2051 /// @param -u32RegBaseAddr \b IN : system register base
2052 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetOSRegBase(MS_VIRT u32RegBaseAddr)2053 void MDrv_HVD_EX_SetOSRegBase(MS_VIRT u32RegBaseAddr)
2054 {
2055 #if defined (__aarch64__)
2056 HVD_EX_MSG_DBG("u32RiuBaseAddr=%lx\n", u32RegBaseAddr);
2057 #else
2058 HVD_EX_MSG_DBG("u32RiuBaseAddr=%x\n", u32RegBaseAddr);
2059 #endif
2060 HAL_HVD_EX_InitRegBase(u32RegBaseAddr);
2061 }
2062
MDrv_HVD_EX_SetCtrlsBase(MS_U32 u32Id)2063 void MDrv_HVD_EX_SetCtrlsBase(MS_U32 u32Id)
2064 {
2065 // for MJPEG, need to be modified later
2066 MS_U8 u8Offset = HAL_VPU_EX_GetTaskId(u32Id);
2067 UNUSED(u8Offset);
2068 // The Driver Ctrl base should be set with parameter [0]
2069 HAL_HVD_EX_SetDrvCtrlsBase(&(pHVDDrvContext->gHVDCtrl_EX[0]));
2070
2071 }
2072
MDrv_HVD_EX_MJPEG_InitSharemem(MS_U32 u32Id,MS_VIRT u32CodeBufVAddr,MS_BOOL bPreConnEnable,MS_BOOL bConnect,HVD_EX_DISPLAY_PATH eMvopPath,HVD_EX_Original_Stream eStream)2073 void MDrv_HVD_EX_MJPEG_InitSharemem(MS_U32 u32Id, MS_VIRT u32CodeBufVAddr, MS_BOOL bPreConnEnable, MS_BOOL bConnect, HVD_EX_DISPLAY_PATH eMvopPath, HVD_EX_Original_Stream eStream)
2074 {
2075 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2076 HVD_EX_Drv_Ctrl *pCtrl1 = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2077 memset((void *) pCtrl1, 0, sizeof(HVD_EX_Drv_Ctrl));
2078 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufVAddr = u32CodeBufVAddr;
2079 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr = MS_VA2PA(u32CodeBufVAddr);
2080 pHVDDrvContext->bHVDIsInited[u8DrvId] = TRUE;
2081 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag |= HVD_INIT_HW_MJPEG;
2082 #ifdef VDEC3
2083 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].eStream = (HVD_Original_Stream)eStream;
2084 #endif
2085
2086 HVD_Pre_Ctrl *pCtrl = &(pHVDDrvContext->gHVDPreCtrl[u8DrvId]);
2087
2088 memset((void *) pCtrl, 0, sizeof(HVD_Pre_Ctrl));
2089
2090 // PreSetControl
2091 HAL_HVD_EX_SetPreCtrlVariables(u32Id,(MS_VIRT)(&pHVDDrvContext->gHVDPreCtrl[u8DrvId]));
2092
2093 HVD_EX_MSG_INF("u8DrvId=%d, PA:[0x%lx, 0x%lx], VA:[0x%lx, 0x%lx], [0x%lx]\n", u8DrvId,
2094 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[0].MemMap.u32CodeBufAddr,
2095 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[1].MemMap.u32CodeBufAddr,
2096 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[0].MemMap.u32CodeBufVAddr,
2097 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[1].MemMap.u32CodeBufVAddr,
2098 (unsigned long)HAL_HVD_EX_GetShmAddr(u32Id));
2099
2100 if (bPreConnEnable)
2101 {
2102 MDrv_HVD_EX_PreConnectDispPath(u32Id, bPreConnEnable, bConnect, eMvopPath);
2103 }
2104
2105 #ifdef VDEC3
2106 HAL_HVD_EX_InitShareMem(u32Id, FALSE, pHVDDrvContext->bCMAUsed); // FIXME
2107 #else
2108 HAL_HVD_EX_InitShareMem(u32Id);
2109 #endif
2110
2111 }
2112
MDrv_HVD_EX_MJPEG_Exit(MS_U32 u32Id)2113 void MDrv_HVD_EX_MJPEG_Exit(MS_U32 u32Id)
2114 {
2115 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2116 MS_U8 u8HalIdx = _HVD_EX_GetStreamIdx(u32Id);
2117 pHVDDrvContext->bHVDIsInited[u8DrvId] = FALSE;
2118 HAL_VPU_EX_ReleaseFreeStream(u8HalIdx);
2119
2120 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2121 HAL_HVD_EX_ClearBBUSetting(u32Id, pCtrl->u32BBUId);
2122 }
2123
MDrv_HVD_Init_Share_Mem(void)2124 HVD_EX_Result MDrv_HVD_Init_Share_Mem(void)
2125 {
2126 #if ((defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_LINUX_KERNEL) || defined(MSOS_TYPE_ECOS)) && (!defined(SUPPORT_X_MODEL_FEATURE)))
2127 MS_U32 u32ShmId;
2128 MS_VIRT u32Addr;
2129 MS_U32 u32BufSize;
2130
2131
2132 if (FALSE == MsOS_SHM_GetId( (MS_U8*)"Linux HVD driver",
2133 sizeof(HVD_Drv_CTX),
2134 &u32ShmId,
2135 &u32Addr,
2136 &u32BufSize,
2137 MSOS_SHM_QUERY))
2138 {
2139 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux HVD driver",
2140 sizeof(HVD_Drv_CTX),
2141 &u32ShmId,
2142 &u32Addr,
2143 &u32BufSize,
2144 MSOS_SHM_CREATE))
2145 {
2146 HVD_EX_MSG_ERR("[%s]SHM allocation failed!!!use global structure instead!!!\n",__FUNCTION__);
2147 if(pHVDDrvContext == NULL)
2148 {
2149 pHVDDrvContext = &gHVDDrvContext;
2150 memset(pHVDDrvContext,0,sizeof(HVD_Drv_CTX));
2151 _HVD_EX_Context_Init();
2152 VPRINTF("[%s]Global structure init Success!!!\n",__FUNCTION__);
2153 }
2154 else
2155 {
2156 VPRINTF("[%s]Global structure exists!!!\n",__FUNCTION__);
2157 }
2158 //return E_HVD_EX_FAIL;
2159 }
2160 else
2161 {
2162 memset((MS_U8*)u32Addr,0,sizeof(HVD_Drv_CTX));
2163 pHVDDrvContext = (HVD_Drv_CTX*)u32Addr; // for one process
2164 _HVD_EX_Context_Init();
2165 }
2166 }
2167 else
2168 {
2169 pHVDDrvContext = (HVD_Drv_CTX*)u32Addr; // for another process
2170 }
2171 #else
2172 if(pHVDDrvContext == NULL)
2173 {
2174 pHVDDrvContext = &gHVDDrvContext;
2175 memset(pHVDDrvContext,0,sizeof(HVD_Drv_CTX));
2176 _HVD_EX_Context_Init();
2177 }
2178 #endif
2179
2180 if(HAL_HVD_EX_Init_Share_Mem() != TRUE)
2181 {
2182 return E_HVD_EX_FAIL;
2183 }
2184
2185 HAL_HVD_EX_SetDrvCtrlsBase(&(pHVDDrvContext->gHVDCtrl_EX[0]));
2186
2187 if(HAL_VPU_EX_Init_Share_Mem() != TRUE)
2188 {
2189 return E_HVD_EX_FAIL;
2190 }
2191
2192 return E_HVD_EX_OK;
2193 }
2194
MDrv_HVD_EX_ForceSwRst(void)2195 void MDrv_HVD_EX_ForceSwRst(void)
2196 {
2197 HAL_VPU_EX_ForceSwRst();
2198 }
2199
2200 // Action
MDrv_HVD_EX_GetFreeStream(MS_U32 * pu32Id,HVD_EX_DRV_StreamType eStreamType)2201 HVD_EX_Result MDrv_HVD_EX_GetFreeStream(MS_U32 *pu32Id, HVD_EX_DRV_StreamType eStreamType)
2202 {
2203 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2204 MS_U32 i = 0;
2205 MS_U32 u32VPUStreamId = 0;
2206 MS_U32 u32HVDStreamId = 0;
2207
2208 HVD_EX_MSG_TRACE();
2209 #ifndef VDEC3
2210 //Get drvIdx
2211 switch (eStreamType)
2212 {
2213 case E_HVD_EX_DRV_MAIN_STREAM:
2214 i = 0;
2215 break;
2216 case E_HVD_EX_DRV_SUB_STREAM:
2217 i = 1;
2218 break;
2219 case E_HVD_EX_DRV_MVC_STREAM:
2220 i = 0;
2221 break;
2222 case E_HVD_EX_DRV_STREAM_NONE:
2223 default:
2224 i = HVD_MAX_STREAMS;
2225 break;
2226 }
2227
2228 if (i == HVD_MAX_STREAMS)
2229 {
2230 return E_HVD_EX_FAIL;
2231 }
2232 #endif
2233 if (E_HVD_EX_DRV_MAIN_STREAM == eStreamType)
2234 {
2235 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_MAIN_STREAM);
2236 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_MAIN_STREAM);
2237
2238 if(u32HVDStreamId == E_HAL_HVD_STREAM_NONE)
2239 {
2240 HAL_VPU_EX_ReleaseFreeStream(0);
2241 }
2242
2243 if (u32VPUStreamId && u32HVDStreamId)
2244 {
2245 *pu32Id = (i << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2246 eRet = E_HVD_EX_OK;
2247 }
2248 }
2249 else if (E_HVD_EX_DRV_SUB_STREAM == eStreamType)
2250 {
2251 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_SUB_STREAM);
2252 if(u32VPUStreamId == E_HAL_VPU_STREAM_NONE)
2253 {
2254 return E_HVD_EX_FAIL;
2255 }
2256 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_SUB_STREAM);
2257
2258 if(u32HVDStreamId == E_HAL_HVD_STREAM_NONE)
2259 {
2260 HAL_VPU_EX_ReleaseFreeStream(1);
2261 }
2262
2263 if (u32VPUStreamId && u32HVDStreamId)
2264 {
2265 *pu32Id = (i << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2266 eRet = E_HVD_EX_OK;
2267 }
2268 }
2269 #if HVD_ENABLE_MVC
2270 else if (E_HVD_EX_DRV_MVC_STREAM == eStreamType)
2271 {
2272 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_MVC_STREAM);
2273 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_MVC_STREAM);
2274
2275 if(u32HVDStreamId == E_HAL_HVD_STREAM_NONE)
2276 {
2277 HAL_VPU_EX_ReleaseFreeStream(0);
2278 }
2279
2280 if (u32VPUStreamId && u32HVDStreamId)
2281 {
2282 *pu32Id = (i << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2283 eRet = E_HVD_EX_OK;
2284 }
2285 }
2286 #endif
2287 #ifdef VDEC3
2288 else if ((eStreamType >= E_HVD_EX_DRV_N_STREAM) && (eStreamType < E_HVD_EX_DRV_N_STREAM + HVD_MAX_STREAMS))
2289 {
2290 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_N_STREAM + (eStreamType - E_HVD_EX_DRV_N_STREAM));
2291 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_N_STREAM + (eStreamType - E_HVD_EX_DRV_N_STREAM));
2292
2293 if(u32HVDStreamId == E_HAL_HVD_STREAM_NONE)
2294 {
2295 HAL_VPU_EX_ReleaseFreeStream(eStreamType - E_HVD_EX_DRV_N_STREAM);
2296 }
2297
2298 if (u32VPUStreamId && u32HVDStreamId)
2299 {
2300 *pu32Id = ((u32HVDStreamId & 0x0F) << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2301 eRet = E_HVD_EX_OK;
2302 }
2303 }
2304 #endif
2305 else
2306 {
2307 VPRINTF("%s:%s:Stream type=%d is unexpected\n", __FILE__, __FUNCTION__, eStreamType);
2308 }
2309
2310 return eRet;
2311 }
2312
2313 //-----------------------------------------------------------------------------
2314 /// @brief \b Function \b Name: MDrv_HVD_EX_Init()
2315 /// @brief \b Function \b Description: HVD driver initialization
2316 /// @param -pStMemCfg \b IN : pointer to the memory config of HVD driver
2317 /// @param -pStInitSettings \b IN : Initialization of HVD driver
2318 /// @return -The result of initialization process
2319 //-----------------------------------------------------------------------------
2320 #ifdef VDEC3
MDrv_HVD_EX_Init(MS_U32 u32Id,HVD_EX_MemCfg * pStMemCfg,HVD_EX_InitSettings * pStInitSettings,MS_BOOL bFWdecideFB,MS_BOOL bShareBBU,HVD_EX_Original_Stream eStream)2321 HVD_EX_Result MDrv_HVD_EX_Init(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_EX_InitSettings *pStInitSettings, MS_BOOL bFWdecideFB, MS_BOOL bShareBBU, HVD_EX_Original_Stream eStream)
2322 #else
2323 HVD_EX_Result MDrv_HVD_EX_Init(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_EX_InitSettings *pStInitSettings)
2324 #endif
2325 {
2326 HVD_EX_Result eRet = E_HVD_EX_FAIL;
2327 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2328 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2329
2330 HVD_EX_MSG_TRACE();
2331
2332 #ifdef VDEC3
2333 pHVDDrvContext->bFWdecideFB = bFWdecideFB;
2334 #endif
2335
2336 #if HVD_ENABLE_TIME_MEASURE
2337 pHVDDrvContext->u32InitSysTimeBase[u8DrvId] = HVD_GetSysTime_ms();
2338 #endif
2339
2340 if ((pStMemCfg == NULL) || (pStInitSettings == NULL))
2341 {
2342 HVD_EX_MSG_ERR("Init params are invalid\n");
2343 return E_HVD_EX_RET_INVALID_PARAMETER;
2344 }
2345 #if 0
2346 if(_MDrv_HVD_AUTH_IPCheck(pStInitSettings->u32ModeFlag) == FALSE)
2347 {
2348 HVD_EX_MSG_ERR("[%s]User using invaild key !!!\n",__FUNCTION__);
2349 return E_HVD_EX_RET_INVALID_PARAMETER;
2350 }
2351 #endif
2352 HAL_HVD_EX_SetDrvCtrlsBase(&(pHVDDrvContext->gHVDCtrl_EX[0]));
2353
2354 #if HVD_ENABLE_AUTO_SET_REG_BASE
2355 {
2356 MS_PHY u32NonPMBankSize = 0;
2357 MS_VIRT u32RiuBaseAdd = 0;
2358
2359 if (!MDrv_MMIO_GetBASE(&u32RiuBaseAdd, &u32NonPMBankSize, MS_MODULE_HW))
2360 {
2361 HVD_EX_MSG_ERR("MMIO_GetBASE failure\n");
2362 return eRet;
2363 }
2364 else
2365 {
2366 HVD_EX_MSG_DBG("u32RiuBaseAdd=0x%lx\n", (unsigned long)u32RiuBaseAdd);
2367 HAL_HVD_EX_InitRegBase(u32RiuBaseAdd);
2368 }
2369 #if defined(HAL_CHIP_SUPPORT_EVD)
2370 HAL_HVD_EX_SetHwRegBase(u32Id, pStInitSettings->u32ModeFlag); //HVD or EVD
2371 #endif
2372 }
2373 #endif
2374
2375 HVD_EX_MSG_DBG("system call type: Mutex:%d clock:%d delay:%d asm_sync:%d\n",
2376 HVD_ENABLE_MUTEX_PROTECT, HVD_SYSTEM_CLOCK_TYPE, HVD_SYSTEM_DELAY_MS_TYPE, HVD_MEMORY_BARRIER_TYPE);
2377
2378 if (u32UartCtrl & E_HVD_UART_CTRL_INFO)
2379 {
2380 MS_U32 u32delaytime = 5;
2381 MS_U32 u32FirstTime = HVD_GetSysTime_ms();
2382 MS_U32 u32SecondTime = 0;
2383
2384 HVD_Delay_ms(u32delaytime);
2385 u32SecondTime = HVD_GetSysTime_ms();
2386
2387 HVD_EX_MSG_DBG("MSOS API check: 1st:%u 2nd:%u delay:%u dif:%u\n",
2388 u32FirstTime, u32SecondTime, u32delaytime, u32SecondTime - u32FirstTime);
2389 }
2390
2391 #if HVD_ENABLE_TIME_MEASURE
2392 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2393 #endif
2394
2395 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bUsed)
2396 {
2397 HVD_EX_MSG_ERR("re-init HVD Driver\n");
2398
2399 #if HVD_ENABLE_REINIT_FAILED
2400 eRet = E_HVD_EX_RET_RE_INIT;
2401 return eRet;
2402 #endif
2403 }
2404
2405 // disable ISR when there is no one using ISR
2406 #if defined(HAL_CHIP_SUPPORT_EVD)
2407 MS_BOOL bUsed;
2408 if (((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC) ||
2409 ((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC_DV))
2410 {
2411 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_EVD);
2412 }
2413 else
2414 {
2415 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_HVD);
2416 }
2417 if (bUsed == FALSE)
2418 HAL_HVD_EX_EnableISR(u32Id, FALSE);
2419 #else
2420 HAL_HVD_EX_EnableISR(FALSE);
2421 #endif
2422
2423 // For TEE
2424 _HVD_EX_SetShareInfoAddr(u32Id);
2425
2426 eRet = _HVD_EX_InitVariables(u32Id, pStMemCfg, (HVD_Init_Params *) pStInitSettings);
2427
2428 if (eRet != E_HVD_EX_OK)
2429 {
2430 return eRet;
2431 }
2432
2433 #ifdef VDEC3
2434 pCtrl->bShareBBU = bShareBBU;
2435 pCtrl->eStream = (HVD_Original_Stream)eStream;
2436 /* VPRINTF("[NDec][0x%x][%d] bShareBBU %d, eStream %d \n", u32Id, u8DrvId, bShareBBU, eStream); */
2437 #endif
2438
2439 #if SUPPORT_EVD
2440 if (((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC) ||
2441 ((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC_DV))
2442 {
2443 pCtrl->HVDISRCtrl.eHWDecIsr = E_HWDEC_ISR_EVD;
2444 }
2445 #if SUPPORT_G2VP9
2446 else if((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_VP9)
2447 {
2448 pCtrl->HVDISRCtrl.eHWDecIsr = E_HWDEC_ISR_G2VP9;
2449 }
2450 #endif
2451 #if SUPPORT_MSVP9
2452 else if((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_VP9)
2453 {
2454 pCtrl->HVDISRCtrl.eHWDecIsr = E_HWDEC_ISR_EVD;
2455 }
2456 #endif
2457 else
2458 #endif
2459 {
2460 pCtrl->HVDISRCtrl.eHWDecIsr = E_HWDEC_ISR_HVD;
2461 }
2462
2463
2464 #if HVD_ENABLE_TIME_MEASURE
2465 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2466 #endif
2467
2468 _DRV_HVD_EX_Entry(u8DrvId);
2469
2470 eRet = _HVD_EX_Check_Cmd(u32Id, E_HVD_CHECK_CMD_INIT);
2471
2472 if (eRet != E_HVD_EX_OK)
2473 {
2474 _DRV_HVD_EX_RET(u8DrvId, eRet);
2475 }
2476
2477 #if HVD_ENABLE_TIME_MEASURE
2478 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2479 #endif
2480
2481 #ifdef VDEC3
2482 #if SUPPORT_G2VP9
2483 HAL_VPU_EX_SetBitstreamBufAddress(u32Id, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32TotalBitstreamBufAddr);
2484 #endif
2485
2486 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32BBUId = HAL_HVD_EX_GetBBUId(u32Id);
2487
2488 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32BBUId == HAL_HVD_INVALID_BBU_ID)
2489 {
2490 eRet = E_HVD_EX_FAIL;
2491
2492 HVD_EX_MSG_ERR("driver init failed due to no valid bbu id.\n");
2493
2494 _DRV_HVD_EX_RET(u8DrvId, eRet);
2495 }
2496 #endif
2497
2498 eRet = _HVD_EX_Init_(u32Id,pStInitSettings->u32ModeFlag);
2499
2500 if (eRet != E_HVD_EX_OK)
2501 {
2502 _DRV_HVD_EX_RET(u8DrvId, eRet);
2503 }
2504
2505 #if HVD_ENABLE_TIME_MEASURE
2506 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2507 #endif
2508
2509 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32DummyWriteBuf = MsOS_PA2KSEG1(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DUMMY_WRITE_ADDR));
2510 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
2511 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bUsed = TRUE;
2512 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32Sid = u32Id;
2513 #if HVD_ENABLE_MVC
2514 if((pStInitSettings->u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
2515 {
2516 pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1].u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
2517 pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1].bUsed = TRUE;
2518 pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1].u32Sid = u32Id+0x00011000;
2519 pHVDDrvContext->bHVDIsInited[u8DrvId+1] = TRUE;
2520 }
2521 #endif /// HVD_ENABLE_MVC
2522 pHVDDrvContext->bHVDIsInited[u8DrvId] = TRUE;
2523 eRet = E_HVD_EX_OK;
2524
2525 HVD_EX_MSG_INF("driver Init successfully.\n");
2526
2527 _DRV_HVD_EX_RET(u8DrvId, eRet);
2528 }
2529
2530 //-----------------------------------------------------------------------------
2531 /// @brief \b Function \b Name: MDrv_HVD_EX_Rst()
2532 /// @brief \b Function \b Description: Reset HVD driver
2533 /// @param -bErrHandle \b IN : reset option HVD driver
2534 /// -FALSE(0): Reset HVD to clear mode.( do not recovery SPS)
2535 /// -TRUE(1): Reset HVD to clear mode, and recovery SPS.
2536 /// @return -The result of reset process
2537 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Rst(MS_U32 u32Id,MS_BOOL bErrHandle)2538 HVD_EX_Result MDrv_HVD_EX_Rst(MS_U32 u32Id, MS_BOOL bErrHandle)
2539 {
2540 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2541 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2542
2543 HVD_EX_MSG_TRACE();
2544 _DRV_HVD_Inited(u8DrvId,eRet);
2545
2546 if (bErrHandle == TRUE)
2547 {
2548 HVD_EX_MSG_ERR("HVD Not supported reset(TRUE) yet\n");
2549 return E_HVD_EX_RET_INVALID_PARAMETER;
2550 }
2551
2552 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) != HVD_INIT_MAIN_LIVE_STREAM)
2553 {
2554 HVD_EX_MSG_ERR("HVD rst() only support live stream mode\n");
2555 return E_HVD_EX_RET_INVALID_PARAMETER;
2556 }
2557
2558 //In this function we should delete task and then create task.
2559 HVD_EX_SetRstFlag(TRUE);
2560
2561 eRet = _HVD_EX_Rst(u32Id, bErrHandle);
2562
2563 if (eRet != E_HVD_EX_OK)
2564 {
2565 return (eRet);
2566 }
2567
2568 eRet = _HVD_EX_RecoverySettings(u32Id);
2569
2570 if (eRet != E_HVD_EX_OK)
2571 {
2572 return (eRet);
2573 }
2574
2575 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
2576 pHVDDrvContext->bHVDIsInited[u8DrvId] = TRUE;
2577
2578 return eRet;
2579 }
2580
2581 //-----------------------------------------------------------------------------
2582 /// @brief \b Function \b Name: MDrv_HVD_EX_Play()
2583 /// @brief \b Function \b Description: Play HVD
2584 /// @return -The result of command play
2585 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Play(MS_U32 u32Id)2586 HVD_EX_Result MDrv_HVD_EX_Play(MS_U32 u32Id)
2587 {
2588 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2589 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2590
2591 HVD_EX_MSG_TRACE();
2592 _DRV_HVD_Inited(u8DrvId,eRet);
2593 _DRV_HVD_EX_Entry(u8DrvId);
2594
2595 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
2596 if (MDrv_HVD_EX_GetPlayState(u32Id) != E_HVD_EX_GSTATE_PLAY || pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding)
2597 #endif
2598 {
2599 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
2600
2601 if (eRet != E_HVD_EX_OK)
2602 {
2603 _DRV_HVD_EX_RET(u8DrvId, eRet);
2604 }
2605 }
2606
2607 // step display off
2608 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 0);
2609
2610 if (eRet == E_HVD_EX_OK)
2611 {
2612 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
2613 }
2614
2615 _DRV_HVD_EX_RET(u8DrvId, eRet);
2616 }
2617
2618 //-----------------------------------------------------------------------------
2619 /// @brief \b Function \b Name: MDrv_HVD_EX_Exit()
2620 /// @brief \b Function \b Description: Stop HVD and release resource.
2621 /// @return -The result of command stop
2622 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Exit(MS_U32 u32Id)2623 HVD_EX_Result MDrv_HVD_EX_Exit(MS_U32 u32Id)
2624 {
2625 MS_U32 u32Timer = 0;
2626 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2627 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2628 MS_U8 u8HalIdx = _HVD_EX_GetStreamIdx(u32Id);
2629
2630 HVD_EX_MSG_TRACE();
2631 HAL_VPU_EX_ReleaseFreeStream(u8HalIdx);
2632 _DRV_HVD_Inited(u8DrvId,eRet);
2633 _DRV_HVD_Rsting(u8DrvId,eRet);
2634
2635 #if 0
2636 #if defined(SUPPORT_CMA)
2637 if (pHVDDrvContext->bCMAUsed)
2638 {
2639 if (MApi_CMA_Pool_PutMem(&pHVDDrvContext->cmaFreeParam[0][u8DrvId]) == FALSE)
2640 return E_HVD_EX_RET_CMA_ERROR;
2641 HVD_EX_MSG_DBG("[0x%lx]MApi_CMA_Pool_PutMem: offset=0x%lx, len=0x%lx\n", u32Id, pHVDDrvContext->cmaFreeParam[0][u8DrvId].offset_in_pool, pHVDDrvContext->cmaFreeParam[0][u8DrvId].length);
2642 if (pHVDDrvContext->bCMATwoMIU[u8DrvId])
2643 {
2644 if (MApi_CMA_Pool_PutMem(&pHVDDrvContext->cmaFreeParam[1][u8DrvId]) == FALSE)
2645 return E_HVD_EX_RET_CMA_ERROR;
2646 HVD_EX_MSG_DBG("[0x%lx]MApi_CMA_Pool_PutMem: offset=0x%lx, len=0x%lx\n", u32Id, pHVDDrvContext->cmaFreeParam[1][u8DrvId].offset_in_pool, pHVDDrvContext->cmaFreeParam[1][u8DrvId].length);
2647 }
2648 }
2649 #endif
2650 #endif
2651
2652 #ifdef VDEC3
2653 if (!HAL_HVD_EX_FreeBBUId(u32Id, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32BBUId))
2654 {
2655 HVD_EX_MSG_ERR("HVD free bbu id (%d) failed\n", pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32BBUId);
2656 }
2657 #endif
2658
2659 #if HVD_ENABLE_MVC
2660 if((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
2661 {
2662 pHVDDrvContext->bHVDIsInited[u8DrvId+1] = FALSE;
2663 }
2664 #endif /// HVD_ENABLE_MVC
2665
2666 do
2667 {
2668 u32Timer++;
2669
2670 if (u32Timer >= HVD_FW_EXIT_ACTION_TIMEOUT)
2671 {
2672 eRet = E_HVD_EX_RET_TIMEOUT;
2673 HVD_EX_MSG_ERR("HVD exit timeout!!!\n");
2674 //return eRet;
2675 break;
2676 }
2677 else
2678 {
2679 HVD_Delay_ms(1);
2680 }
2681 } while (_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_PROCESSING));
2682
2683 // release ISR callback
2684 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.bRegISR)
2685 {
2686 if (E_HVD_EX_OK != MDrv_HVD_EX_SetISREvent(u32Id, E_HVD_EX_ISR_NONE, NULL))
2687 {
2688 HVD_EX_MSG_ERR("MDrv_HVD_EX_Exit: dettach isr fail\n");
2689 }
2690 }
2691 pHVDDrvContext->bHVDIsInited[u8DrvId] = FALSE;
2692 // close HVD FW
2693 eRet = (HVD_EX_Result) HAL_HVD_EX_DeInit(u32Id);
2694
2695 if(eRet == E_HVD_EX_RET_TIMEOUT)
2696 {
2697 HVD_EX_MSG_ERR("Force delete task, cause cmd timeout \n");
2698 eRet = E_HVD_EX_OK;
2699 }
2700
2701 #if HVD_ENABLE_MVC
2702 if((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
2703 {
2704 memset((void *) &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]), 0, sizeof(HVD_EX_Drv_Ctrl));
2705 }
2706 #endif /// HVD_ENABLE_MVC
2707
2708 // reset internal control variables
2709 memset((void *) &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]), 0, sizeof(HVD_EX_Drv_Ctrl));
2710 memset((void *) &(pHVDDrvContext->gHVDPreCtrl[u8DrvId]), 0, sizeof(HVD_Pre_Ctrl));
2711
2712 return eRet;
2713 }
2714
2715 //-----------------------------------------------------------------------------
2716 /// @brief \b Function \b Name: MDrv_HVD_EX_Pause()
2717 /// @brief \b Function \b Description: Pause HVD
2718 /// @return -The result of command pause
2719 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Pause(MS_U32 u32Id)2720 HVD_EX_Result MDrv_HVD_EX_Pause(MS_U32 u32Id)
2721 {
2722 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2723 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2724
2725 HVD_EX_MSG_TRACE();
2726 _DRV_HVD_Inited(u8DrvId,eRet);
2727 _DRV_HVD_EX_Entry(u8DrvId);
2728
2729 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PAUSE, 0);
2730
2731 if (eRet != E_HVD_EX_OK)
2732 {
2733 _DRV_HVD_EX_RET(u8DrvId, eRet);
2734 }
2735
2736 // step display off
2737 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 0);
2738
2739 if (eRet == E_HVD_EX_OK)
2740 {
2741 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
2742 }
2743
2744 _DRV_HVD_EX_RET(u8DrvId, eRet);
2745 }
2746
2747 //-----------------------------------------------------------------------------
2748 /// @brief \b Function \b Name: MDrv_HVD_EX_Flush()
2749 /// @brief \b Function \b Description: Flush queue and buffer
2750 /// @param -bShowLast \b IN : TRUE / FALSE
2751 /// -FALSE(0): show current displayed frame
2752 /// -TRUE(1): show last decoded frame
2753 /// @return -The result of command flush
2754 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Flush(MS_U32 u32Id,MS_BOOL bShowLast)2755 HVD_EX_Result MDrv_HVD_EX_Flush(MS_U32 u32Id, MS_BOOL bShowLast)
2756 {
2757 MS_U32 u32Times = 0;
2758 MS_U32 u32FlushTime = 0;
2759 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2760 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2761 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2762
2763 MS_U32 u32StartTime = 0;
2764
2765 HVD_EX_MSG_TRACE();
2766 _DRV_HVD_Inited(u8DrvId,eRet);
2767 _DRV_HVD_EX_Entry(u8DrvId);
2768
2769 if (MDrv_HVD_EX_GetPlayState(u32Id) == E_HVD_EX_GSTATE_STOP)
2770 {
2771 eRet = E_HVD_EX_FAIL;
2772 _DRV_HVD_EX_RET(u8DrvId, eRet);
2773 }
2774
2775 // pause first
2776 if (MDrv_HVD_EX_GetPlayState(u32Id) != E_HVD_EX_GSTATE_PAUSE)
2777 {
2778 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PAUSE, 0);
2779
2780 if (eRet != E_HVD_EX_OK)
2781 {
2782 _DRV_HVD_EX_RET(u8DrvId, eRet);
2783 }
2784 u32StartTime = MsOS_GetSystemTime();
2785 // check flush done
2786 while (1)
2787 {
2788 if (MDrv_HVD_EX_GetPlayState(u32Id) == E_HVD_EX_GSTATE_PAUSE)
2789 {
2790 break;
2791 }
2792
2793 u32Times++;
2794 HVD_Delay_ms(1);
2795
2796 if (u32Times > 100 || MsOS_GetSystemTime() - u32StartTime > 100)
2797 {
2798 HVD_EX_MSG_INF("pause in flush() not finished.\n");
2799 break;
2800 }
2801 }
2802 }
2803
2804 // step display off
2805 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 0);
2806
2807 if (eRet == E_HVD_EX_OK)
2808 {
2809 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
2810 }
2811
2812 #ifndef VDEC3
2813 #if HVD_ENABLE_RV_FEATURE
2814 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM)
2815 {
2816 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LastNal.bRVBrokenPacket)
2817 {
2818 HVD_BBU_Info bbuInfo = {0,0,0,0,0,0,0,0,0,0} ;
2819
2820 HVD_EX_MSG_INF("push dummy packet for broken by us packet\n");
2821
2822 bbuInfo.u32Length = bbuInfo.u32AllocLength = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32RV_FlushPacketSize;
2823 bbuInfo.u32Staddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32RV_FlushPacketAddr - pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr;
2824 bbuInfo.u32OriPktAddr = bbuInfo.u32Staddr;
2825 bbuInfo.bRVBrokenPacket = FALSE;
2826
2827 eRet = (HVD_EX_Result) HAL_HVD_EX_PushPacket(u32Id, (HVD_BBU_Info *) &bbuInfo);
2828 }
2829 }
2830 #endif
2831
2832 // fire all packet to FW
2833 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR_FIRED) != HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR))
2834 {
2835 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
2836 }
2837 #endif
2838
2839 // send command
2840 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_RUNNING);
2841 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FLUSH, (MS_U32) bShowLast);
2842
2843 u32FlushTime = 0;
2844
2845 if (eRet != E_HVD_EX_OK)
2846 {
2847 _DRV_HVD_EX_RET(u8DrvId, eRet);
2848 }
2849
2850 // check flush done only for raw file mode
2851 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
2852 {
2853 u32StartTime = MsOS_GetSystemTime();
2854 while (1)
2855 {
2856 #ifndef VDEC3
2857 //_DRV_HVD_PushDummy();
2858 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP8)
2859 {
2860 if (_HVD_EX_IsAllBufferEmpty_VP8(u32Id))
2861 {
2862 eRet = E_HVD_EX_OK;
2863 HVD_EX_MSG_INF("[Check Flush Done] flush queue empty\n");
2864 break;
2865 }
2866 }
2867 else
2868 #endif
2869 {
2870 #ifdef VDEC3
2871 if (_HVD_EX_IsAllBufferEmpty(u32Id, TRUE))
2872 #else
2873 if (_HVD_EX_IsAllBufferEmpty(u32Id) && (u32FlushTime >= 50))
2874 #endif
2875 {
2876 eRet = E_HVD_EX_OK;
2877 break;
2878 }
2879 }
2880 u32Times++;
2881 u32FlushTime++;
2882 HVD_Delay_ms(1);
2883
2884 if (u32Times > 1000 || MsOS_GetSystemTime() - u32StartTime > 1000)
2885 {
2886 HVD_EX_MSG_ERR("Flush() timeout failed: BBU:%lu Dec:%lu Disp:%lu Idle:%lu ESr:%lx ESw:%lx\n",
2887 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB),
2888 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB),
2889 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB),
2890 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT),
2891 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR), (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR));
2892 eRet = E_HVD_EX_FAIL;
2893 break;
2894 }
2895 }
2896 // reset byte_cnt
2897 HAL_HVD_EX_RstPTSCtrlVariable(u32Id);
2898 }
2899 #ifndef VDEC3
2900 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
2901 {
2902 case HVD_INIT_HW_VP8:
2903 //HVD_PRINT("[DRV1] BBU WRp = %x, RDp = %x\n",HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR),HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR));
2904 //HAL_HVD_EX_SetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR, HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR));
2905 //HVD_PRINT("[DRV2] BBU WRp = %x, RDp = %x\n",HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR),HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR));
2906 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
2907 break;
2908 default:
2909 break;
2910 }
2911 #endif
2912
2913 HAL_HVD_EX_FlushRstShareMem(u32Id);
2914 pCtrl->u32FlushRstPtr = 1;
2915
2916 // MediaCodec need this to let scan mode to be normal.
2917 if (0) //bPlayback)
2918 {
2919 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
2920
2921 if (eRet != E_HVD_EX_OK)
2922 {
2923 _DRV_HVD_EX_RET(u8DrvId, eRet);
2924 }
2925 }
2926
2927 _DRV_HVD_EX_RET(u8DrvId, eRet);
2928 }
2929
MDrv_HVD_EX_SetDynmcDispPath(MS_U32 u32Id,MS_BOOL bConnect,HVD_EX_DISPLAY_PATH eDispPath)2930 HVD_EX_Result MDrv_HVD_EX_SetDynmcDispPath(MS_U32 u32Id, MS_BOOL bConnect, HVD_EX_DISPLAY_PATH eDispPath)
2931 {
2932 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2933 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2934 MS_U32 u32Arg = 0;
2935
2936 HVD_EX_MSG_TRACE();
2937 _DRV_HVD_Inited(u8DrvId,eRet);
2938 _DRV_HVD_EX_Entry(u8DrvId);
2939
2940 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DYNMC_DISP_PATH_STATUS, E_HVD_EX_DISP_PATH_DYNMC_HANDLING);
2941
2942 u32Arg = (((MS_U32)(eDispPath)) << 1) & (~0x1);
2943 u32Arg |= (bConnect & 0x1);
2944
2945 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_CONNECT_DISP_PATH, u32Arg);
2946 HVD_PRINT("%s waiting command\n",__FUNCTION__);
2947 MS_U32 u32TimeOut = MsOS_GetSystemTime() + 500; // it can not block
2948 while (1)
2949 {
2950 if(bConnect)
2951 {
2952 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DYNMC_DISP_PATH_STATUS) == E_HVD_EX_DISP_PATH_DYNMC_CONNECTTED)
2953 {
2954 eRet = E_HVD_EX_OK;
2955 break;
2956 }
2957 }
2958 else//disconnect
2959 {
2960 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DYNMC_DISP_PATH_STATUS) == E_HVD_EX_DISP_PATH_DYNMC_DISCONNECT)
2961 {
2962 eRet = E_HVD_EX_OK;
2963 break;
2964 }
2965 }
2966
2967
2968 if (MsOS_GetSystemTime() > u32TimeOut)
2969 {
2970 eRet = E_HVD_EX_FAIL;
2971 HVD_EX_MSG_ERR("Set dynamic display path timeout!\n");
2972 break;
2973 }
2974 }
2975 HVD_PRINT("%s command finish eRet:%d\n",__FUNCTION__,eRet);
2976 return eRet;
2977 }
2978
2979 //-----------------------------------------------------------------------------
2980 /// @brief \b Function \b Name: MDrv_HVD_EX_SetAVSyncDispAutoDrop()
2981 /// @brief \b Function \b Description: enable/disable avsync display auto drop when mvop is disconnectted
2982 /// @param -bEnable \b IN :enable/disable
2983 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
2984 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetAVSyncDispAutoDrop(MS_U32 u32Id,MS_BOOL bEnable)2985 HVD_EX_Result MDrv_HVD_EX_SetAVSyncDispAutoDrop(MS_U32 u32Id, MS_BOOL bEnable)
2986 {
2987 HVD_EX_Result eRet = E_HVD_EX_OK;
2988 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2989
2990 HVD_EX_MSG_TRACE();
2991 _DRV_HVD_Inited(u8DrvId,eRet);
2992 _DRV_HVD_EX_Entry(u8DrvId);
2993
2994 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVSYNC_DISP_AUTO_DROP, bEnable);
2995
2996 _DRV_HVD_EX_RET(u8DrvId, eRet);
2997 }
2998
2999 //-----------------------------------------------------------------------------
3000 /// @brief \b Function \b Name: MDrv_HVD_EX_StepDisp()
3001 /// @brief \b Function \b Description: Trigger HVD to show one frame
3002 /// @return -The result of command trigger display
3003 //-----------------------------------------------------------------------------
MDrv_HVD_EX_StepDisp(MS_U32 u32Id)3004 HVD_EX_Result MDrv_HVD_EX_StepDisp(MS_U32 u32Id)
3005 {
3006 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3007 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3008
3009 HVD_EX_MSG_TRACE();
3010 _DRV_HVD_Inited(u8DrvId,eRet);
3011 _DRV_HVD_EX_Entry(u8DrvId);
3012
3013 // check command
3014 eRet = _HVD_EX_Check_Cmd(u8DrvId, E_HVD_CHECK_CMD_TRIGGER_DISP);
3015
3016 if (eRet != E_HVD_EX_OK)
3017 {
3018 _DRV_HVD_EX_RET(u8DrvId, eRet);
3019 }
3020
3021 // step display on
3022 if (_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL))
3023 {
3024 if (MDrv_HVD_EX_IsFrameShowed(u32Id))
3025 {
3026 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 1);
3027 }
3028 else
3029 {
3030 HVD_EX_MSG_INF("Previous Step Display command is not finished\n");
3031 eRet = E_HVD_EX_OK;
3032 }
3033 }
3034 else
3035 {
3036 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 1);
3037
3038 if (eRet == E_HVD_EX_OK)
3039 {
3040 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL);
3041 }
3042 }
3043 // enter play mode
3044 if (1) //HAL_HVD_EX_GetData(E_HVD_GDATA_FW_STATE) == E_HVD_FW_PAUSE )
3045 {
3046 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
3047
3048 if (eRet != E_HVD_EX_OK)
3049 {
3050 _DRV_HVD_EX_RET(u8DrvId, eRet);
3051 }
3052 }
3053 _DRV_HVD_EX_RET(u8DrvId, eRet);
3054 }
3055
3056 //-----------------------------------------------------------------------------
3057 /// @brief \b Function \b Name: MDrv_HVD_EX_StepDecode()
3058 /// @brief \b Function \b Description: Step decode one frame
3059 //-----------------------------------------------------------------------------
MDrv_HVD_EX_StepDecode(MS_U32 u32Id)3060 HVD_EX_Result MDrv_HVD_EX_StepDecode(MS_U32 u32Id)
3061 {
3062 MS_U32 u32Times = 0;
3063 MS_U32 FWState = 0;
3064 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3065 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3066
3067 HVD_EX_MSG_TRACE();
3068 _DRV_HVD_Inited(u8DrvId,eRet);
3069 _DRV_HVD_EX_Entry(u8DrvId);
3070
3071 // check if step decoding
3072 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding)
3073 {
3074 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt == HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT))
3075 {
3076 eRet = E_HVD_EX_RET_NOTREADY;
3077 _DRV_HVD_EX_RET(u8DrvId, eRet);
3078 }
3079 }
3080
3081 // Pause first
3082 FWState = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE);
3083
3084 if (FWState != (MS_U32) E_HVD_FW_PAUSE)
3085 {
3086 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PAUSE, 0);
3087
3088 if (eRet != E_HVD_EX_OK)
3089 {
3090 _DRV_HVD_EX_RET(u8DrvId, eRet);
3091 }
3092 while (FWState != ((MS_U32) E_HVD_FW_PAUSE) && u32Times <= 10000)
3093 {
3094 FWState = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE);
3095 u32Times++;
3096 HVD_Delay_ms(1);
3097 }
3098 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE) != E_HVD_FW_PAUSE)
3099 {
3100 eRet = E_HVD_EX_FAIL;
3101 _DRV_HVD_EX_RET(u8DrvId, eRet);
3102 }
3103 }
3104
3105 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding = TRUE;
3106 // get decode cnt
3107 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT);
3108 // step decode
3109 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_STEP_DECODE, 0);
3110
3111 _DRV_HVD_EX_RET(u8DrvId, eRet);
3112 }
3113
3114 // set command, action, status, input
3115 //-----------------------------------------------------------------------------
3116 /// @brief \b Function \b Name: MDrv_HVD_EX_PushQueue()
3117 /// @brief \b Function \b Description: push one entry into the decoding table(BBU table).
3118 /// @param -pInfo \b IN : Pointer to the information of input packet.
3119 /// @return -The result of command push queue
3120 //-----------------------------------------------------------------------------
MDrv_HVD_EX_PushQueue(MS_U32 u32Id,HVD_EX_PacketInfo * pInfo)3121 HVD_EX_Result MDrv_HVD_EX_PushQueue(MS_U32 u32Id, HVD_EX_PacketInfo *pInfo)
3122 {
3123 #ifdef VDEC3
3124 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3125 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
3126 HAL_VPU_EX_PacketInfo stVpuPkt;
3127
3128 if (pCtrl->bShareBBU)
3129 stVpuPkt.u32Offset = pInfo->u32Staddr + (pCtrl->MemMap.u32BitstreamBufAddr - pCtrl->MemMap.u32TotalBitstreamBufAddr); // NStream will share the same ES buffer
3130 else
3131 stVpuPkt.u32Offset = pInfo->u32Staddr;
3132
3133 stVpuPkt.u32Length = pInfo->u32Length;
3134
3135 //patch for mantis:0965296 stream AVS_MP3_FileFormat.mp4 hang
3136 if(((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_AVS) && (pInfo->u32Length > 0) && (pInfo->u32Length < HVD_MIN_PACKET_SIZE))
3137 {
3138 stVpuPkt.u32Length = HVD_MIN_PACKET_SIZE;
3139 }
3140 stVpuPkt.u64TimeStamp = (MS_U64)pInfo->u32TimeStamp;
3141 //If in display queue mode
3142 stVpuPkt.u64TimeStamp |= ((MS_U64)pInfo->u32ID_H << 32);
3143 stVpuPkt.u32ID_H = pInfo->u32ID_H;
3144 stVpuPkt.u32ID_L = pInfo->u32ID_L;
3145 stVpuPkt.u8Version = pInfo->u8Version;
3146
3147 MS_VIRT u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
3148
3149 return (HVD_EX_Result)HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt, u32VBBUAddr);
3150 #else
3151 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3152 MS_BOOL bNULLPacket = FALSE;
3153 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3154 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
3155 HVD_BBU_Info bbuInfo;
3156
3157 //******** for 4kx2k stream ********//
3158 MS_U8 u8Part = 0;
3159 MS_BOOL bPartToBeSend[QUANTITY_AFTER_BROKEN_BY_US]={0};
3160 MS_U32 u32PartLen[QUANTITY_AFTER_BROKEN_BY_US]={0};
3161 MS_U32 u32PartAllocLen[QUANTITY_AFTER_BROKEN_BY_US]={0};
3162
3163 HVD_EX_MSG_TRACE();
3164 _DRV_HVD_Inited(u8DrvId,eRet);
3165 _DRV_HVD_EX_Entry(u8DrvId);
3166
3167 if (pInfo == NULL)
3168 {
3169 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3170 _DRV_HVD_EX_RET(u8DrvId, eRet);
3171 }
3172 else if ((pInfo->u32Length >= HVD_BBU_TAG_LIMITATION) && (pInfo->u32Length < MAX_QUANTITY))
3173 {
3174 HVD_EX_MSG_DBG("input packet size(0x%lx) larger than HW_bbu_tag_limit max packet size(0x%x), AllocLength(0x%lx); to play 4kx2k stream, break it by us \n",
3175 pInfo->u32Length, HVD_BBU_TAG_LIMITATION, pInfo->u32AllocLength);
3176
3177 bPartToBeSend[1] = TRUE;
3178 u32PartLen[1] = pInfo->u32Length - QUANTITY_LENGTH;
3179 u32PartAllocLen[1] = pInfo->u32AllocLength - QUANTITY_LENGTH;
3180
3181 pInfo->u32Length = QUANTITY_LENGTH;
3182 pInfo->u32AllocLength = QUANTITY_LENGTH;
3183 pInfo->u32Staddr |= HVD_RV_BROKEN_BY_US_MASK;
3184
3185 MS_U32 i;
3186 for(i=2; i< QUANTITY_AFTER_BROKEN_BY_US; i++)
3187 {
3188 if (u32PartLen[i-1] >= QUANTITY_LENGTH)
3189 {
3190 bPartToBeSend[i] = TRUE;
3191 u32PartLen[i] = u32PartLen[i-1] - QUANTITY_LENGTH;
3192 u32PartAllocLen[i] = u32PartAllocLen[i-1] - QUANTITY_LENGTH;
3193 u32PartLen[i-1] = QUANTITY_LENGTH;
3194 u32PartAllocLen[i-1] = QUANTITY_LENGTH;
3195 }
3196 else
3197 {
3198 break;
3199 }
3200 }
3201
3202 }
3203 else if (pInfo->u32Length >= MAX_QUANTITY)
3204 {
3205 HVD_EX_MSG_ERR("input packet size(0x%lx) larger than SW_defined_4kx2k max packet size(0x%x), AllocLength(0x%lx) \n",
3206 pInfo->u32Length, MAX_QUANTITY, pInfo->u32AllocLength);
3207 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3208 _DRV_HVD_EX_RET(u8DrvId, eRet);
3209 }
3210 else if ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_TSP)
3211 {
3212 HVD_EX_MSG_ERR("Init mode is TSP input and PushQueue() is not supported in TSP input\n");
3213 eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3214 _DRV_HVD_EX_RET(u8DrvId, eRet);
3215 }
3216 /*
3217 else if (((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
3218 (pInfo->u32Staddr >= pCtrl->MemMap.u32BitstreamBufSize))
3219 {
3220 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3221 _DRV_HVD_EX_RET(u8DrvId, eRet);
3222 }*/
3223
3224 bbuInfo.u32ID_H = pInfo->u32ID_H;
3225 bbuInfo.u32ID_L = pInfo->u32ID_L;
3226 bbuInfo.u32Length = pInfo->u32Length;
3227 bbuInfo.u32TimeStamp = pInfo->u32TimeStamp;
3228 bbuInfo.u32AllocLength = pInfo->u32AllocLength;
3229
3230 if (pInfo->u32Staddr & HVD_RV_BROKEN_BY_US_MASK)
3231 {
3232 bbuInfo.bRVBrokenPacket = TRUE;
3233 bbuInfo.u32OriPktAddr = pInfo->u32Staddr & (~HVD_RV_BROKEN_BY_US_MASK);
3234 bbuInfo.u32Staddr = pInfo->u32Staddr & (~HVD_RV_BROKEN_BY_US_MASK);
3235 }
3236 else
3237 {
3238 bbuInfo.bRVBrokenPacket = FALSE;
3239 bbuInfo.u32OriPktAddr = pInfo->u32Staddr;
3240 bbuInfo.u32Staddr = pInfo->u32Staddr;
3241 }
3242
3243
3244 if ( !bbuInfo.bRVBrokenPacket &&
3245 (pInfo->u32Staddr >= pCtrl->MemMap.u32BitstreamBufSize))
3246 {
3247 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3248 _DRV_HVD_EX_RET(u8DrvId, eRet);
3249 }
3250
3251
3252 bbuInfo.u32Staddr2 = pInfo->u32Staddr2;
3253 bbuInfo.u32Length2 = pInfo->u32Length2;
3254
3255 // invalid packet
3256 if ((bbuInfo.u32TimeStamp != HVD_U32_MAX) && (bbuInfo.u32Length == 0))
3257 {
3258 HVD_EX_MSG_INF("Invalid Packet(size:0x%lx PTS:0x%lx)\n ", bbuInfo.u32Length, bbuInfo.u32TimeStamp);
3259 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3260 _DRV_HVD_EX_RET(u8DrvId, eRet);
3261 }
3262 // AVI NULL packet
3263 #if HVD_ENABLE_AUTO_AVI_NULL_PACKET
3264 else if ((bbuInfo.u32TimeStamp == HVD_U32_MAX) && (bbuInfo.u32Length == 0))
3265 {
3266 if (pCtrl->bNoDrvProccBuf)
3267 {
3268 HVD_EX_MSG_INF
3269 ("AVI Null Packet(size:0x%lx PTS:0x%lx), but do not have enough driver process buffer(0x%lx)\n ",
3270 pInfo->u32Length, bbuInfo.u32TimeStamp, pCtrl->MemMap.u32DrvProcessBufSize);
3271 eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3272 _DRV_HVD_EX_RET(u8DrvId, eRet);
3273 }
3274 else
3275 {
3276 bNULLPacket = TRUE;
3277 bbuInfo.u32Length = pCtrl->u32NULLPacketSize;
3278 bbuInfo.u32Staddr = pCtrl->u32NULLPacketAddr - pCtrl->MemMap.u32BitstreamBufAddr;
3279 }
3280 }
3281 #endif
3282
3283 // the else are all normal cases.
3284 if (MDrv_HVD_EX_GetBBUVacancy(u32Id) != 0)
3285 {
3286 MS_U32 u32ESRptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR);
3287 MS_U32 u32ESWptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR);
3288
3289 if ((u32ESRptr <= u32ESWptr) &&
3290 (pCtrl->MemMap.u32BitstreamBufSize < bbuInfo.u32Staddr + bbuInfo.u32Length))
3291 {
3292 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) may cause bitstream buffer overflow (0x%lx 0x%lx) 0x%lx\n ",
3293 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3294 u32ESRptr, u32ESWptr, pCtrl->MemMap.u32BitstreamBufSize);
3295 }
3296
3297 if ((u32ESWptr < u32ESRptr) &&
3298 (u32ESWptr < bbuInfo.u32Staddr) &&
3299 (bbuInfo.u32Staddr < u32ESRptr) &&
3300 (u32ESRptr <= bbuInfo.u32Staddr + bbuInfo.u32Length))
3301 {
3302 HVD_EX_MSG_ERR("input packet (staddr=0x%lx, len=0x%lx) may overwrite undecoded data (rptr=0x%lx wptr=0x%lx)\n ",
3303 bbuInfo.u32Staddr, bbuInfo.u32Length, u32ESRptr, u32ESWptr);
3304 }
3305
3306 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) &&
3307 (!bNULLPacket) &&
3308 (pCtrl->MemMap.u32DrvProcessBufSize != 0) &&
3309 (pCtrl->MemMap.u32BitstreamBufAddr <= pCtrl->MemMap.u32DrvProcessBufAddr) &&
3310 (pCtrl->MemMap.u32DrvProcessBufAddr < (pCtrl->MemMap.u32BitstreamBufAddr + pCtrl->MemMap.u32BitstreamBufSize)))
3311 {
3312 MS_U32 u32Lower = pCtrl->MemMap.u32DrvProcessBufAddr - pCtrl->MemMap.u32BitstreamBufAddr;
3313 MS_U32 u32Upper = u32Lower + pCtrl->MemMap.u32DrvProcessBufSize;
3314
3315 if (((u32Lower <= bbuInfo.u32Staddr) && (bbuInfo.u32Staddr < u32Upper)) ||
3316 ((u32Lower <= (bbuInfo.u32Staddr + bbuInfo.u32Length)) && ((bbuInfo.u32Staddr + bbuInfo.u32Length) < u32Upper)) ||
3317 ((bbuInfo.u32Staddr < u32Lower) && (u32Upper <= (bbuInfo.u32Staddr + bbuInfo.u32Length))))
3318 {
3319 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) is located in HVD driver process buffer(0x%lx 0x%lx)\n ",
3320 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3321 u32Lower, u32Upper);
3322 }
3323 }
3324
3325 //for debug
3326 #if 0
3327 {
3328 HVD_EX_MSG_INF("HVD : %u (%u %u) ID:%x input packet (%x %x %x) (%x %x %x) (%u %u %u)\n ",
3329 pCtrl->u32BBUPacketCnt, MDrv_HVD_EX_GetDataErrCnt(u32Id), MDrv_HVD_EX_GetDecErrCnt(u32Id),
3330 bbuInfo.u32ID_L, bbuInfo.u32Staddr + bbuInfo.u32Length, bbuInfo.u32Length,
3331 bbuInfo.u32Staddr, u32ESRptr, pCtrl->MemMap.u32BitstreamBufSize, u32ESWptr,
3332 MDrv_HVD_EX_GetBBUVacancy(u32Id), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR),
3333 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR));
3334 }
3335 #endif
3336
3337 if ( (!bbuInfo.bRVBrokenPacket)&&
3338 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
3339 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_VP8) &&
3340 (pCtrl->bAutoRmLastZeroByte) &&
3341 ((!pCtrl->bCannotAccessMIU256) || ((pCtrl->bCannotAccessMIU256) && (pCtrl->MemMap.u32BitstreamBufAddr < pCtrl->MemMap.u32MIU1BaseAddr))))
3342 {
3343 if ((pCtrl->u8SecureMode == E_HVD_SECURE_MODE_NONE) && (!(pHVDDrvContext->bVPUIsSecureMode)))
3344 {
3345 MS_U32 ModifyCnt = 0;
3346 MS_U32 u32tmp = 0;
3347 MS_U8 *pByte = NULL;
3348 u32tmp = (bbuInfo.u32Staddr + bbuInfo.u32Length - 1);
3349 if (u32tmp >= pCtrl->MemMap.u32BitstreamBufSize)
3350 {
3351 u32tmp -= pCtrl->MemMap.u32BitstreamBufSize;
3352 }
3353 u32tmp += pCtrl->MemMap.u32BitstreamBufVAddr;
3354 pByte = (MS_U8 *) u32tmp;
3355
3356 if((bbuInfo.u32Length > 2)
3357 && ((*pByte == 0) && (*(pByte-1) == 0) && (*(pByte-2) == 0)))
3358 {
3359 //301385:
3360 //more then 2 zero bytes after valid bytes.
3361 //no need to remove pending zero bytes to prevent system busy
3362 //HVD_PRINT("no need to remove pending zero~~\n");
3363 }
3364 else
3365 {
3366 #if 1 //use if-condition instead of while-loop
3367 if(*pByte == 0)
3368 {
3369 ModifyCnt++;
3370 bbuInfo.u32Length--;
3371 pByte--;
3372
3373 if(bbuInfo.u32Length && (*pByte == 0))
3374 {
3375 ModifyCnt++;
3376 bbuInfo.u32Length--;
3377 }
3378 }
3379 #else
3380 while (1) //for( ModifyCnt=0 ; ModifyCnt<3;ModifyCnt++ )
3381 {
3382 if (bbuInfo.u32Length)
3383 {
3384 if (*pByte == 0)
3385 {
3386 /*
3387 if( ModifyCnt == 2 )
3388 {
3389 gHVDPacket.u32Length+=ModifyCnt;
3390 }
3391 else
3392 */
3393 {
3394 ModifyCnt++;
3395 bbuInfo.u32Length--;
3396 pByte--;
3397 }
3398 }
3399 else
3400 {
3401 break;
3402 }
3403 }
3404 else
3405 {
3406 break;
3407 }
3408 }
3409 #endif
3410 }
3411
3412 if (ModifyCnt != 0)
3413 {
3414 //HVD_MSG_INFO("HVD remove last zero byte:%u\n" , ModifyCnt);
3415 }
3416
3417 if (bbuInfo.u32Length == 0)
3418 {
3419 HVD_EX_MSG_ERR("Packet with all zero bytes(staddr:0x%x remove zero bytes:%u)\n ",
3420 bbuInfo.u32Staddr, ModifyCnt);
3421 eRet = E_HVD_EX_OK;
3422 _DRV_HVD_EX_RET(u8DrvId, eRet);
3423 }
3424 }
3425 }
3426 /*
3427 {
3428 MS_U8 *pByte=NULL;
3429 pByte = (MS_U8 *)((gHVDCtrl.MemMap.u32BitstreamBufVAddr) + gHVDPacket.u32Staddr );
3430 HVD_MSG_INFO("HVD remove last zero byte:%02x%02x%02x%02x\n" ,
3431 *pByte , *(pByte+1) , *(pByte+2) , *(pByte+3) );
3432 }
3433 */
3434 eRet = (HVD_EX_Result) HAL_HVD_EX_PushPacket(u32Id, (HVD_BBU_Info *) &bbuInfo);
3435 pCtrl->u32FlushRstPtr = 0;
3436 }
3437 else
3438 {
3439 HVD_EX_MSG_DBG("Push queue full\n");
3440 eRet = E_HVD_EX_RET_QUEUE_FULL;
3441 }
3442
3443 for ( u8Part = 1; u8Part < QUANTITY_AFTER_BROKEN_BY_US; u8Part++)
3444 {
3445 if (bPartToBeSend[u8Part])
3446 {
3447 pInfo->u32Staddr &= (~HVD_RV_BROKEN_BY_US_MASK);
3448 pInfo->u32Staddr += QUANTITY_LENGTH;
3449
3450 bbuInfo.u32ID_H = pInfo->u32ID_H;
3451 bbuInfo.u32ID_L = pInfo->u32ID_L;
3452 bbuInfo.u32Length = u32PartLen[u8Part];
3453 bbuInfo.u32TimeStamp = pInfo->u32TimeStamp;
3454 bbuInfo.u32AllocLength = u32PartAllocLen[u8Part];
3455
3456 if (u8Part != (QUANTITY_AFTER_BROKEN_BY_US - 1))
3457 {
3458 if (bPartToBeSend[u8Part+1])
3459 {
3460 bbuInfo.bRVBrokenPacket = TRUE;
3461 }
3462 else
3463 {
3464 bbuInfo.bRVBrokenPacket = FALSE;
3465 }
3466 }
3467 else
3468 {
3469 bbuInfo.bRVBrokenPacket = FALSE;
3470 }
3471
3472 bbuInfo.u32OriPktAddr = pInfo->u32Staddr;
3473 bbuInfo.u32Staddr = pInfo->u32Staddr;
3474
3475 bbuInfo.u32Staddr2 = pInfo->u32Staddr2;
3476 bbuInfo.u32Length2 = pInfo->u32Length2;
3477
3478 //if (MDrv_HVD_EX_GetBBUVacancy(u32Id) != 0)
3479 {
3480 MS_U32 u32ESRptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR);
3481 MS_U32 u32ESWptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR);
3482
3483 if ((u32ESRptr <= u32ESWptr) &&
3484 (pCtrl->MemMap.u32BitstreamBufSize < bbuInfo.u32Staddr + bbuInfo.u32Length))
3485 {
3486 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) may cause bitstream buffer overflow (0x%lx 0x%lx) 0x%lx\n ",
3487 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3488 u32ESRptr, u32ESWptr, pCtrl->MemMap.u32BitstreamBufSize);
3489 }
3490
3491 if ((u32ESWptr < u32ESRptr) &&
3492 (u32ESWptr < bbuInfo.u32Staddr) &&
3493 (bbuInfo.u32Staddr < u32ESRptr) &&
3494 (u32ESRptr <= bbuInfo.u32Staddr + bbuInfo.u32Length))
3495 {
3496 HVD_EX_MSG_ERR("input packet (staddr=0x%lx, len=0x%lx) may overwrite undecoded data (rptr=0x%lx wptr=0x%lx)\n ",
3497 bbuInfo.u32Staddr, bbuInfo.u32Length, u32ESRptr, u32ESWptr);
3498 }
3499
3500 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) &&
3501 (!bNULLPacket) &&
3502 (pCtrl->MemMap.u32DrvProcessBufSize != 0) &&
3503 (pCtrl->MemMap.u32BitstreamBufAddr <= pCtrl->MemMap.u32DrvProcessBufAddr) &&
3504 (pCtrl->MemMap.u32DrvProcessBufAddr < (pCtrl->MemMap.u32BitstreamBufAddr + pCtrl->MemMap.u32BitstreamBufSize)))
3505 {
3506 MS_U32 u32Lower = pCtrl->MemMap.u32DrvProcessBufAddr - pCtrl->MemMap.u32BitstreamBufAddr;
3507 MS_U32 u32Upper = u32Lower + pCtrl->MemMap.u32DrvProcessBufSize;
3508
3509 if (((u32Lower <= bbuInfo.u32Staddr) && (bbuInfo.u32Staddr < u32Upper)) ||
3510 ((u32Lower <= (bbuInfo.u32Staddr + bbuInfo.u32Length)) && ((bbuInfo.u32Staddr + bbuInfo.u32Length) < u32Upper)) ||
3511 ((bbuInfo.u32Staddr < u32Lower) && (u32Upper <= (bbuInfo.u32Staddr + bbuInfo.u32Length))))
3512 {
3513 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) is located in HVD driver process buffer(0x%lx 0x%lx)\n ",
3514 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3515 u32Lower, u32Upper);
3516 }
3517 }
3518
3519 //for debug
3520 #if 0
3521 {
3522 HVD_EX_MSG_INF("HVD : %u (%u %u) ID:%x input packet (%x %x %x) (%x %x %x) (%u %u %u)\n ",
3523 pCtrl->u32BBUPacketCnt, MDrv_HVD_EX_GetDataErrCnt(u32Id), MDrv_HVD_EX_GetDecErrCnt(u32Id),
3524 bbuInfo.u32ID_L, bbuInfo.u32Staddr + bbuInfo.u32Length, bbuInfo.u32Length,
3525 bbuInfo.u32Staddr, u32ESRptr, pCtrl->MemMap.u32BitstreamBufSize, u32ESWptr,
3526 MDrv_HVD_EX_GetBBUVacancy(u32Id), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR),
3527 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR));
3528 }
3529 #endif
3530
3531 if (((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
3532 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_VP8) &&
3533 (pCtrl->bAutoRmLastZeroByte) &&
3534 ((!pCtrl->bCannotAccessMIU256) || ((pCtrl->bCannotAccessMIU256) && (pCtrl->MemMap.u32BitstreamBufAddr < pCtrl->MemMap.u32MIU1BaseAddr))))
3535 {
3536 MS_U32 ModifyCnt = 0;
3537 while (1) //for( ModifyCnt=0 ; ModifyCnt<3;ModifyCnt++ )
3538 {
3539 if (bbuInfo.u32Length)
3540 {
3541 MS_U8 *pByte = NULL;
3542 MS_U32 u32tmp = 0;
3543 u32tmp = (bbuInfo.u32Staddr + bbuInfo.u32Length - 1);
3544 if (u32tmp >= pCtrl->MemMap.u32BitstreamBufSize)
3545 {
3546 u32tmp -= pCtrl->MemMap.u32BitstreamBufSize;
3547 }
3548 u32tmp += pCtrl->MemMap.u32BitstreamBufVAddr;
3549 pByte = (MS_U8 *) u32tmp;
3550 if (*pByte == 0)
3551 {
3552 /*
3553 if( ModifyCnt == 2 )
3554 {
3555 gHVDPacket.u32Length+=ModifyCnt;
3556 }
3557 else
3558 */
3559 {
3560 ModifyCnt++;
3561 bbuInfo.u32Length--;
3562 }
3563 }
3564 else
3565 {
3566 break;
3567 }
3568 }
3569 else
3570 {
3571 break;
3572 }
3573 }
3574 if (ModifyCnt != 0)
3575 {
3576 //HVD_MSG_INFO("HVD remove last zero byte:%u\n" , ModifyCnt);
3577 }
3578 if (bbuInfo.u32Length == 0)
3579 {
3580 HVD_EX_MSG_ERR("Packet with all zero bytes(staddr:0x%x remove zero bytes:%u)\n ",
3581 bbuInfo.u32Staddr, ModifyCnt);
3582 eRet = E_HVD_EX_OK;
3583 _DRV_HVD_EX_RET(u8DrvId, eRet);
3584 }
3585 }
3586 /*
3587 {
3588 MS_U8 *pByte=NULL;
3589 pByte = (MS_U8 *)((gHVDCtrl.MemMap.u32BitstreamBufVAddr) + gHVDPacket.u32Staddr );
3590 HVD_MSG_INFO("HVD remove last zero byte:%02x%02x%02x%02x\n" ,
3591 *pByte , *(pByte+1) , *(pByte+2) , *(pByte+3) );
3592 }
3593 */
3594 eRet = (HVD_EX_Result) HAL_HVD_EX_PushPacket(u32Id, (HVD_BBU_Info *) &bbuInfo);
3595 }
3596 }
3597 }
3598
3599 _DRV_HVD_EX_RET(u8DrvId, eRet);
3600 #endif
3601 }
3602
3603 //-----------------------------------------------------------------------------
3604 /// @brief \b Function \b Name: MDrv_HVD_EX_PushQueue_Fire()
3605 /// @brief \b Function \b Description: fire all waiting entry into the decoding table(BBU table).
3606 /// @return -The result of command push queue fire
3607 //-----------------------------------------------------------------------------
MDrv_HVD_EX_PushQueue_Fire(MS_U32 u32Id)3608 HVD_EX_Result MDrv_HVD_EX_PushQueue_Fire(MS_U32 u32Id)
3609 {
3610 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3611 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3612
3613 HVD_EX_MSG_TRACE();
3614 _DRV_HVD_Inited(u8DrvId,eRet);
3615 _DRV_HVD_EX_Entry(u8DrvId);
3616
3617 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
3618
3619 eRet = E_HVD_EX_OK;
3620 _DRV_HVD_EX_RET(u8DrvId, eRet);
3621 }
3622
3623 //-----------------------------------------------------------------------------
3624 /// @brief \b Function \b Name: MDrv_HVD_EX_DecodeIFrame()
3625 /// @brief \b Function \b Description: Decode I frame only under driver input path.
3626 /// @param -u32SrcSt \b IN : The physical address if user has input packet.
3627 /// @param -u32SrcSize \b IN : The packet size if user has input packet.
3628 /// @return -The result of command decode I frame.
3629 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DecodeIFrame(MS_U32 u32Id,MS_PHY u32SrcSt,MS_U32 u32SrcSize)3630 HVD_EX_Result MDrv_HVD_EX_DecodeIFrame(MS_U32 u32Id, MS_PHY u32SrcSt, MS_U32 u32SrcSize)
3631 {
3632 MS_U32 timer = 300;
3633 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3634 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3635
3636 HVD_EX_MSG_TRACE();
3637 _DRV_HVD_Inited(u8DrvId,eRet);
3638 _DRV_HVD_EX_Entry(u8DrvId);
3639
3640 eRet = MDrv_HVD_EX_Pause(u32Id);
3641
3642 if (eRet != E_HVD_EX_OK)
3643 {
3644 _DRV_HVD_EX_RET(u8DrvId, eRet);
3645 }
3646
3647 // skip decode I
3648 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_DEC, E_HVD_EX_SKIP_DECODE_I);
3649
3650 if (eRet != E_HVD_EX_OK)
3651 {
3652 _DRV_HVD_EX_RET(u8DrvId, eRet);
3653 }
3654
3655 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_I_DIRECT, TRUE);
3656
3657 if (eRet != E_HVD_EX_OK)
3658 {
3659 _DRV_HVD_EX_RET(u8DrvId, eRet);
3660 }
3661 eRet = MDrv_HVD_EX_StepDecode(u32Id);
3662 if (eRet != E_HVD_EX_OK)
3663 {
3664 _DRV_HVD_EX_RET(u8DrvId, eRet);
3665 }
3666
3667 if (E_HVD_INIT_INPUT_DRV == (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & E_HVD_INIT_INPUT_MASK))
3668 {
3669 HVD_EX_PacketInfo packet = {0};
3670
3671 if (u32SrcSize == 0)
3672 {
3673 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3674 HVD_EX_MSG_ERR("decode I frame input packet size is zero\n");
3675 _DRV_HVD_EX_RET(u8DrvId, eRet);
3676 }
3677
3678 packet.u32Staddr = u32SrcSt - pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr;
3679 packet.u32Length = u32SrcSize;
3680
3681 if ((packet.u32Staddr + packet.u32Length) > pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufSize)
3682 {
3683 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3684 HVD_EX_MSG_ERR
3685 ("decode I frame memory overflow, the packet end address is over ES buffer end address\n");
3686 _DRV_HVD_EX_RET(u8DrvId, eRet);
3687 }
3688 packet.u32TimeStamp = 0xFFFFFFFF;
3689 packet.u32ID_L = 0;
3690 packet.u32ID_H = 0;
3691 eRet = MDrv_HVD_EX_PushQueue(u32Id, &packet);
3692 if (E_HVD_EX_OK != eRet)
3693 {
3694 HVD_EX_MSG_ERR("decode I frame push queue fail %x\n", eRet);
3695 _DRV_HVD_EX_RET(u8DrvId, eRet);
3696 }
3697
3698 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
3699 }
3700 while (timer)
3701 {
3702 HVD_Delay_ms(1);
3703 if (MDrv_HVD_EX_IsStepDecodeDone(u32Id))
3704 {
3705 break;
3706 }
3707 timer--;
3708 }
3709 if (timer == 0)
3710 {
3711 eRet = E_HVD_EX_FAIL;
3712 HVD_EX_MSG_ERR("decode I frame time out, not enough data\n");
3713 _DRV_HVD_EX_RET(u8DrvId, eRet);
3714 }
3715 eRet = E_HVD_EX_OK;
3716 _DRV_HVD_EX_RET(u8DrvId, eRet);
3717 }
3718
3719 //-----------------------------------------------------------------------------
3720 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDataEnd()
3721 /// @brief \b Function \b Description: Upper layer set this to inform driver that there are no more data will be pushed.
3722 /// @param -bEnd \b IN : Enable/ Disable
3723 /// -FALSE(0): normal status( default )
3724 /// -TRUE(1): ending status
3725 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDataEnd(MS_U32 u32Id,MS_BOOL bEnd)3726 HVD_EX_Result MDrv_HVD_EX_SetDataEnd(MS_U32 u32Id, MS_BOOL bEnd)
3727 {
3728 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3729 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3730
3731 HVD_EX_MSG_TRACE();
3732 _DRV_HVD_Inited(u8DrvId,eRet);
3733 _DRV_HVD_EX_Entry(u8DrvId);
3734
3735 if (bEnd)
3736 {
3737 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_DATA_END;
3738 }
3739 else
3740 {
3741 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DATA_END;
3742 }
3743
3744 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAYBACK_FINISH, bEnd);
3745
3746 _DRV_HVD_EX_RET(u8DrvId, eRet);
3747 }
3748
3749
MDrv_HVD_EX_SetCalFrameRate(MS_U32 u32Id,MS_BOOL bEnable)3750 HVD_EX_Result MDrv_HVD_EX_SetCalFrameRate(MS_U32 u32Id,MS_BOOL bEnable)
3751 {
3752 HVD_EX_Result eRet = E_HVD_EX_OK;
3753 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3754
3755 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bCalFrameRate = bEnable;
3756
3757 _DRV_HVD_EX_RET(u8DrvId, eRet);
3758 }
3759
MDrv_HVD_EX_SkipNFrame(MS_U32 u32Id,MS_U32 u32FrameCnt)3760 HVD_EX_Result MDrv_HVD_EX_SkipNFrame(MS_U32 u32Id, MS_U32 u32FrameCnt)
3761 {
3762 HVD_EX_Result eRet = E_HVD_EX_OK;
3763 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3764
3765 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_N_FRAME, u32FrameCnt);
3766
3767 _DRV_HVD_EX_RET(u8DrvId, eRet);
3768 }
3769
3770 //-----------------------------------------------------------------------------
3771 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispErrFrm()
3772 /// @brief \b Function \b Description: Enable/ Disable to decode and show error(broken) frames
3773 /// @param -bEnable \b IN : Enable/ Disable
3774 /// -FALSE(0): hide error frames
3775 /// -TRUE(1): show error frames
3776 /// @return -The result of command set display error frames
3777 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispErrFrm(MS_U32 u32Id,MS_BOOL bEnable)3778 HVD_EX_Result MDrv_HVD_EX_SetDispErrFrm(MS_U32 u32Id, MS_BOOL bEnable)
3779 {
3780 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3781 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3782
3783 HVD_EX_MSG_TRACE();
3784 _DRV_HVD_Inited(u8DrvId,eRet);
3785 _DRV_HVD_EX_Entry(u8DrvId);
3786
3787 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ERR_FRM, bEnable);
3788 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bIsShowErrFrm = bEnable;
3789
3790 _DRV_HVD_EX_RET(u8DrvId, eRet);
3791 }
3792
3793 //-----------------------------------------------------------------------------
3794 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispRepeatField()
3795 /// @brief \b Function \b Description: Enable/ Disable to show last field when FW needs to show repeated field
3796 /// @param -bEnable \b IN : Enable/ Disable
3797 /// -FALSE(0): disable this mode
3798 /// -TRUE(1): enable this mode
3799 /// @return -The result of command set display repeated field
3800 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispRepeatField(MS_U32 u32Id,MS_BOOL bEnable)3801 HVD_EX_Result MDrv_HVD_EX_SetDispRepeatField(MS_U32 u32Id, MS_BOOL bEnable)
3802 {
3803 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3804 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3805
3806 HVD_EX_MSG_TRACE();
3807 _DRV_HVD_Inited(u8DrvId,eRet);
3808 _DRV_HVD_EX_Entry(u8DrvId);
3809
3810 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, bEnable);
3811
3812 _DRV_HVD_EX_RET(u8DrvId, eRet);
3813 }
3814
3815 //-----------------------------------------------------------------------------
3816 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSkipDecMode()
3817 /// @brief \b Function \b Description: set the decoding frame type.
3818 /// @param -eDecType \b IN : decoding frame type
3819 /// @return -The result of command set skip decode mode
3820 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSkipDecMode(MS_U32 u32Id,HVD_EX_SkipDecode eDecType)3821 HVD_EX_Result MDrv_HVD_EX_SetSkipDecMode(MS_U32 u32Id, HVD_EX_SkipDecode eDecType)
3822 {
3823 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3824 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3825
3826 HVD_EX_MSG_TRACE();
3827 _DRV_HVD_Inited(u8DrvId,eRet);
3828 _DRV_HVD_EX_Entry(u8DrvId);
3829
3830 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
3831 if ((HVD_EX_SkipDecode) HAL_HVD_EX_GetData(E_HVD_GDATA_SKIP_MODE) != eDecType)
3832 #endif
3833 {
3834 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_DEC, eDecType);
3835
3836 if (eRet != E_HVD_EX_OK)
3837 {
3838 _DRV_HVD_EX_RET(u8DrvId, eRet);
3839 }
3840
3841 if (eDecType == E_HVD_EX_SKIP_DECODE_I)
3842 {
3843 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_I_DIRECT, TRUE);
3844 }
3845 else
3846 {
3847 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_I_DIRECT, FALSE);
3848 }
3849 }
3850
3851 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u8SkipMode = (MS_U8) eDecType;
3852
3853 _DRV_HVD_EX_RET(u8DrvId, eRet);
3854 }
3855 #ifdef VDEC3_FB
3856 //-----------------------------------------------------------------------------
3857 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFrmBuffAddr()
3858 /// @brief \b Function \b Description: specify the frame buffer address.
3859 /// @param -u32FrmBuffAddr \b IN : frame buffer address.
3860 /// @return -The result of command set frame buffer address.
3861 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFrmBuffAddr(MS_U32 u32Id,MS_PHY u32FrmBuffAddr)3862 HVD_EX_Result MDrv_HVD_EX_SetFrmBuffAddr(MS_U32 u32Id, MS_PHY u32FrmBuffAddr)
3863 {
3864 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3865 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3866
3867 HVD_EX_MSG_TRACE();
3868 // _DRV_HVD_Inited(u8DrvId,eRet);
3869 _DRV_HVD_EX_Entry(u8DrvId);
3870
3871 HVD_EX_MSG_DBG("Drv: set u32FrmBuffAddr = 0x%X\n", (MS_U32) u32FrmBuffAddr);
3872
3873 //#if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
3874 // if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) != u32FrmBuffAddr)
3875 //#endif
3876 {
3877 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FBADDR, u32FrmBuffAddr);
3878 }
3879 /*#if HVD_ENABLE_WAIT_CMD_FINISHED
3880 if (eRet == E_HVD_EX_OK)
3881 {
3882 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
3883 while (timer)
3884 {
3885 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) == u32FrmBuffAddr)
3886 {
3887 break;
3888 }
3889 HVD_Delay_ms(1);
3890 timer--;
3891 }
3892 }
3893 #endif*/
3894 _DRV_HVD_EX_RET(u8DrvId, eRet);
3895 }
3896
3897 //-----------------------------------------------------------------------------
3898 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFrmBuffSize()
3899 /// @brief \b Function \b Description: specify the frame buffer size.
3900 /// @param -u32FrmBuffSize \b IN : frame buffer size.
3901 /// @return -The result of command set frame buffer size.
3902 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFrmBuffSize(MS_U32 u32Id,MS_U32 u32FrmBuffSize)3903 HVD_EX_Result MDrv_HVD_EX_SetFrmBuffSize(MS_U32 u32Id, MS_U32 u32FrmBuffSize)
3904 {
3905 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3906 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3907
3908 HVD_EX_MSG_TRACE();
3909 // _DRV_HVD_Inited(u8DrvId,eRet);
3910 _DRV_HVD_EX_Entry(u8DrvId);
3911
3912 HVD_EX_MSG_DBG("Drv: set FrmBuffSize = 0x%X\n", (MS_U32) u32FrmBuffSize);
3913
3914 //#if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
3915 // if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) != u32FrmBuffSize)
3916 //#endif
3917 {
3918 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FBSIZE, u32FrmBuffSize);
3919 }
3920 /*#if HVD_ENABLE_WAIT_CMD_FINISHED
3921 if (eRet == E_HVD_EX_OK)
3922 {
3923 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
3924 while (timer)
3925 {
3926 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) == u32FrmBuffSize)
3927 {
3928 break;
3929 }
3930 HVD_Delay_ms(1);
3931 timer--;
3932 }
3933 }
3934 #endif*/
3935 _DRV_HVD_EX_RET(u8DrvId, eRet);
3936 }
3937 #endif
3938
3939 //-----------------------------------------------------------------------------
3940 /// @brief \b Function \b Name: MDrv_HVD_EX_SetMaxCMASize()
3941 /// @brief \b Function \b Description: specify the max cma frame buffer size.
3942 /// @param -u32MaxCMASize \b IN : max CMA frame buffer size.
3943 /// @param -u32MaxCMASize2 \b IN : max CMA frame buffer2 size.
3944 /// @return -The result of command set frame buffer address.
3945 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetMaxCMASize(MS_U32 u32Id,MS_U32 u32MaxCMASize,MS_U32 u32MaxCMASize2)3946 HVD_EX_Result MDrv_HVD_EX_SetMaxCMASize(MS_U32 u32Id, MS_U32 u32MaxCMASize, MS_U32 u32MaxCMASize2)
3947 {
3948 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3949 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3950
3951 HVD_EX_MSG_TRACE();
3952 _DRV_HVD_EX_Entry(u8DrvId);
3953
3954 HVD_EX_MSG_DBG("Drv: set max CMA Size=0x%x Size2=0x%x\n", u32MaxCMASize, u32MaxCMASize2);
3955
3956 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_MAX_CMA_SIZE, u32MaxCMASize);
3957
3958 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_MAX_CMA_SIZE2, u32MaxCMASize2);
3959
3960 eRet = E_HVD_RETURN_SUCCESS;
3961
3962 _DRV_HVD_EX_RET(u8DrvId, eRet);
3963 }
3964
3965 //-----------------------------------------------------------------------------
3966 /// @brief \b Function \b Name: MDrv_HVD_EX_SetMaxCMASize()
3967 /// @brief \b Function \b Description: specify the max cma frame buffer size.
3968 /// @param -u32MaxCMASize \b IN : max CMA frame buffer size.
3969 /// @param -u32MaxCMASize2 \b IN : max CMA frame buffer2 size.
3970 /// @return -The result of command set frame buffer address.
3971 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetCodecCapInfo(int eCodecType,void * pCodecCapInfo)3972 HVD_EX_Result MDrv_HVD_EX_GetCodecCapInfo( int eCodecType, void *pCodecCapInfo)
3973 {
3974 if(HAL_VPU_EX_GetCodecCapInfo( eCodecType, pCodecCapInfo))
3975 return E_HVD_RETURN_SUCCESS;
3976 else
3977 return E_HVD_RETURN_FAIL;
3978 }
3979
MDrv_HVD_EX_SetEnalbeHDR(MS_U32 u32Id,MS_BOOL bEnable)3980 HVD_EX_Result MDrv_HVD_EX_SetEnalbeHDR(MS_U32 u32Id, MS_BOOL bEnable)
3981 {
3982 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3983
3984 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3985
3986 HVD_EX_MSG_TRACE();
3987 _DRV_HVD_Inited(u8DrvId,eRet);
3988 _DRV_HVD_EX_Entry(u8DrvId);
3989
3990 HVD_EX_MSG_DBG("Drv: SetEnalbeHDR = %d\n", (unsigned int) bEnable);
3991
3992 if (pHVDDrvContext->gHVDPreCtrl[u8DrvId].bDVSingleLayerMode != TRUE)
3993 {
3994 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_ENABLE_HDR, bEnable);
3995 }
3996
3997 _DRV_HVD_EX_RET(u8DrvId, eRet);
3998 }
3999
MDrv_HVD_EX_SetHDR10PerFrame(MS_U32 u32Id,MS_BOOL bEnable)4000 HVD_EX_Result MDrv_HVD_EX_SetHDR10PerFrame(MS_U32 u32Id, MS_BOOL bEnable)
4001 {
4002 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4003
4004 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4005
4006 HVD_EX_MSG_TRACE();
4007 _DRV_HVD_Inited(u8DrvId,eRet);
4008 _DRV_HVD_EX_Entry(u8DrvId);
4009
4010 HVD_EX_MSG_DBG("Drv: SetHDR10PerFrame = %d\n", (unsigned int) bEnable);
4011
4012 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_HDR_PERFRAME, bEnable);
4013
4014 _DRV_HVD_EX_RET(u8DrvId, eRet);
4015
4016 }
4017
MDrv_HVD_EX_SetDVXCShmBuff(MS_U32 u32Id,MS_PHY u32FWBaseAddr,MS_PHY u32DVXCShmAddr,MS_SIZE u32DVXCShmSize)4018 HVD_EX_Result MDrv_HVD_EX_SetDVXCShmBuff(MS_U32 u32Id, MS_PHY u32FWBaseAddr, MS_PHY u32DVXCShmAddr, MS_SIZE u32DVXCShmSize)
4019 {
4020 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4021
4022 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4023
4024 MS_U8 u8XCShmMiuSel;
4025 MS_U32 u32XCShmStartOffset;
4026
4027 MS_U8 u8FWBaseMiuSel;
4028 MS_U32 u32FWBaseOffset;
4029
4030 MS_U32 u32MIUSel;
4031
4032 HVD_EX_MSG_TRACE();
4033 _DRV_HVD_Inited(u8DrvId,eRet);
4034 _DRV_HVD_EX_Entry(u8DrvId);
4035
4036 HVD_EX_MSG_DBG("Drv: SetDVXCShmAddr=0x%llx FWBaseAddr=0x%llx SetDVXCShmSize=0x%x\n",
4037 (unsigned long long int) u32DVXCShmAddr, (unsigned long long int)u32FWBaseAddr, u32DVXCShmSize);
4038
4039 _phy_to_miu_offset(u8FWBaseMiuSel, u32FWBaseOffset, u32FWBaseAddr);
4040 _phy_to_miu_offset(u8XCShmMiuSel, u32XCShmStartOffset, u32DVXCShmAddr);
4041
4042 if (u8FWBaseMiuSel != u8XCShmMiuSel)
4043 HVD_EX_MSG_ERR("[ERROR] XC share memory and VDEC Code base MIU selections are different\n");
4044 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_DV_XC_SHM_ADDR, (unsigned long)(u32XCShmStartOffset - u32FWBaseOffset));
4045
4046 if (eRet == E_HVD_EX_OK)
4047 {
4048 eRet = (HVD_EX_Result)HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DV_XC_SHM_SIZE, u32DVXCShmSize);
4049 u32MIUSel = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MIU_SEL);
4050
4051 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_XCSHM_MIUSEL));
4052 u32MIUSel |= (u8XCShmMiuSel << VDEC_XCSHM_MIUSEL);
4053
4054 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_MIU_SEL, u32MIUSel);
4055 }
4056
4057 _DRV_HVD_EX_RET(u8DrvId, eRet);
4058
4059 }
4060
4061 //-----------------------------------------------------------------------------
4062 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFrmBuffAddr()
4063 /// @brief \b Function \b Description: specify the frame buffer address.
4064 /// @param -u32FrmBuffAddr \b IN : frame buffer address.
4065 /// @return -The result of command set frame buffer address.
4066 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFrmBuff2(MS_U32 u32Id,MS_PHY u32FrmBuffAddr,MS_U32 u32FrmBuffSize)4067 HVD_EX_Result MDrv_HVD_EX_SetFrmBuff2(MS_U32 u32Id, MS_PHY u32FrmBuffAddr, MS_U32 u32FrmBuffSize)
4068 {
4069 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4070 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4071 MS_U8 u8Frm2MiuSel;
4072 MS_U32 u32FrmStartOffset;
4073 MS_U32 u32MIUSel;
4074
4075 HVD_EX_MSG_TRACE();
4076 _DRV_HVD_EX_Entry(u8DrvId);
4077
4078 HVD_EX_MSG_DBG("Drv: set u32FrmBuff2Addr = 0x%lX\n", (unsigned long)u32FrmBuffAddr);
4079
4080 _phy_to_miu_offset(u8Frm2MiuSel, u32FrmStartOffset, u32FrmBuffAddr);
4081 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8Frm2MiuSel = u8Frm2MiuSel;
4082
4083 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FRAMEBUF2_ADDR, u32FrmStartOffset);
4084
4085 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FRAMEBUF2_SIZE, u32FrmBuffSize);
4086
4087 u32MIUSel = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MIU_SEL);
4088 #if defined(CHIP_MASERATI) || defined(CHIP_MAXIM)
4089 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_HEVC ||
4090 (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_HEVC_DV)
4091 {
4092 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_HWBUF_MIUSEL));
4093 u32MIUSel |= (u8Frm2MiuSel << VDEC_HWBUF_MIUSEL);
4094 }
4095 #endif
4096
4097 #if defined(CHIP_MONET) || defined(CHIP_MANHATTAN) || defined(CHIP_MESSI) || defined(CHIP_MASERATI) || defined(CHIP_MAXIM) || defined(CHIP_K6) || defined(CHIP_K6LITE)
4098 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA8_MIUSEL));
4099 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA2_MIUSEL));
4100 u32MIUSel |= (u8Frm2MiuSel << VDEC_CHROMA8_MIUSEL);
4101 u32MIUSel |= (u8Frm2MiuSel << VDEC_CHROMA2_MIUSEL);
4102 #else
4103 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_LUMA2_MIUSEL));
4104 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA2_MIUSEL));
4105 u32MIUSel |= (u8Frm2MiuSel << VDEC_LUMA2_MIUSEL);
4106 u32MIUSel |= (u8Frm2MiuSel << VDEC_CHROMA2_MIUSEL);
4107 #endif
4108 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_BUF2_MIUSEL));
4109 u32MIUSel |= (u8Frm2MiuSel << VDEC_BUF2_MIUSEL);
4110
4111 #if SUPPORT_G2VP9
4112 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP9)
4113 {
4114 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_LUMA8_MIUSEL));
4115 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA8_MIUSEL));
4116 u32MIUSel |= (u8Frm2MiuSel << VDEC_LUMA8_MIUSEL);
4117 u32MIUSel |= (u8Frm2MiuSel << VDEC_CHROMA8_MIUSEL);
4118 }
4119 #endif
4120
4121 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_MIU_SEL, u32MIUSel);
4122
4123 eRet = E_HVD_RETURN_SUCCESS;
4124
4125 _DRV_HVD_EX_RET(u8DrvId, eRet);
4126 }
4127
4128 //-----------------------------------------------------------------------------
4129 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispSpeed()
4130 /// @brief \b Function \b Description: specify the display speed type.
4131 /// @param -eSpeed \b IN : display speed type
4132 /// @return -The result of command set display speed type
4133 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispSpeed(MS_U32 u32Id,HVD_EX_DispSpeed eSpeed)4134 HVD_EX_Result MDrv_HVD_EX_SetDispSpeed(MS_U32 u32Id, HVD_EX_DispSpeed eSpeed)
4135 {
4136 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4137 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4138
4139 HVD_EX_MSG_TRACE();
4140 _DRV_HVD_Inited(u8DrvId,eRet);
4141 _DRV_HVD_EX_Entry(u8DrvId);
4142
4143 HVD_EX_MSG_DBG("%d\n", (MS_S16) eSpeed);
4144
4145 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
4146 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) != eSpeed)
4147 #endif
4148 {
4149 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_SPEED, eSpeed);
4150 }
4151 #if HVD_ENABLE_WAIT_CMD_FINISHED
4152 if (eRet == E_HVD_EX_OK)
4153 {
4154 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
4155 while (timer)
4156 {
4157 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) == eSpeed)
4158 {
4159 break;
4160 }
4161 HVD_Delay_ms(1);
4162 timer--;
4163 }
4164 }
4165 #endif
4166 _DRV_HVD_EX_RET(u8DrvId, eRet);
4167 }
4168
4169 //-----------------------------------------------------------------------------
4170 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncActive()
4171 /// @brief \b Function \b Description: Enable/disable the sync of video time stamp and STC.
4172 /// @param -bEnable \b IN : Enable/ Disable
4173 /// -FALSE(0): Disable sync mode
4174 /// -TRUE(1): Enable sync mode
4175 /// @return -The result of command set sync active
4176 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncActive(MS_U32 u32Id,MS_BOOL bEnable)4177 HVD_EX_Result MDrv_HVD_EX_SetSyncActive(MS_U32 u32Id, MS_BOOL bEnable)
4178 {
4179 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4180 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4181
4182 HVD_EX_MSG_TRACE();
4183 _DRV_HVD_Inited(u8DrvId,eRet);
4184 _DRV_HVD_EX_Entry(u8DrvId);
4185
4186 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
4187 if (HAL_HVD_EX_GetData(E_HVD_GDATA_IS_SYNC_ON) != bEnable)
4188 #endif
4189 {
4190 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_ACTIVE, bEnable);
4191 }
4192 #if HVD_ENABLE_WAIT_CMD_FINISHED
4193 if (eRet == E_HVD_EX_OK)
4194 {
4195 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
4196 while (timer)
4197 {
4198 if (HAL_HVD_EX_GetData(E_HVD_GDATA_IS_SYNC_ON) == bEnable)
4199 {
4200 break;
4201 }
4202 HVD_Delay_ms(1);
4203 timer--;
4204 }
4205 }
4206 #endif
4207 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bIsSyncOn = bEnable;
4208
4209 _DRV_HVD_EX_RET(u8DrvId, eRet);
4210 }
4211
4212 //-----------------------------------------------------------------------------
4213 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDropMode()
4214 /// @brief \b Function \b Description: specify the way to drop decoded frames.
4215 /// @param -eMode \b IN : Drop display type.
4216 /// @param -u32Arg \b IN : The argument of eMode
4217 /// -( eMode == E_HVD_DROP_DISPLAY_AUTO) , Enable: (u32Arg = TRUE); Disable: (u32Arg = FALSE)
4218 /// -( eMode == E_HVD_EX_DROP_DISPLAY_ONCE) , u32Arg = not zero
4219 /// @return -The result of command set display speed type
4220 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDropMode(MS_U32 u32Id,HVD_EX_DropDisp eMode,MS_U32 u32Arg)4221 HVD_EX_Result MDrv_HVD_EX_SetDropMode(MS_U32 u32Id, HVD_EX_DropDisp eMode, MS_U32 u32Arg)
4222 {
4223 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4224 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4225
4226 HVD_EX_MSG_TRACE();
4227 _DRV_HVD_Inited(u8DrvId,eRet);
4228 _DRV_HVD_EX_Entry(u8DrvId);
4229
4230 if (eMode == E_HVD_EX_DROP_DISPLAY_AUTO)
4231 {
4232 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DROP_DISP_AUTO, u32Arg);
4233 }
4234 else if (eMode == E_HVD_EX_DROP_DISPLAY_ONCE)
4235 {
4236 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DROP_DISP_ONCE, u32Arg);
4237 }
4238 else
4239 {
4240 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
4241 }
4242
4243 _DRV_HVD_EX_RET(u8DrvId, eRet);
4244 }
4245
4246 //-----------------------------------------------------------------------------
4247 /// @brief \b Function \b Name: MDrv_HVD_EX_RstPTS()
4248 /// @brief \b Function \b Description: Reset HVD sync table
4249 /// @param -u32PTS \b IN : PTS base
4250 /// @return -The result of command reset PTS
4251 //-----------------------------------------------------------------------------
MDrv_HVD_EX_RstPTS(MS_U32 u32Id,MS_U32 u32PTS)4252 HVD_EX_Result MDrv_HVD_EX_RstPTS(MS_U32 u32Id, MS_U32 u32PTS)
4253 {
4254 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4255 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4256
4257 HVD_EX_MSG_TRACE();
4258 _DRV_HVD_Inited(u8DrvId,eRet);
4259 _DRV_HVD_EX_Entry(u8DrvId);
4260
4261 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RESET_PTS, u32PTS);
4262
4263 _DRV_HVD_EX_RET(u8DrvId, eRet);
4264 }
4265
4266 //-----------------------------------------------------------------------------
4267 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFrcMode()
4268 /// @brief \b Function \b Description: set the frame rate convert mode.
4269 /// @param -eMode \b IN : mode type
4270 /// @return -The result of command set frame rate convert mode
4271 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFrcMode(MS_U32 u32Id,HVD_EX_FrmRateConvMode eMode)4272 HVD_EX_Result MDrv_HVD_EX_SetFrcMode(MS_U32 u32Id, HVD_EX_FrmRateConvMode eMode)
4273 {
4274 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4275 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4276
4277 HVD_EX_MSG_TRACE();
4278 _DRV_HVD_Inited(u8DrvId,eRet);
4279 _DRV_HVD_EX_Entry(u8DrvId);
4280
4281 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_MODE, eMode);
4282
4283 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u8FrcMode = (MS_U8) eMode;
4284
4285 _DRV_HVD_EX_RET(u8DrvId, eRet);
4286 }
4287
4288 //-----------------------------------------------------------------------------
4289 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncTolerance()
4290 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
4291 /// @param -u32Arg \b IN : tolerance.
4292 /// @return -The result of command set sync tolerance
4293 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncTolerance(MS_U32 u32Id,MS_U32 u32Arg)4294 HVD_EX_Result MDrv_HVD_EX_SetSyncTolerance(MS_U32 u32Id, MS_U32 u32Arg)
4295 {
4296 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4297 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4298
4299 HVD_EX_MSG_TRACE();
4300 _DRV_HVD_Inited(u8DrvId,eRet);
4301 _DRV_HVD_EX_Entry(u8DrvId);
4302
4303 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_TOLERANCE, u32Arg);
4304
4305 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncTolerance = u32Arg;
4306
4307 _DRV_HVD_EX_RET(u8DrvId, eRet);
4308 }
4309
4310 //-----------------------------------------------------------------------------
4311 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncVideoDelay()
4312 /// @brief \b Function \b Description: Set the video delay from STC when sync mode active.
4313 /// @param -u32Arg \b IN : The video delay. unit:ms
4314 /// @return -The result of command set sync video delay
4315 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncVideoDelay(MS_U32 u32Id,MS_U32 u32Arg)4316 HVD_EX_Result MDrv_HVD_EX_SetSyncVideoDelay(MS_U32 u32Id, MS_U32 u32Arg)
4317 {
4318 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4319 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4320
4321 HVD_EX_MSG_TRACE();
4322 _DRV_HVD_Inited(u8DrvId,eRet);
4323 _DRV_HVD_EX_Entry(u8DrvId);
4324
4325 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_LIVE_STREAM)
4326 {
4327 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8TimeUnit)
4328 {
4329 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32) (u32Arg + HVD_DTV_VIDEO_DELAY));
4330 }
4331 else
4332 {
4333 eRet =
4334 (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg + ((MS_U32) HVD_DTV_VIDEO_DELAY * 90));
4335 }
4336 }
4337 else
4338 {
4339 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg);
4340 }
4341
4342 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncVideoDelay = u32Arg;
4343
4344 _DRV_HVD_EX_RET(u8DrvId, eRet);
4345 }
4346
4347 //-----------------------------------------------------------------------------
4348 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncFreeRunTH()
4349 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
4350 /// @param -u32Arg \b IN : theashold.
4351 /// - 0 : use FW default value
4352 /// - 0xFFFFFFFF : never free run, FW always do sync action.
4353 /// @return -The result of command set sync tolerance
4354 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncFreeRunTH(MS_U32 u32Id,MS_U32 u32Arg)4355 HVD_EX_Result MDrv_HVD_EX_SetSyncFreeRunTH(MS_U32 u32Id, MS_U32 u32Arg)
4356 {
4357 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4358 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4359
4360 HVD_EX_MSG_TRACE();
4361 _DRV_HVD_Inited(u8DrvId,eRet);
4362 _DRV_HVD_EX_Entry(u8DrvId);
4363
4364 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FREERUN_THRESHOLD, u32Arg);
4365
4366 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncFreeRunTH = u32Arg;
4367
4368 _DRV_HVD_EX_RET(u8DrvId, eRet);
4369 }
4370
4371 //-----------------------------------------------------------------------------
4372 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncRepeatTH()
4373 /// @brief \b Function \b Description: Set the repeat threashold under sync mode.
4374 /// @param -u32Arg \b IN : repeat times. 0x01 ~ 0xFF
4375 /// 0xff - repeat current frame until STC catch up PTS.
4376 /// @return -The result of command set sync repeat threashold
4377 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncRepeatTH(MS_U32 u32Id,MS_U32 u32Arg)4378 HVD_EX_Result MDrv_HVD_EX_SetSyncRepeatTH(MS_U32 u32Id, MS_U32 u32Arg)
4379 {
4380 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4381 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4382
4383 HVD_EX_MSG_TRACE();
4384 _DRV_HVD_Inited(u8DrvId,eRet);
4385 _DRV_HVD_EX_Entry(u8DrvId);
4386
4387 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_THRESHOLD, u32Arg);
4388
4389 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncRepeatTH = u32Arg;
4390
4391 _DRV_HVD_EX_RET(u8DrvId, eRet);
4392 }
4393
4394 //-----------------------------------------------------------------------------
4395 /// @brief \b Function \b Name: MDrv_HVD_EX_SetErrConceal()
4396 /// @brief \b Function \b Description: Enable/Disable error concealment.
4397 /// @param -bEnable \b IN : Enable/Disable
4398 /// -FALSE(0): Disable error concealment.
4399 /// -TRUE(1): Enable error concealment.
4400 /// @return -The result of command set sync tolerance
4401 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetErrConceal(MS_U32 u32Id,MS_BOOL bEnable)4402 HVD_EX_Result MDrv_HVD_EX_SetErrConceal(MS_U32 u32Id, MS_BOOL bEnable)
4403 {
4404 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4405 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4406
4407 HVD_EX_MSG_TRACE();
4408 _DRV_HVD_Inited(u8DrvId,eRet);
4409 _DRV_HVD_EX_Entry(u8DrvId);
4410
4411 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ERR_CONCEAL, bEnable);
4412
4413 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bIsErrConceal = bEnable;
4414
4415 _DRV_HVD_EX_RET(u8DrvId, eRet);
4416 }
4417
4418 //-----------------------------------------------------------------------------
4419 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDbgLevel()
4420 /// @brief \b Function \b Description: Set debug level
4421 /// @param -elevel \b IN : debug level
4422 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDbgLevel(HVD_EX_UartLevel eLevel)4423 void MDrv_HVD_EX_SetDbgLevel(HVD_EX_UartLevel eLevel)
4424 {
4425 VPU_EX_UartLevel eVpuLevel = E_VPU_EX_UART_LEVEL_NONE;
4426
4427 switch (eLevel)
4428 {
4429 case E_HVD_EX_UART_LEVEL_ERR:
4430 {
4431 u32UartCtrl = E_HVD_UART_CTRL_ERR;
4432 eVpuLevel = E_VPU_EX_UART_LEVEL_ERR;
4433 break;
4434 }
4435 case E_HVD_EX_UART_LEVEL_INFO:
4436 {
4437 u32UartCtrl = E_HVD_UART_CTRL_INFO | E_HVD_UART_CTRL_ERR;
4438 eVpuLevel = E_VPU_EX_UART_LEVEL_INFO;
4439 break;
4440 }
4441 case E_HVD_EX_UART_LEVEL_DBG:
4442 {
4443 u32UartCtrl = E_HVD_UART_CTRL_DBG | E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_INFO;
4444 eVpuLevel = E_VPU_EX_UART_LEVEL_DBG;
4445 break;
4446 }
4447 case E_HVD_EX_UART_LEVEL_TRACE:
4448 {
4449 u32UartCtrl = E_HVD_UART_CTRL_TRACE | E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_INFO | E_HVD_UART_CTRL_DBG;
4450 eVpuLevel = E_VPU_EX_UART_LEVEL_TRACE;
4451 break;
4452 }
4453 case E_HVD_EX_UART_LEVEL_FW:
4454 {
4455 u32UartCtrl = E_HVD_UART_CTRL_DISABLE;
4456
4457 HAL_HVD_EX_UartSwitch2FW(TRUE);
4458 break;
4459 }
4460 default:
4461 {
4462 u32UartCtrl = E_HVD_UART_CTRL_DISABLE;
4463 eVpuLevel = E_VPU_EX_UART_LEVEL_ERR;
4464 break;
4465 }
4466 }
4467 HAL_VPU_EX_SetDbgLevel(eVpuLevel);
4468 }
4469
4470 //-----------------------------------------------------------------------------
4471 /// @brief \b Function \b Name: MDrv_HVD_EX_SeekToPTS()
4472 /// @brief \b Function \b Description: Let FW decode to the input PTS by using full decoding speed. If FW reaches (equal to or larger than) input PTS, FW will pause automatically. This function can not work under MDrv_HVD_EX_SetSyncActive(TRUE).
4473 /// @param -u32PTS \b IN : specific PTS.
4474 /// -0: disable this mode. FW will go back to previous status (play or pause).
4475 /// -any not zero: enable this mode
4476 /// @return -The result of command seek to specific PTS.
4477 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SeekToPTS(MS_U32 u32Id,MS_U32 u32PTS)4478 HVD_EX_Result MDrv_HVD_EX_SeekToPTS(MS_U32 u32Id, MS_U32 u32PTS)
4479 {
4480 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4481 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4482
4483 HVD_EX_MSG_TRACE();
4484 _DRV_HVD_Inited(u8DrvId,eRet);
4485 _DRV_HVD_EX_Entry(u8DrvId);
4486
4487 eRet = _HVD_EX_Check_Cmd(u8DrvId, E_HVD_CHECK_CMD_SEEK2PTS);
4488
4489 if (eRet != E_HVD_EX_OK)
4490 {
4491 _DRV_HVD_EX_RET(u8DrvId, eRet);
4492 }
4493
4494 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_JUMP_TO_PTS, u32PTS);
4495
4496 _DRV_HVD_EX_RET(u8DrvId, eRet);
4497 }
4498
4499 //-----------------------------------------------------------------------------
4500 /// @brief \b Function \b Name: MDrv_HVD_EX_SkipToPTS()
4501 /// @brief \b Function \b Description: Let FW skip to the input PTS by using full decoding speed and start decode again after input PTS.
4502 /// @param -u32PTS \b IN : specific PTS.
4503 /// -0: disable this mode. FW will go back to previous status (play or pause).
4504 /// -any not zero: enable this mode
4505 /// @return -The result of command seek to specific PTS.
4506 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SkipToPTS(MS_U32 u32Id,MS_U32 u32PTS)4507 HVD_EX_Result MDrv_HVD_EX_SkipToPTS(MS_U32 u32Id, MS_U32 u32PTS)
4508 {
4509 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4510 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4511
4512 HVD_EX_MSG_TRACE();
4513 _DRV_HVD_Inited(u8DrvId,eRet);
4514 _DRV_HVD_EX_Entry(u8DrvId);
4515
4516 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_TO_PTS, u32PTS);
4517
4518 _DRV_HVD_EX_RET(u8DrvId, eRet);
4519 }
4520
4521 //-----------------------------------------------------------------------------
4522 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFreezeImg()
4523 /// @brief \b Function \b Description: Let FW stop updating frames when vsync, but decoding process is still going.
4524 /// @param -bEnable \b IN : Enable/Disable
4525 /// -FALSE(0): Disable freeze image.
4526 /// -TRUE(1): Enable freeze image.
4527 /// @return -The result of command freeze image.
4528 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFreezeImg(MS_U32 u32Id,MS_BOOL bEnable)4529 HVD_EX_Result MDrv_HVD_EX_SetFreezeImg(MS_U32 u32Id, MS_BOOL bEnable)
4530 {
4531 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4532 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4533
4534 HVD_EX_MSG_TRACE();
4535 _DRV_HVD_Inited(u8DrvId,eRet);
4536 _DRV_HVD_EX_Entry(u8DrvId);
4537
4538 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FREEZE_IMG, bEnable);
4539
4540 _DRV_HVD_EX_RET(u8DrvId, eRet);
4541 }
4542
4543 //-----------------------------------------------------------------------------
4544 /// @brief \b Function \b Name: MDrv_HVD_EX_SetBlueScreen()
4545 /// @brief \b Function \b Description: Let FW stop updating frames when vsync and keep blue screen , but decoding process is still going.
4546 /// @param -bEnable \b IN : Enable/Disable
4547 /// -FALSE(0): Disable blue screen.
4548 /// -TRUE(1): Enable blue screen.
4549 /// @return -The result of command set blue screen.
4550 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetBlueScreen(MS_U32 u32Id,MS_BOOL bEnable)4551 HVD_EX_Result MDrv_HVD_EX_SetBlueScreen(MS_U32 u32Id, MS_BOOL bEnable)
4552 {
4553 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4554 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4555
4556 HVD_EX_MSG_TRACE();
4557 _DRV_HVD_Inited(u8DrvId,eRet);
4558 _DRV_HVD_EX_Entry(u8DrvId);
4559
4560 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_BLUE_SCREEN, bEnable);
4561
4562 _DRV_HVD_EX_RET(u8DrvId, eRet);
4563 }
4564
4565 //-----------------------------------------------------------------------------
4566 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispOneField()
4567 /// @brief \b Function \b Description: Let FW only show one field(top field only).
4568 /// @param -bEnable \b IN : Enable/Disable
4569 /// -FALSE(0): Disable display one field.
4570 /// -TRUE(1): Enable display one field.
4571 /// @return -The result of command display one field.
4572 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispOneField(MS_U32 u32Id,MS_BOOL bEnable)4573 HVD_EX_Result MDrv_HVD_EX_SetDispOneField(MS_U32 u32Id, MS_BOOL bEnable)
4574 {
4575 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4576 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4577
4578 HVD_EX_MSG_TRACE();
4579 _DRV_HVD_Inited(u8DrvId,eRet);
4580 _DRV_HVD_EX_Entry(u8DrvId);
4581
4582 if (bEnable)
4583 {
4584 // force to show top field only.
4585 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_TOP);
4586 }
4587 else
4588 {
4589 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_OFF);
4590 }
4591
4592 _DRV_HVD_EX_RET(u8DrvId, eRet);
4593 }
4594
4595 //-----------------------------------------------------------------------------
4596 /// @brief \b Function \b Name: MDrv_HVD_EX_SetISREvent()
4597 /// @brief \b Function \b Description: Set the ISR event type sended by HVD fw.
4598 /// @param -u32Event \b IN : event types
4599 /// @param -fnISRHandler \b IN : function pointer to a interrupt handler.
4600 /// @return -The result of command set ISR event.
4601 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetISREvent(MS_U32 u32Id,MS_U32 u32Event,HVD_InterruptCb fnISRHandler)4602 HVD_EX_Result MDrv_HVD_EX_SetISREvent(MS_U32 u32Id, MS_U32 u32Event, HVD_InterruptCb fnISRHandler)
4603 {
4604 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4605 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4606 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
4607
4608 HVD_EX_MSG_TRACE();
4609 _DRV_HVD_Inited(u8DrvId,eRet);
4610 _DRV_HVD_EX_Entry(u8DrvId);
4611
4612 if (u32Event == E_HVD_EX_ISR_NONE)
4613 {
4614 MS_U32 i = 0;
4615 MS_BOOL bUsed = FALSE;
4616 ////OSAL_HVD_ISR_Disable();
4617 // Fix the ISR imbalance of Enable and Disable
4618 if(pCtrl->HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_HVD) // hvd case
4619 {
4620 for(i = 0; i < HVD_MAX_STREAMS; i++)
4621 {
4622 if(i != u8DrvId)
4623 {
4624 if((E_HWDEC_ISR_HVD == pHVDDrvContext->gHVDCtrl_EX[i].HVDISRCtrl.eHWDecIsr)
4625 && (TRUE == pHVDDrvContext->gHVDCtrl_EX[i].bUsed))
4626 {
4627 bUsed = TRUE;
4628 break;
4629 }
4630 }
4631 }
4632
4633 if(FALSE == bUsed)
4634 {
4635 #if defined(HAL_CHIP_SUPPORT_EVD)
4636 HAL_HVD_EX_EnableISR(u32Id, FALSE);
4637 #else
4638 HAL_HVD_EX_EnableISR(FALSE);
4639 #endif
4640 #if 0
4641 bHVDDisableISRFlag = OSAL_HVD_ISR_Disable(TRUE);
4642 if(bHVDDisableISRFlag == FALSE)
4643 {
4644 HVD_EX_MSG_ERR("%s Disable Interrupt Fail\n", __FUNCTION__);
4645 }
4646 //OSAL_HVD_ISR_Detach();
4647 #if !defined(SUPPORT_X_MODEL_HVD_FEATURE) && !defined(DISABLE_ISR_DETACH)
4648 if(TRUE == bHVDIsIsrAttached)
4649 {
4650 OSAL_HVD_ISR_Detach(pCtrl->HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_HVD);
4651 bHVDIsIsrAttached = FALSE;
4652 }
4653 #endif
4654 #endif
4655 }
4656 }
4657 else if(pCtrl->HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_EVD) // evd case
4658 {
4659 for(i = 0; i < HVD_MAX_STREAMS; i++)
4660 {
4661 if(i != u8DrvId)
4662 {
4663 if((E_HWDEC_ISR_EVD == pHVDDrvContext->gHVDCtrl_EX[i].HVDISRCtrl.eHWDecIsr)
4664 && (TRUE == pHVDDrvContext->gHVDCtrl_EX[i].bUsed))
4665 {
4666 bUsed = TRUE;
4667 break;
4668 }
4669 }
4670 }
4671
4672 if(FALSE == bUsed)
4673 {
4674 #if defined(HAL_CHIP_SUPPORT_EVD)
4675 HAL_HVD_EX_EnableISR(u32Id, FALSE);
4676 #else
4677 HAL_HVD_EX_EnableISR(FALSE);
4678 #endif
4679 #if 0
4680 bEVDDisableISRFlag = OSAL_HVD_ISR_Disable(FALSE);
4681 if(bEVDDisableISRFlag == FALSE)
4682 {
4683 HVD_EX_MSG_ERR("%s Disable Interrupt Fail\n", __FUNCTION__);
4684 }
4685 //OSAL_HVD_ISR_Detach();
4686 #if !defined(SUPPORT_X_MODEL_HVD_FEATURE) && !defined(DISABLE_ISR_DETACH)
4687 if(TRUE == bEVDIsIsrAttached)
4688 {
4689 OSAL_HVD_ISR_Detach(pCtrl->HVDISRCtrl.bIsHvdIsr);
4690 bEVDIsIsrAttached = FALSE;
4691 }
4692 #endif
4693 #endif
4694 }
4695 }
4696 pCtrl->Settings.bEnISR = FALSE;
4697 pCtrl->HVDISRCtrl.bRegISR = FALSE;
4698 pCtrl->HVDISRCtrl.pfnISRCallBack = NULL;
4699 pCtrl->Settings.u32IsrEvent = (MS_U32) E_HVD_EX_ISR_NONE;
4700 eRet = E_HVD_EX_OK;
4701 }
4702 else
4703 {
4704 if (fnISRHandler != NULL)
4705 {
4706 if(pCtrl->HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_HVD) //hvd case
4707 {
4708 if (FALSE == pHVDDrvContext->bHVDIsrAttached)
4709 {
4710 if (OSAL_HVD_ISR_Attach(E_HWDEC_ISR_HVD, (void*)_HVD_EX_ISRHandler) != TRUE)
4711 {
4712 HVD_EX_MSG_ERR("fail to attach HVD_IsrProc!\n");
4713 return E_HVD_EX_FAIL;
4714 }
4715
4716 pHVDDrvContext->bHVDIsrAttached = TRUE;
4717 }
4718
4719 if (FALSE == pHVDDrvContext->bHVDMSOSIsrEnable)
4720 {
4721 if (OSAL_HVD_ISR_Enable(E_HWDEC_ISR_HVD) != TRUE)
4722 {
4723 HVD_EX_MSG_ERR("fail to OSAL_HVD_IntEnable!\n");
4724 return E_HVD_EX_FAIL;
4725 }
4726
4727 pHVDDrvContext->bHVDMSOSIsrEnable = TRUE;
4728 }
4729 }
4730 #if SUPPORT_EVD
4731 if(pCtrl->HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_EVD) //evd case
4732 {
4733 if (FALSE == pHVDDrvContext->bEVDIsrAttached)
4734 {
4735 if (OSAL_HVD_ISR_Attach(E_HWDEC_ISR_EVD, (void*)_EVD_EX_ISRHandler) != TRUE)
4736 {
4737 HVD_EX_MSG_ERR("fail to attach HVD_IsrProc!\n");
4738 return E_HVD_EX_FAIL;
4739 }
4740
4741 pHVDDrvContext->bEVDIsrAttached = TRUE;
4742 }
4743
4744 if (FALSE == pHVDDrvContext->bEVDMSOSIsrEnable)
4745 {
4746 if (OSAL_HVD_ISR_Enable(E_HWDEC_ISR_EVD) != TRUE)
4747 {
4748 HVD_EX_MSG_ERR("fail to OSAL_HVD_IntEnable!\n");
4749 return E_HVD_EX_FAIL;
4750 }
4751
4752 pHVDDrvContext->bEVDMSOSIsrEnable = TRUE;
4753 }
4754 }
4755 #endif
4756 eRet = _HVD_MapRetEx( HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, u32Event));
4757
4758 if (eRet != E_HVD_EX_OK)
4759 {
4760 _DRV_HVD_EX_RET(u8DrvId, eRet);
4761 }
4762
4763 #if defined(HAL_CHIP_SUPPORT_EVD)
4764 HAL_HVD_EX_EnableISR(u32Id, TRUE);
4765 #else
4766 HAL_HVD_EX_EnableISR(TRUE);
4767 #endif
4768 pCtrl->Settings.bEnISR = TRUE;
4769 pCtrl->HVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack) fnISRHandler;
4770 pCtrl->Settings.u32IsrEvent = u32Event;
4771
4772 pCtrl->HVDISRCtrl.bRegISR = TRUE;
4773 eRet = E_HVD_EX_OK;
4774 }
4775 else
4776 {
4777 HVD_EX_MSG_ERR("SetISREvent with NULL pointer. ISR type:%lu\n", (unsigned long)u32Event);
4778 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
4779 }
4780 }
4781
4782 _DRV_HVD_EX_RET(u8DrvId, eRet);
4783 }
4784
4785 //-----------------------------------------------------------------------------
4786 /// @brief \b Function \b Name: MDrv_HVD_EX_SetEnableISR()
4787 /// @brief \b Function \b Description: Enable/Disable HVD interrupt.
4788 /// @param -bEnable \b IN : Enable/Disable
4789 /// -FALSE(0): Disable interrupt.
4790 /// -TRUE(1): Enable interrupt.
4791 /// @return -The result of command set enable ISR.
4792 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetEnableISR(MS_U32 u32Id,MS_BOOL bEnable)4793 MS_BOOL MDrv_HVD_EX_SetEnableISR(MS_U32 u32Id, MS_BOOL bEnable)
4794 {
4795 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4796
4797 HVD_EX_MSG_TRACE();
4798 _DRV_HVD_Inited(u8DrvId,FALSE);
4799
4800 #if defined(HAL_CHIP_SUPPORT_EVD)
4801 HAL_HVD_EX_EnableISR(u32Id, bEnable);
4802 #else
4803 HAL_HVD_EX_EnableISR(bEnable);
4804 #endif
4805 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bEnISR = bEnable;
4806
4807 return TRUE;
4808 }
4809
4810 //-----------------------------------------------------------------------------
4811 /// @brief \b Function \b Name: MDrv_HVD_EX_SetForceISR()
4812 /// @brief \b Function \b Description: test the HVD interrupt function. Force FW send one interrupt.
4813 /// @param -bEnable \b IN : Enable/Disable
4814 /// -FALSE(0): Clear force interrupt status from HK.
4815 /// -TRUE(1): force one interrupt from HK.
4816 /// @return -The result of command set force ISR.
4817 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetForceISR(MS_U32 u32Id,MS_BOOL bEnable)4818 MS_BOOL MDrv_HVD_EX_SetForceISR(MS_U32 u32Id, MS_BOOL bEnable)
4819 {
4820 HVD_EX_MSG_TRACE();
4821 //_DRV_HVD_Inited(FALSE);
4822 #if defined(HAL_CHIP_SUPPORT_EVD)
4823 HAL_HVD_EX_SetForceISR(u32Id, bEnable);
4824 #else
4825 UNUSED(u32Id);
4826 HAL_HVD_EX_SetForceISR(bEnable);
4827 #endif
4828 return TRUE;
4829 }
4830
4831 //-----------------------------------------------------------------------------
4832 /// @brief \b Function \b Name: MDrv_HVD_EX_SetMVOPDone()
4833 /// @brief \b Function \b Description: tell FW MVOP is ready for futher decode.
4834 /// @return -The result of command.
4835 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetMVOPDone(MS_U32 u32Id)4836 MS_BOOL MDrv_HVD_EX_SetMVOPDone(MS_U32 u32Id)
4837 {
4838 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4839 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4840 HVD_EX_MSG_TRACE();
4841 _DRV_HVD_Inited(u8DrvId,FALSE);
4842
4843 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_BLUE_SCREEN, FALSE);
4844
4845 if (E_HVD_EX_OK == eRet)
4846 {
4847 return TRUE;
4848 }
4849 else
4850 {
4851 return FALSE;
4852 }
4853 }
4854
4855 //-----------------------------------------------------------------------------
4856 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVirtualBox()
4857 /// @brief \b Function \b Description: Set DS width and Height to F/W
4858 /// @param -u16Width \b IN : frame width
4859 /// @param -u16Height \b IN : frame height
4860 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVirtualBox(MS_U32 u32Id,MS_U16 u16Width,MS_U16 u16Height)4861 HVD_EX_Result MDrv_HVD_EX_SetVirtualBox(MS_U32 u32Id, MS_U16 u16Width, MS_U16 u16Height)
4862 {
4863 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4864 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4865
4866 HVD_EX_MSG_TRACE();
4867 _DRV_HVD_Inited(u8DrvId,eRet);
4868 _DRV_HVD_EX_Entry(u8DrvId);
4869
4870 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_VIRTUAL_BOX_WIDTH, u16Width);
4871 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_VIRTUAL_BOX_HEIGHT, u16Height);
4872
4873 eRet = E_HVD_EX_OK;
4874 _DRV_HVD_EX_RET(u8DrvId, eRet);
4875 }
4876
4877 //-----------------------------------------------------------------------------
4878 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDynScalingParam()
4879 /// @brief \b Function \b Description: Pass scalar parameters to decoder
4880 /// @return -The result of command.
4881 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDynScalingParam(MS_U32 u32Id,void * pStAddr,MS_U32 u32Size)4882 HVD_EX_Result MDrv_HVD_EX_SetDynScalingParam(MS_U32 u32Id, void *pStAddr, MS_U32 u32Size)
4883 {
4884 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4885 //MS_PHY addr = 0;
4886 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4887
4888 HVD_EX_MSG_TRACE();
4889 _DRV_HVD_Inited(u8DrvId,eRet);
4890 _DRV_HVD_EX_Entry(u8DrvId);
4891
4892 if ((pStAddr == NULL) || (u32Size == 0))
4893 {
4894 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
4895 _DRV_HVD_Inited(u8DrvId,eRet);
4896 }
4897 else
4898 {
4899 #if 0
4900 // 1. copy data input data array
4901 addr = (MS_PHY)MDrv_HVD_EX_GetDynamicScalingInfo(u32Id, E_HVD_EX_DS_INFO_ADDR);
4902
4903 if(addr == 0x0)
4904 {
4905 eRet = E_HVD_EX_FAIL;
4906 _DRV_HVD_EX_RET(u8DrvId, eRet);
4907 }
4908
4909 HVD_memcpy(MS_PA2KSEG1(addr), pStAddr, u32Size);
4910 #endif
4911 // 2. while till FW finish it.
4912 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SCALER_INFO_NOTIFY, ((MS_U8 *)pStAddr)[0]);
4913 }
4914
4915 _DRV_HVD_EX_RET(u8DrvId, eRet);
4916 }
4917
4918 //-----------------------------------------------------------------------------
4919 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispInfoTH()
4920 /// @brief \b Function \b Description: Set the upper and lower limitation of a valid SPS.
4921 /// @param -DispInfoTH \b IN : tolerance.
4922 /// @return -The result of command set display inforation threshold
4923 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispInfoTH(MS_U32 u32Id,HVD_EX_DispInfoThreshold * DispInfoTH)4924 HVD_EX_Result MDrv_HVD_EX_SetDispInfoTH(MS_U32 u32Id, HVD_EX_DispInfoThreshold *DispInfoTH)
4925 {
4926 HVD_Disp_Info_TH DispInfoTHTmp;
4927 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4928 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4929
4930 HVD_EX_MSG_TRACE();
4931 _DRV_HVD_Inited(u8DrvId,eRet);
4932 _DRV_HVD_EX_Entry(u8DrvId);
4933
4934 if (DispInfoTH == NULL)
4935 {
4936 _DRV_HVD_EX_RET(u8DrvId, eRet);
4937 }
4938
4939 DispInfoTHTmp.u32FrmrateLowBound = DispInfoTH->u32FrmrateLowBound;
4940 DispInfoTHTmp.u32FrmrateUpBound = DispInfoTH->u32FrmrateUpBound;
4941 DispInfoTHTmp.u32MvopLowBound = DispInfoTH->u32MvopLowBound;
4942 DispInfoTHTmp.u32MvopUpBound = DispInfoTH->u32MvopUpBound;
4943
4944 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISP_INFO_TH, (MS_VIRT) (&DispInfoTHTmp));
4945
4946 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
4947
4948 HVD_memcpy((void *) &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.DispInfoTH), (void *) (DispInfoTH), sizeof(HVD_EX_DispInfoThreshold));
4949
4950 _DRV_HVD_EX_RET(u8DrvId, eRet);
4951 }
4952
4953 //-----------------------------------------------------------------------------
4954 /// @brief \b Function \b Name: MDrv_HVD_EX_SetIgnoreErrRef()
4955 /// @brief \b Function \b Description: Turn on / off ignore error reference.
4956 /// @param -b bFastDisplay \b IN : Enable/ Disable
4957 /// -FALSE(0): handle error reference
4958 /// -TRUE(1): ignore error reference
4959 /// @return -The result of command set ignore error reference
4960 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetIgnoreErrRef(MS_U32 u32Id,MS_BOOL bIgnore)4961 HVD_EX_Result MDrv_HVD_EX_SetIgnoreErrRef(MS_U32 u32Id, MS_BOOL bIgnore)
4962 {
4963 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4964 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4965
4966 HVD_EX_MSG_TRACE();
4967 _DRV_HVD_Inited(u8DrvId,eRet);
4968 _DRV_HVD_EX_Entry(u8DrvId);
4969
4970 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, bIgnore);
4971
4972 _DRV_HVD_EX_RET(u8DrvId, eRet);
4973 }
4974
4975 //-----------------------------------------------------------------------------
4976 /// @brief \b Function \b Name: MDrv_HVD_EX_ForceFollowDTVSpec()
4977 /// @brief \b Function \b Description: Turn on / off Force follow DTV Spec
4978 /// @param -b bEnable \b IN : Enable/ Disable
4979 /// -FALSE(0): Disable
4980 /// -TRUE(1): Enable
4981 /// @return -The result of command set force follow DTV spec
4982 //-----------------------------------------------------------------------------
MDrv_HVD_EX_ForceFollowDTVSpec(MS_U32 u32Id,MS_BOOL bEnable)4983 HVD_EX_Result MDrv_HVD_EX_ForceFollowDTVSpec(MS_U32 u32Id, MS_BOOL bEnable)
4984 {
4985 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4986 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4987
4988 HVD_EX_MSG_TRACE();
4989 _DRV_HVD_Inited(u8DrvId,eRet);
4990 _DRV_HVD_EX_Entry(u8DrvId);
4991
4992 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_DTV_SPEC, bEnable);
4993
4994 _DRV_HVD_EX_RET(u8DrvId, eRet);
4995 }
4996
4997 //-----------------------------------------------------------------------------
4998 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFastDisplay()
4999 /// @brief \b Function \b Description: Turn on / off fast display.
5000 /// @param -b bFastDisplay \b IN : Enable/ Disable
5001 /// -FALSE(0): normal display
5002 /// -TRUE(1): fast display
5003 /// @return -The result of command set fast display
5004 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFastDisplay(MS_U32 u32Id,MS_BOOL bFastDisplay)5005 HVD_EX_Result MDrv_HVD_EX_SetFastDisplay(MS_U32 u32Id, MS_BOOL bFastDisplay)
5006 {
5007 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
5008 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5009
5010 HVD_EX_MSG_TRACE();
5011 _DRV_HVD_Inited(u8DrvId,eRet);
5012 _DRV_HVD_EX_Entry(u8DrvId);
5013
5014 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FAST_DISP, bFastDisplay);
5015
5016 _DRV_HVD_EX_RET(u8DrvId, eRet);
5017 }
5018
5019 //-----------------------------------------------------------------------------
5020 /// @brief \b Function \b Name: MDrv_HVD_EX_DispOutsideMode()
5021 /// @brief \b Function \b Description: Turn on / off Disp control method which handle by app side
5022 /// @param -b bEnable \b IN : Enable/ Disable
5023 /// -FALSE(0): Disable
5024 /// -TRUE(1): Enable
5025 /// @return -
5026 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DispOutsideMode(MS_U32 u32Id,MS_BOOL bEnable)5027 HVD_EX_Result MDrv_HVD_EX_DispOutsideMode(MS_U32 u32Id, MS_BOOL bEnable)
5028 {
5029 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
5030 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5031
5032 HVD_EX_MSG_TRACE();
5033 _DRV_HVD_Inited(u8DrvId,eRet);
5034 _DRV_HVD_EX_Entry(u8DrvId);
5035 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE);
5036 //change to open max setting ,wait f/w release new fwHVD_if
5037 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_DISP_OUTSIDE, bEnable);
5038
5039 _DRV_HVD_EX_RET(u8DrvId, eRet);
5040 }
5041 // check status
5042
5043 //-----------------------------------------------------------------------------
5044 /// @brief \b Function \b Name: MDrv_HVD_EX_IsISROccured()
5045 /// @brief \b Function \b Description: Check if the ISR is occured or not.
5046 /// @return - Is occured or not
5047 /// @retval -FALSE(0): interrupt is not occured.
5048 /// @retval -TRUE(1): interrupt has been occured.
5049 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsISROccured(MS_U32 u32Id)5050 MS_BOOL MDrv_HVD_EX_IsISROccured(MS_U32 u32Id)
5051 {
5052 HVD_EX_MSG_TRACE();
5053 //_DRV_HVD_Inited(FALSE);
5054 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
5055 return HAL_HVD_EX_IsISROccured(u32Id);
5056 #else
5057 UNUSED(u32Id);
5058 return HAL_HVD_EX_IsISROccured();
5059 #endif
5060 }
5061
5062 //-----------------------------------------------------------------------------
5063 /// @brief \b Function \b Name: MDrv_HVD_EX_IsDispFinish()
5064 /// @brief \b Function \b Description: Check this file mode display is finish or not. only work after MDrv_HVD_EX_SetDataEnd(TRUE)
5065 /// @return - Is finish or not
5066 /// @retval -FALSE(0): Not finish or Not in file mode playback
5067 /// @retval -TRUE(1): Display Finished.
5068 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsDispFinish(MS_U32 u32Id)5069 MS_BOOL MDrv_HVD_EX_IsDispFinish(MS_U32 u32Id)
5070 {
5071 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5072 HVD_EX_MSG_TRACE();
5073 _DRV_HVD_Inited(u8DrvId,FALSE);
5074
5075 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_LIVE_STREAM)
5076 {
5077 return FALSE;
5078 }
5079
5080 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DATA_END)
5081 {
5082 #ifndef VDEC3
5083 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP8)
5084 {
5085 if (_HVD_EX_IsAllBufferEmpty_VP8(u32Id))
5086 {
5087 return TRUE;
5088 }
5089 else
5090 {
5091 return FALSE;
5092 }
5093 }
5094 else
5095 #endif
5096 {
5097 if (_HVD_EX_IsAllBufferEmpty(u32Id, FALSE))
5098 {
5099 return TRUE;
5100 }
5101 else
5102 {
5103 //_DRV_HVD_PushDummy();
5104 return FALSE;
5105 }
5106 }
5107 }
5108 else
5109 {
5110 return FALSE;
5111 }
5112 }
5113
5114 //-----------------------------------------------------------------------------
5115 /// @brief \b Function \b Name: MDrv_HVD_EX_IsFrameShowed()
5116 /// @brief \b Function \b Description: Is HVD Frame showed after TriggerDisp(TRUE) or first frame showed
5117 /// @return - Is frame showed or not
5118 /// @retval -FALSE(0): New Framed showed
5119 /// @retval -TRUE(1): Not showed
5120 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsFrameShowed(MS_U32 u32Id)5121 MS_BOOL MDrv_HVD_EX_IsFrameShowed(MS_U32 u32Id)
5122 {
5123 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5124
5125 HVD_EX_MSG_TRACE();
5126 _DRV_HVD_Inited(u8DrvId,FALSE);
5127
5128 if (!HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_1ST_FRM_RDY))
5129 {
5130 // 1st frame not ready or AV sync not ready
5131 return FALSE;
5132 }
5133 else
5134 {
5135 // 1st frame showed or AV sync ready
5136 if (_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL))
5137 {
5138 // control display
5139 return (MS_BOOL) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_FRAME_SHOWED);
5140 }
5141 else
5142 {
5143 // cotrol decode
5144 return TRUE;
5145 }
5146 }
5147 }
5148
5149 //-----------------------------------------------------------------------------
5150 /// @brief \b Function \b Name: MDrv_HVD_EX_IsStepDecodeDone()
5151 /// @brief \b Function \b Description: Is HVD step decode done after step decode command.
5152 /// @return - TRUE/FALSE
5153 /// @retval -FALSE(0): decoding, or user did not send corresponding step decode command.
5154 /// @retval -TRUE(1): decode done
5155 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsStepDecodeDone(MS_U32 u32Id)5156 MS_BOOL MDrv_HVD_EX_IsStepDecodeDone(MS_U32 u32Id)
5157 {
5158 MS_BOOL bRet = FALSE;
5159 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5160
5161 HVD_EX_MSG_TRACE();
5162 _DRV_HVD_Inited(u8DrvId,FALSE);
5163
5164 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding)
5165 {
5166 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt !=
5167 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT))
5168 {
5169 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt = 0;
5170 bRet = TRUE;
5171 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding = FALSE;
5172 }
5173 }
5174
5175 return bRet;
5176 }
5177
5178 //-----------------------------------------------------------------------------
5179 /// @brief \b Function \b Name: MDrv_HVD_EX_CheckDispInfoRdy()
5180 /// @brief \b Function \b Description: check display info ready and correct or not
5181 /// @return -The result of command check display infor ready or not
5182 //-----------------------------------------------------------------------------
MDrv_HVD_EX_CheckDispInfoRdy(MS_U32 u32Id)5183 HVD_EX_Result MDrv_HVD_EX_CheckDispInfoRdy(MS_U32 u32Id)
5184 {
5185 MS_U32 u32ErrCode = 0;
5186 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
5187 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5188
5189 HVD_EX_MSG_TRACE();
5190 _DRV_HVD_Inited(u8DrvId,eRet);
5191
5192 #if defined(SUPPORT_CMA)
5193 if (pHVDDrvContext->bCMAUsed && !HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_CMA_ALLOC_DONE))
5194 {
5195 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
5196 struct CMA_Pool_Alloc_Param alloc_param, alloc_param2;
5197 MS_U32 framebuf_size, framebuf_size2 = 0;
5198 MS_U8 u8BitMiuSel = 0;
5199 MS_U8 u8CodeMiuSel = 0;
5200 MS_U8 u8FBMiuSel = 0, u8FB2MiuSel = 0;
5201 MS_U32 u32BitStartOffset;
5202 MS_U32 u32CodeStartOffset;
5203
5204 framebuf_size = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRAMEBUF_SIZE);
5205 if (framebuf_size == 0)
5206 return E_HVD_EX_RET_NOTREADY;
5207
5208 if (pHVDDrvContext->bCMATwoMIU[u8DrvId])
5209 {
5210 framebuf_size2 = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRAMEBUF2_SIZE);
5211 if (framebuf_size2 == 0)
5212 return E_HVD_EX_RET_NOTREADY;
5213 }
5214 alloc_param.pool_handle_id = pHVDDrvContext->cmaInitParam[0].pool_handle_id;
5215 alloc_param.offset_in_pool = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRAMEBUF_ADDR) - pHVDDrvContext->cmaInitParam[0].heap_miu_start_offset;
5216 alloc_param.length = framebuf_size;
5217 alloc_param.flags = CMA_FLAG_VIRT_ADDR;
5218 if (MApi_CMA_Pool_GetMem(&alloc_param) == FALSE)
5219 return E_HVD_EX_RET_CMA_ERROR;
5220
5221 VPRINTF("[VDEC][%d]MApi_CMA_Pool_GetMem in hvd: alloc_param.pool_handle_id=%x, alloc_param.flags=%x, alloc_param.offset_in_pool=%llx, alloc_param.length=%x\n",
5222 (unsigned int)u8DrvId,
5223 (unsigned int)alloc_param.pool_handle_id,
5224 (unsigned int)alloc_param.flags,
5225 (unsigned long long int)alloc_param.offset_in_pool,
5226 (unsigned int)alloc_param.length);
5227
5228 pHVDDrvContext->cmaFreeParam[0][u8DrvId].pool_handle_id = alloc_param.pool_handle_id;
5229 pHVDDrvContext->cmaFreeParam[0][u8DrvId].offset_in_pool = alloc_param.offset_in_pool;
5230 pHVDDrvContext->cmaFreeParam[0][u8DrvId].length = alloc_param.length;
5231 u8FBMiuSel = pHVDDrvContext->cmaInitParam[0].miu;
5232 HVD_EX_MSG_DBG("[0x%lx]MApi_CMA_Pool_GetMem:offset=0x%lx, len=0x%lx, miu=%ld\n", u32Id, alloc_param.offset_in_pool, alloc_param.length, pHVDDrvContext->cmaInitParam[0].miu);
5233
5234 if (pHVDDrvContext->bCMATwoMIU[u8DrvId])
5235 {
5236 alloc_param2.pool_handle_id = pHVDDrvContext->cmaInitParam[1].pool_handle_id;
5237 alloc_param2.offset_in_pool = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRAMEBUF2_ADDR) - pHVDDrvContext->cmaInitParam[1].heap_miu_start_offset;
5238 alloc_param2.length = framebuf_size2;
5239 alloc_param2.flags = CMA_FLAG_VIRT_ADDR;
5240 if (MApi_CMA_Pool_GetMem(&alloc_param2) == FALSE)
5241 return E_HVD_EX_RET_CMA_ERROR;
5242
5243 VPRINTF("[VDEC][%d]MApi_CMA_Pool_GetMem in hvd2: alloc_param.pool_handle_id=%x, alloc_param.flags=%x, alloc_param.offset_in_pool=%llx, alloc_param.length=%x\n",
5244 (unsigned int)u8DrvId,
5245 (unsigned int)alloc_param.pool_handle_id,
5246 (unsigned int)alloc_param.flags,
5247 (unsigned long long int)alloc_param.offset_in_pool,
5248 (unsigned int)alloc_param.length);
5249
5250 pHVDDrvContext->cmaFreeParam[1][u8DrvId].pool_handle_id = alloc_param2.pool_handle_id;
5251 pHVDDrvContext->cmaFreeParam[1][u8DrvId].offset_in_pool = alloc_param2.offset_in_pool;
5252 pHVDDrvContext->cmaFreeParam[1][u8DrvId].length = alloc_param2.length;
5253 u8FB2MiuSel = pHVDDrvContext->cmaInitParam[1].miu;
5254 HVD_EX_MSG_DBG("[0x%lx]MApi_CMA_Pool_GetMem:offset=0x%lx, len=0x%lx, miu=%ld\n", u32Id, alloc_param2.offset_in_pool, alloc_param2.length, pHVDDrvContext->cmaInitParam[1].miu);
5255 }
5256 else
5257 {
5258 u8FB2MiuSel = u8FBMiuSel;
5259 }
5260
5261 _phy_to_miu_offset(u8BitMiuSel, u32BitStartOffset, pCtrl->MemMap.u32BitstreamBufAddr);
5262 _phy_to_miu_offset(u8CodeMiuSel, u32CodeStartOffset, pCtrl->MemMap.u32CodeBufAddr);
5263
5264 MS_U32 u32MIUSel = (u8BitMiuSel << VDEC_BS_MIUSEL) |
5265 (u8FBMiuSel << VDEC_LUMA8_MIUSEL) |
5266 // (u8FBMiuSel << VDEC_CHROMA8_MIUSEL) |
5267 // (u8FB2MiuSel << VDEC_LUMA2_MIUSEL) |
5268 (u8FB2MiuSel << VDEC_CHROMA2_MIUSEL) |
5269 (u8FBMiuSel << VDEC_HWBUF_MIUSEL) |
5270 (u8FBMiuSel << VDEC_BUF1_MIUSEL) |
5271 (u8FB2MiuSel << VDEC_BUF2_MIUSEL) |
5272 (u8FBMiuSel << VDEC_PPIN_MIUSEL);
5273 #ifdef CHIP_MONET
5274 u32MIUSel |= (u8FB2MiuSel << VDEC_CHROMA8_MIUSEL) |
5275 (u8FBMiuSel << VDEC_LUMA2_MIUSEL);
5276 #else
5277 u32MIUSel |= (u8FBMiuSel << VDEC_CHROMA8_MIUSEL) |
5278 (u8FB2MiuSel << VDEC_LUMA2_MIUSEL);
5279 #endif
5280 #if defined(CHIP_MASERATI) || defined(CHIP_MAXIM)
5281 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_HEVC ||
5282 (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_HEVC_DV)
5283 {
5284 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_HWBUF_MIUSEL));
5285 u32MIUSel |= (u8FB2MiuSel << VDEC_HWBUF_MIUSEL);
5286 }
5287 #endif
5288 #if SUPPORT_G2VP9
5289 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP9)
5290 {
5291 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_LUMA8_MIUSEL));
5292 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA8_MIUSEL));
5293 u32MIUSel |= (u8FB2MiuSel << VDEC_LUMA8_MIUSEL);
5294 u32MIUSel |= (u8FB2MiuSel << VDEC_CHROMA8_MIUSEL);
5295 }
5296 #endif
5297
5298 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_MIU_SEL, u32MIUSel);
5299
5300 HVD_EX_MSG_DBG("E_HVD_SDATA_MIU_SEL = 0x%lx\n", u32MIUSel);
5301
5302 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_CMA_ALLOC_DONE, 1);
5303 }
5304 #endif
5305
5306 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
5307 {
5308 if (!HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_CHANGE))
5309 {
5310 return E_HVD_EX_RET_NOTREADY;
5311 }
5312 else
5313 {
5314 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = TRUE;
5315 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_INFO_RDY);
5316 }
5317 }
5318
5319 // check if FW report error
5320 u32ErrCode = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ERROR_CODE);
5321
5322 if (u32ErrCode != 0)
5323 {
5324 if (u32ErrCode == E_HVD_ERR_OUT_OF_MEMORY)
5325 {
5326 HVD_EX_MSG_ERR
5327 ("FW error that Out of Memory:%x. Allocated frame buffer size is smaller than required.\n",
5328 u32ErrCode);
5329 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = FALSE;
5330 return E_HVD_EX_RET_OUTOF_MEMORY;
5331 }
5332 }
5333
5334 return E_HVD_EX_OK;
5335 }
5336
5337 //-----------------------------------------------------------------------------
5338 /// @brief \b Function \b Name: MDrv_HVD_EX_IsDispInfoChg()
5339 /// @brief \b Function \b Description: check display info is changed or not
5340 /// @return - TRUE / FALSE
5341 /// @retval -FALSE(0): not changed
5342 /// @retval -TRUE(1): changed
5343 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsDispInfoChg(MS_U32 u32Id)5344 MS_BOOL MDrv_HVD_EX_IsDispInfoChg(MS_U32 u32Id)
5345 {
5346 MS_BOOL bRet = FALSE;
5347 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5348
5349 HVD_EX_MSG_TRACE();
5350 _DRV_HVD_Inited(u8DrvId,FALSE);
5351
5352 bRet = (MS_BOOL) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_CHANGE);
5353
5354 if (bRet)
5355 {
5356 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = TRUE;
5357 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_INFO_RDY);
5358 }
5359 #if 0 // debug use
5360 {
5361 static MS_U32 u32DecodeCnt = 0;
5362 static MS_U32 u32IdleCnt = 0;
5363 MS_U32 tmp = 0;
5364 tmp = MDrv_HVD_EX_GetDecodeCnt(u32Id);
5365
5366 if (u32DecodeCnt != tmp)
5367 {
5368 HVD_PRINT("%u decode cnt:%x PTS:%x\n", (MS_U32) bRet, tmp, MDrv_HVD_EX_GetPTS(u32Id));
5369 u32DecodeCnt = tmp;
5370 }
5371 else
5372 {
5373 u32IdleCnt++;
5374 }
5375 if (u32IdleCnt > 1000)
5376 {
5377 HVD_PRINT("HVD: seems IDLE: %u decode cnt:%x PTS:%x\n", (MS_U32) bRet, tmp, MDrv_HVD_EX_GetPTS(u32Id));
5378 u32IdleCnt = 0;
5379 }
5380 }
5381 #endif
5382 return bRet;
5383 }
5384
5385 //-----------------------------------------------------------------------------
5386 /// @brief \b Function \b Name: MDrv_HVD_EX_IsIdle()
5387 /// @brief \b Function \b Description: check decoder is idle or not
5388 /// @return - TRUE / FALSE
5389 /// @retval -FALSE(0): decoder is not idle
5390 /// @retval -TRUE(1): decoder is idle
5391 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsIdle(MS_U32 u32Id)5392 MS_BOOL MDrv_HVD_EX_IsIdle(MS_U32 u32Id)
5393 {
5394 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5395 HVD_EX_MSG_TRACE();
5396 _DRV_HVD_Inited(u8DrvId,FALSE);
5397
5398 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > HVD_FW_IDLE_THRESHOLD)
5399 {
5400 return TRUE;
5401 }
5402 else
5403 {
5404 return FALSE;
5405 }
5406 }
5407
5408 //-----------------------------------------------------------------------------
5409 /// @brief \b Function \b Name: MDrv_HVD_EX_IsSyncStart()
5410 /// @brief \b Function \b Description: check decoder starts to do sync action(drop or repeat) or not.
5411 /// @return - TRUE / FALSE
5412 /// @retval -FALSE(0): decoder is not doing sync action
5413 /// @retval -TRUE(1): decoder is doing sync action
5414 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsSyncStart(MS_U32 u32Id)5415 MS_BOOL MDrv_HVD_EX_IsSyncStart(MS_U32 u32Id)
5416 {
5417 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5418 HVD_EX_MSG_TRACE();
5419 _DRV_HVD_Inited(u8DrvId,FALSE);
5420
5421 if ((MS_BOOL) MDrv_HVD_EX_GetPlayMode(u32Id, E_HVD_EX_GMODE_IS_SYNC_ON) == FALSE)
5422 {
5423 return FALSE;
5424 }
5425 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_SYNC_START))
5426 {
5427 return TRUE;
5428 }
5429 else
5430 {
5431 return FALSE;
5432 }
5433 }
5434
5435 //-----------------------------------------------------------------------------
5436 /// @brief \b Function \b Name: MDrv_HVD_EX_IsSyncReach()
5437 /// @brief \b Function \b Description: The distance of Video time stamp and STC is closed enough.
5438 /// @return - TRUE / FALSE
5439 /// @retval -FALSE(0): The distance is not shorter than sync tolerance.
5440 /// @retval -TRUE(1): The distance is shorter than sync tolerance.
5441 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsSyncReach(MS_U32 u32Id)5442 MS_BOOL MDrv_HVD_EX_IsSyncReach(MS_U32 u32Id)
5443 {
5444 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5445 HVD_EX_MSG_TRACE();
5446 _DRV_HVD_Inited(u8DrvId,FALSE);
5447
5448 if ((MS_BOOL) MDrv_HVD_EX_GetPlayMode(u32Id, E_HVD_EX_GMODE_IS_SYNC_ON) == FALSE)
5449 {
5450 return FALSE;
5451 }
5452
5453 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_SYNC_REACH))
5454 {
5455 return TRUE;
5456 }
5457 else
5458 {
5459 return FALSE;
5460 }
5461 }
5462
5463 //-----------------------------------------------------------------------------
5464 /// @brief \b Function \b Name: MDrv_HVD_EX_IsLowDelay()
5465 /// @brief \b Function \b Description: check if current stream has low delay flag in SPS.
5466 /// @return - TRUE / FALSE
5467 /// @retval -FALSE(0): Low delay flag not found.
5468 /// @retval -TRUE(1): Low delay flag found.
5469 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsLowDelay(MS_U32 u32Id)5470 MS_BOOL MDrv_HVD_EX_IsLowDelay(MS_U32 u32Id)
5471 {
5472 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5473 HVD_EX_MSG_TRACE();
5474 _DRV_HVD_Inited(u8DrvId,FALSE);
5475
5476 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_AVC_LOW_DELAY))
5477 {
5478 return TRUE;
5479 }
5480 else
5481 {
5482 return FALSE;
5483 }
5484 }
5485
5486 //-----------------------------------------------------------------------------
5487 /// @brief \b Function \b Name: MDrv_HVD_EX_IsIFrmFound()
5488 /// @brief \b Function \b Description: check if I frame found after Init() or flush().
5489 /// @return - TRUE / FALSE
5490 /// @retval -FALSE(0): I frame is not found.
5491 /// @retval -TRUE(1): I frame has been found.
5492 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsIFrmFound(MS_U32 u32Id)5493 MS_BOOL MDrv_HVD_EX_IsIFrmFound(MS_U32 u32Id)
5494 {
5495 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5496 HVD_EX_MSG_TRACE();
5497 _DRV_HVD_Inited(u8DrvId,FALSE);
5498
5499 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_I_FRM_FOUND))
5500 {
5501 return TRUE;
5502 }
5503 else
5504 {
5505 return FALSE;
5506 }
5507 }
5508
5509 //-----------------------------------------------------------------------------
5510 /// @brief \b Function \b Name: MDrv_HVD_EX_Is1stFrmRdy()
5511 /// @brief \b Function \b Description: check if first frame showed on screen after Init() or flush().
5512 /// @return - TRUE / FALSE
5513 /// @retval -FALSE(0): First frame is not showed.
5514 /// @retval -TRUE(1): First frame is showed.
5515 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Is1stFrmRdy(MS_U32 u32Id)5516 MS_BOOL MDrv_HVD_EX_Is1stFrmRdy(MS_U32 u32Id)
5517 {
5518 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5519 HVD_EX_MSG_TRACE();
5520 _DRV_HVD_Inited(u8DrvId,FALSE);
5521
5522 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_1ST_FRM_RDY))
5523 {
5524 return TRUE;
5525 }
5526 else
5527 {
5528 return FALSE;
5529 }
5530 }
5531
5532 //-----------------------------------------------------------------------------
5533 /// @brief \b Function \b Name: MDrv_HVD_EX_IsAllBufferEmpty()
5534 /// @brief \b Function \b Description: check if all of the buffers(display, decoded, BBU, bitstream) are empty.
5535 /// @return - TRUE / FALSE
5536 /// @retval -FALSE(0): Not Empty.
5537 /// @retval -TRUE(1): Empty.
5538 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id)5539 MS_BOOL MDrv_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id)
5540 {
5541 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5542 //HVD_MSG_TRACE();
5543 _DRV_HVD_Inited(u8DrvId,FALSE);
5544
5545 if (_HVD_EX_IsAllBufferEmpty(u32Id, FALSE))
5546 {
5547 return TRUE;
5548 }
5549 else
5550 {
5551 return FALSE;
5552 }
5553 #if 0
5554 if (u32Times > 200)
5555 {
5556 HVD_EX_MSG_INF("Flush() timeout failed:BBU:%u Dec:%u Disp:%u Idle:%u ESr:%x ESw:%x \n",
5557 HAL_HVD_EX_GetData(E_HVD_GDATA_BBU_Q_NUMB),
5558 HAL_HVD_EX_GetData(E_HVD_GDATA_DEC_Q_NUMB),
5559 HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_NUMB),
5560 HAL_HVD_EX_GetData(E_HVD_GDATA_VPU_IDLE_CNT),
5561 HAL_HVD_EX_GetData(E_HVD_GDATA_ES_READ_PTR), HAL_HVD_EX_GetData(E_HVD_GDATA_ES_WRITE_PTR));
5562 eRet = E_HVD_EX_FAIL;
5563 break;
5564 }
5565 return TRUE;
5566 #endif
5567 }
5568
5569 // get infomation
5570
5571 //-----------------------------------------------------------------------------
5572 /// @brief \b Function \b Name: MDrv_HVD_EX_GetBBUVacancy()
5573 /// @brief \b Function \b Description: get the vacancy of BBU queue.
5574 /// @return - TRUE / FALSE
5575 /// @retval -0: queue is full.
5576 /// @retval -not zero: queue is not full.
5577 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetBBUVacancy(MS_U32 u32Id)5578 MS_U32 MDrv_HVD_EX_GetBBUVacancy(MS_U32 u32Id)
5579 {
5580 #ifdef VDEC3
5581 MS_U32 u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
5582 return HAL_VPU_EX_GetVBBUVacancy(u32VBBUAddr);
5583 #else
5584 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5585 MS_U32 u32BBUQnumb = 0;
5586 MS_U32 u32BBUTotal = 0;
5587 MS_U32 u32PTSQnumb = 0;
5588 MS_U32 u32PTSTotal = 0;
5589
5590 HVD_EX_MSG_TRACE();
5591 _DRV_HVD_Inited(u8DrvId,FALSE);
5592
5593 u32BBUTotal = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TOTAL_TBL_ENTRY);
5594 u32BBUQnumb = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB);
5595
5596 if (u32BBUTotal < u32BBUQnumb)
5597 {
5598 HVD_EX_MSG_ERR("Total BBUs(%lx) is less than the current(%lx)\n", u32BBUTotal, u32BBUQnumb);
5599 u32BBUQnumb = 0;
5600 }
5601 else
5602 {
5603 u32BBUQnumb = u32BBUTotal - u32BBUQnumb;
5604
5605 if (u32BBUQnumb < MIN_BBU_VACANCY_FOR_4K2K)
5606 {
5607 HVD_EX_MSG_DBG("BBU Vacancy(%lx) is less than MIN_BBU_VACANCY_FOR_4K2K(%x)\n", u32BBUQnumb, MIN_BBU_VACANCY_FOR_4K2K);
5608 u32BBUQnumb = 0;
5609 }
5610 }
5611
5612 #if HVD_ENABLE_MVC
5613 if ( u32BBUQnumb &&
5614 ( (HAL_HVD_EX_CheckMVCID(u32Id) == FALSE) ||
5615 ((HAL_HVD_EX_CheckMVCID(u32Id) == TRUE) && (E_VDEC_EX_MAIN_VIEW == HAL_HVD_EX_GetView(u32Id))) )
5616 )
5617 #else
5618 if (u32BBUQnumb)
5619 #endif
5620 {
5621 u32PTSTotal = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_PTS_TOTAL_ENTRY_NUMB) - 1; // add -1 for full case
5622 u32PTSQnumb = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_PTS_Q_NUMB);
5623
5624 if (u32PTSTotal <= u32PTSQnumb)
5625 {
5626 HVD_EX_MSG_DBG
5627 ("Warn: GetBBUVacancy has error that total PTS Q number(%lx) is smaller than current PTS Q number(%lx)\n",
5628 u32PTSTotal, u32PTSQnumb);
5629 u32BBUQnumb = 0;
5630 }
5631 }
5632
5633 return u32BBUQnumb;
5634 #endif
5635 }
5636
5637 //-----------------------------------------------------------------------------
5638 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDispInfo()
5639 /// @brief \b Function \b Description: Get video display information
5640 /// @param -pinfo \b OUT : pointer to video display information.
5641 /// @return -The result of command get display information
5642 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDispInfo(MS_U32 u32Id,HVD_EX_DispInfo * pInfo)5643 HVD_EX_Result MDrv_HVD_EX_GetDispInfo(MS_U32 u32Id, HVD_EX_DispInfo *pInfo)
5644 {
5645 HVD_EX_Result eRet = E_HVD_EX_FAIL;
5646 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5647
5648 eRet = _HVD_EX_GetDispInfo(u32Id, pInfo, TRUE);
5649 if (E_HVD_EX_OK == eRet)
5650 {
5651 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
5652 pCtrl->bFrmRateSupported = HAL_HVD_EX_GetFrmRateIsSupported(u32Id, pInfo->u16HorSize, pInfo->u16VerSize, pInfo->u32FrameRate);
5653 HVD_EX_MSG_DBG("bFrmRateSupported[0x%x]=%x\n", u8DrvId, pCtrl->bFrmRateSupported);
5654 }
5655
5656 #if HVD_ENABLE_RV_FEATURE
5657 if (HVD_INIT_HW_RM == (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
5658 {
5659 //RM is always displayed by 60 frames per sec.
5660 pInfo->u32FrameRate = 60000;
5661 HVD_EX_MSG_DBG("rm force set 60fps\n");
5662 }
5663 #endif
5664
5665 return eRet;
5666 }
5667
5668 //-----------------------------------------------------------------------------
5669 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPtsStcDiff()
5670 /// @brief \b Function \b Description: Get the difference of PTS and STC
5671 /// @return - PTS
5672 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPtsStcDiff(MS_U32 u32Id)5673 MS_S64 MDrv_HVD_EX_GetPtsStcDiff(MS_U32 u32Id)
5674 {
5675 MS_S64 s64PTS = 0;
5676 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5677 _DRV_HVD_Inited(u8DrvId,FALSE);
5678
5679 s64PTS = HAL_HVD_EX_GetData_EX(u32Id, E_HVD_GDATA_PTS_STC_DIFF);
5680
5681 return s64PTS;
5682 }
5683
5684 //-----------------------------------------------------------------------------
5685 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPTS()
5686 /// @brief \b Function \b Description: get the pts of current displayed video frame. unit: ms
5687 /// @return - PTS
5688 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPTS(MS_U32 u32Id)5689 MS_U32 MDrv_HVD_EX_GetPTS(MS_U32 u32Id)
5690 {
5691 MS_U32 u32PTS = 0;
5692 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5693 _DRV_HVD_Inited(u8DrvId,FALSE);
5694
5695 u32PTS = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_PTS);
5696
5697 u32PTS = _HVD_EX_ReportLow32BitPTS(u32Id, u32PTS);
5698
5699 return u32PTS;
5700 }
5701
5702 //-----------------------------------------------------------------------------
5703 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPTS()
5704 /// @brief \b Function \b Description: get the 33 bits pts of current displayed video frame. unit: ms
5705 /// @return - PTS
5706 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetU64PTS(MS_U32 u32Id)5707 MS_U64 MDrv_HVD_EX_GetU64PTS(MS_U32 u32Id)
5708 {
5709 MS_U64 u64PTS = 0;
5710 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5711 _DRV_HVD_Inited(u8DrvId,FALSE);
5712
5713 u64PTS = *((MS_U64*)(HAL_HVD_EX_GetData(u32Id,E_HVD_GDATA_U64PTS)));
5714
5715 return u64PTS;
5716 }
5717
5718 //-----------------------------------------------------------------------------
5719 /// @brief \b Function \b Name: MDrv_HVD_EX_GetU64PTS_PreParse()
5720 /// @brief \b Function \b Description: get the 33 bits pts which is latest added into PTS table. unit: ms
5721 /// @return - PTS
5722 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetU64PTS_PreParse(MS_U32 u32Id)5723 MS_U64 MDrv_HVD_EX_GetU64PTS_PreParse(MS_U32 u32Id)
5724 {
5725 MS_U64 u64PTS = 0;
5726 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5727 _DRV_HVD_Inited(u8DrvId,FALSE);
5728
5729 u64PTS = *((MS_U64*)(HAL_HVD_EX_GetData(u32Id,E_HVD_GDATA_U64PTS_PRE_PARSE)));
5730 u64PTS = _90K_TO_MS(u64PTS); //ms
5731
5732 return u64PTS;
5733 }
5734
5735 //-----------------------------------------------------------------------------
5736 /// @brief \b Function \b Name: MDrv_HVD_EX_GetNextPTS()
5737 /// @brief \b Function \b Description: get the pts of next displayed video frame. unit: ms
5738 /// @return - PTS
5739 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetNextPTS(MS_U32 u32Id)5740 MS_U32 MDrv_HVD_EX_GetNextPTS(MS_U32 u32Id)
5741 {
5742 MS_U32 u32PTS = 0;
5743 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5744 _DRV_HVD_Inited(u8DrvId,FALSE);
5745
5746 u32PTS = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_NEXT_PTS);
5747
5748 u32PTS = _HVD_EX_ReportLow32BitPTS(u32Id, u32PTS);
5749
5750 return u32PTS;
5751 }
5752
5753 //-----------------------------------------------------------------------------
5754 /// @brief \b Function \b Name: MDrv_HVD_EX_GetNextDispQPtr()
5755 /// @brief \b Function \b Description: get the pointer of next displayed video frame.
5756 /// @return - Pointer in the display queue
5757 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetNextDispQPtr(MS_U32 u32Id)5758 MS_U32 MDrv_HVD_EX_GetNextDispQPtr(MS_U32 u32Id)
5759 {
5760 MS_U32 u32Ptr = 0;
5761 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5762 _DRV_HVD_Inited(u8DrvId,FALSE);
5763
5764 //HVD_PRINT("GetNextDispQPtr DqNum=%ld, DqPtr=%ld\n", HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_NUMB), HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_PTR));
5765 //if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_NUMB) != 0)
5766 {
5767 u32Ptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_PTR);
5768 }
5769
5770 return u32Ptr;
5771 }
5772
5773 //-----------------------------------------------------------------------------
5774 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDataErrCnt()
5775 /// @brief \b Function \b Description: get accumulated data Error Count
5776 /// @return -data error count
5777 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDataErrCnt(MS_U32 u32Id)5778 MS_U32 MDrv_HVD_EX_GetDataErrCnt(MS_U32 u32Id)
5779 {
5780 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5781 _DRV_HVD_Inited(u8DrvId,FALSE);
5782
5783 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DATA_ERROR_CNT);
5784 }
5785
5786 //-----------------------------------------------------------------------------
5787 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDecErrCnt()
5788 /// @brief \b Function \b Description: get accumulated decode Error Count
5789 /// @return -decode error count
5790 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDecErrCnt(MS_U32 u32Id)5791 MS_U32 MDrv_HVD_EX_GetDecErrCnt(MS_U32 u32Id)
5792 {
5793 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5794 _DRV_HVD_Inited(u8DrvId,FALSE);
5795
5796 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_ERROR_CNT);
5797 }
5798
5799 //-----------------------------------------------------------------------------
5800 /// @brief \b Function \b Name: MDrv_HVD_EX_GetESWritePtr()
5801 /// @brief \b Function \b Description: Get Elementary Stream buffer write point
5802 /// @return - ES buffer write point offset from bitstream buffer base
5803 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetESWritePtr(MS_U32 u32Id)5804 MS_VIRT MDrv_HVD_EX_GetESWritePtr(MS_U32 u32Id)
5805 {
5806 #ifdef VDEC3
5807 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5808 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
5809 if ((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_INPUT_MASK) == E_HVD_INIT_INPUT_DRV) // File mode
5810 {
5811 MS_VIRT u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
5812 MS_VIRT u32Wptr = HAL_VPU_EX_GetESWritePtr(u32Id, u32VBBUAddr);
5813
5814 if (pCtrl->bShareBBU)
5815 {
5816 if (u32Wptr != 0)
5817 u32Wptr = u32Wptr - (pCtrl->MemMap.u32BitstreamBufAddr - pCtrl->MemMap.u32TotalBitstreamBufAddr); // NStream will share the same ES buffer
5818 }
5819
5820 if (u32Wptr & HVD_RV_BROKEN_BY_US_MASK)
5821 u32Wptr &= (~HVD_RV_BROKEN_BY_US_MASK);
5822
5823 return u32Wptr;
5824
5825 }
5826 else // TSP mode
5827 #endif
5828 {
5829 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5830 _DRV_HVD_Inited(u8DrvId,FALSE);
5831
5832 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR);
5833 }
5834 }
5835
5836 //-----------------------------------------------------------------------------
5837 /// @brief \b Function \b Name: MDrv_HVD_EX_GetESReadPtr()
5838 /// @brief \b Function \b Description: Get Elementary Stream buffer read point
5839 /// @return - ES buffer read point offset from bitstream buffer base
5840 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetESReadPtr(MS_U32 u32Id)5841 MS_VIRT MDrv_HVD_EX_GetESReadPtr(MS_U32 u32Id)
5842 {
5843 #ifdef VDEC3
5844 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5845 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
5846 if ((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_INPUT_MASK) == E_HVD_INIT_INPUT_DRV) // File mode
5847 {
5848 MS_VIRT u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
5849 MS_VIRT u32Rptr = HAL_VPU_EX_GetESReadPtr(u32Id, u32VBBUAddr);
5850
5851 if (pCtrl->bShareBBU)
5852 {
5853 if (u32Rptr != 0)
5854 u32Rptr = u32Rptr - (pCtrl->MemMap.u32BitstreamBufAddr - pCtrl->MemMap.u32TotalBitstreamBufAddr); // NStream will share the same ES buffer
5855 }
5856
5857 if (u32Rptr & HVD_RV_BROKEN_BY_US_MASK)
5858 u32Rptr &= (~HVD_RV_BROKEN_BY_US_MASK);
5859
5860 return u32Rptr;
5861
5862 }
5863 else // TSP mode
5864 #endif
5865 {
5866 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5867 _DRV_HVD_Inited(u8DrvId,FALSE);
5868
5869 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR);
5870 }
5871 }
5872
5873 //-----------------------------------------------------------------------------
5874 /// @brief \b Function \b Name: MDrv_HVD_GetESLevel()
5875 /// @brief \b Function \b Description: Get Elementary Stream buffer level
5876 /// @return - ES buffer level (ES data size in bitstream buffer)
5877 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetESQuantity(MS_U32 u32Id)5878 MS_U32 MDrv_HVD_EX_GetESQuantity(MS_U32 u32Id)
5879 {
5880 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5881 _DRV_HVD_Inited(u8DrvId,FALSE);
5882
5883 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_QUANTITY);
5884 }
5885
5886 #define FATAL_ERROR(x) ((x)==E_HVD_RETURN_OUTOF_MEMORY)
5887
5888 //-----------------------------------------------------------------------------
5889 /// @brief \b Function \b Name: MDrv_HVD_EX_GetErrCode()
5890 /// @brief \b Function \b Description: get error code
5891 /// @return - error code number
5892 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetErrCode(MS_U32 u32Id)5893 MS_U32 MDrv_HVD_EX_GetErrCode(MS_U32 u32Id)
5894 {
5895 // TODO: define driver error code for upper layer
5896 MS_U32 u32Ret = 0;
5897 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5898
5899 _DRV_HVD_Inited(u8DrvId,FALSE);
5900
5901 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ERROR_CODE);
5902
5903 u32Ret = _HVD_EX_Map2HVDErrCode(u32Ret);
5904
5905 #ifdef SUPPORT_X_MODEL_FEATURE //We using the common compile option to handle X model
5906 if (!FATAL_ERROR(u32Ret))
5907 #else
5908 if (u32Ret)
5909 #endif
5910 {
5911 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_ERROR_CODE, 0);
5912 }
5913
5914 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32LastErrCode = u32Ret;
5915
5916 return u32Ret;
5917 }
5918
5919 //-----------------------------------------------------------------------------
5920 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPlayMode()
5921 /// @brief \b Function \b Description: Get current play mode status.
5922 /// @param -eMode \b IN : Mode type.
5923 /// @return - mode status
5924 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPlayMode(MS_U32 u32Id,HVD_EX_GetModeStatus eMode)5925 MS_U32 MDrv_HVD_EX_GetPlayMode(MS_U32 u32Id, HVD_EX_GetModeStatus eMode)
5926 {
5927 MS_U32 u32Ret = 0;
5928 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5929
5930 HVD_EX_MSG_TRACE();
5931 _DRV_HVD_Inited(u8DrvId,FALSE);
5932
5933 switch (eMode)
5934 {
5935 case E_HVD_EX_GMODE_IS_SHOW_ERR_FRM:
5936 case E_HVD_EX_GMODE_IS_REPEAT_LAST_FIELD:
5937 case E_HVD_EX_GMODE_IS_ERR_CONCEAL:
5938 case E_HVD_EX_GMODE_IS_SYNC_ON:
5939 case E_HVD_EX_GMODE_IS_PLAYBACK_FINISH:
5940 case E_HVD_EX_GMODE_SYNC_MODE:
5941 case E_HVD_EX_GMODE_SKIP_MODE:
5942 case E_HVD_EX_GMODE_DROP_MODE:
5943 case E_HVD_EX_GMODE_DISPLAY_SPEED:
5944 case E_HVD_EX_GMODE_FRC_MODE:
5945 // TODO: add isr type here
5946 case E_HVD_EX_GMODE_ISR_TYPE:
5947 u32Ret = HAL_HVD_EX_GetData(u32Id, (HVD_GetData) ((MS_U32) eMode + (MS_U32) E_HVD_GDATA_IS_SHOW_ERR_FRM));
5948 break;
5949 case E_HVD_EX_GMODE_IS_STEP_DISPLAY:
5950 u32Ret = _DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL);
5951 break;
5952 case E_HVD_EX_GMODE_STREAM_TYPE:
5953 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & E_HVD_INIT_MAIN_MASK;
5954 break;
5955 default:
5956 break;
5957 }
5958
5959 return u32Ret;
5960 }
5961
5962 //-----------------------------------------------------------------------------
5963 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPlayState()
5964 /// @brief \b Function \b Description: get current play state
5965 /// @return - play state
5966 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPlayState(MS_U32 u32Id)5967 HVD_EX_GetPlayState MDrv_HVD_EX_GetPlayState(MS_U32 u32Id)
5968 {
5969 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5970 MS_U32 u32FWstate = 0;
5971 HVD_EX_GetPlayState eRet = E_HVD_EX_GSTATE_INIT;
5972
5973 HVD_EX_MSG_TRACE();
5974 _DRV_HVD_Inited(u8DrvId,eRet);
5975
5976 u32FWstate = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE);
5977 u32FWstate &= E_HVD_FW_STATE_MASK;
5978
5979 switch (u32FWstate)
5980 {
5981 case E_HVD_FW_INIT:
5982 eRet = E_HVD_EX_GSTATE_INIT;
5983 break;
5984 case E_HVD_FW_PLAY:
5985 eRet = E_HVD_EX_GSTATE_PLAY;
5986 break;
5987 case E_HVD_FW_PAUSE:
5988 eRet = E_HVD_EX_GSTATE_PAUSE;
5989 break;
5990 case E_HVD_FW_STOP:
5991 eRet = E_HVD_EX_GSTATE_STOP;
5992 break;
5993 default:
5994 break;
5995 }
5996 return eRet;
5997 }
5998
5999 //-----------------------------------------------------------------------------
6000 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDecodeCnt()
6001 /// @brief \b Function \b Description: get accumulated decoded frame Count
6002 /// @return - decoded frame Count
6003 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDecodeCnt(MS_U32 u32Id)6004 MS_U32 MDrv_HVD_EX_GetDecodeCnt(MS_U32 u32Id)
6005 {
6006 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6007 _DRV_HVD_Inited(u8DrvId,FALSE);
6008
6009 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT);
6010 }
6011
6012 //-----------------------------------------------------------------------------
6013 /// @brief \b Function \b Name: MDrv_HVD_EX_GetActiveFormat()
6014 /// @brief \b Function \b Description: Get current AFD ID
6015 /// @return - AFD ID, 0xFF:invalid value
6016 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetActiveFormat(MS_U32 u32Id)6017 MS_U8 MDrv_HVD_EX_GetActiveFormat(MS_U32 u32Id)
6018 {
6019 HVD_Display_Info *pDispInfo = NULL;
6020 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6021
6022 HVD_EX_MSG_TRACE();
6023
6024 _DRV_HVD_Inited(u8DrvId,~0);
6025
6026 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
6027 {
6028 return 0;
6029 }
6030
6031 pDispInfo = (HVD_Display_Info *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_INFO_ADDR);
6032
6033 if (pDispInfo != NULL)
6034 {
6035 return pDispInfo->u8AFD;
6036 }
6037 else
6038 {
6039 return ~0;
6040 }
6041 }
6042
6043 //-----------------------------------------------------------------------------
6044 /// @brief \b Function \b Name: MDrv_HVD_EX_GetInfo()
6045 /// @brief \b Function \b Description: Get information of HVD driver.
6046 /// @return - driver information
6047 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetInfo(void)6048 const HVD_EX_DrvInfo *MDrv_HVD_EX_GetInfo(void)
6049 {
6050 DrvInfo.bAVC = MDrv_HVD_EX_GetCaps(E_HVD_EX_AVC);
6051 DrvInfo.bAVS = MDrv_HVD_EX_GetCaps(E_HVD_EX_AVS);
6052 DrvInfo.bRM = MDrv_HVD_EX_GetCaps(E_HVD_EX_RM);
6053 DrvInfo.FWversion = HVD_FW_VERSION;
6054 return &DrvInfo;
6055 }
6056
6057 //-----------------------------------------------------------------------------
6058 /// @brief \b Function \b Name: MDrv_HVD_EX_GetLibVer()
6059 /// @brief \b Function \b Description: Get verion ID of HVD library.
6060 /// @param -pVerString \b OUT : pointer to HVD driver version ID.
6061 /// @return - driver library verion ID
6062 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetLibVer(const MSIF_Version ** ppVersion)6063 HVD_EX_Result MDrv_HVD_EX_GetLibVer(const MSIF_Version ** ppVersion)
6064 {
6065 if (!ppVersion)
6066 {
6067 return E_HVD_EX_FAIL;
6068 }
6069
6070 *ppVersion = &_drv_hvd_version;
6071 return E_HVD_EX_OK;
6072 }
6073
6074 //-----------------------------------------------------------------------------
6075 /// @brief \b Function \b Name: MDrv_HVD_EX_GetStatus()
6076 /// @brief \b Function \b Description: Get status of HVD driver
6077 /// @param -pstatus \b OUT : driver status
6078 /// @return - TRUE / FALSE
6079 /// @retval -FALSE(0): Low delay flag not found.
6080 /// @retval -TRUE(1): Low delay flag found.
6081 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetStatus(MS_U32 u32Id,HVD_EX_DrvStatus * pstatus)6082 MS_BOOL MDrv_HVD_EX_GetStatus(MS_U32 u32Id, HVD_EX_DrvStatus *pstatus)
6083 {
6084 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6085
6086 if (pstatus == NULL)
6087 {
6088 return FALSE;
6089 }
6090
6091 pstatus->bInit = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_INIT_FINISHED;
6092 pstatus->bBusy = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_PROCESSING;
6093
6094 return TRUE;
6095 }
6096
6097 //-----------------------------------------------------------------------------
6098 /// @brief \b Function \b Name: MDrv_HVD_EX_GetFrmInfo()
6099 /// @brief \b Function \b Description: Get current displayed or decoded frame information of HVD driver
6100 /// @param -eType \b IN : Type of frame information
6101 /// @param -pInfo \b OUT : frame information
6102 /// @return -The result of command get frame information
6103 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFrmInfo(MS_U32 u32Id,HVD_EX_GetFrmInfoType eType,HVD_EX_FrameInfo * pInfo)6104 HVD_EX_Result MDrv_HVD_EX_GetFrmInfo(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType, HVD_EX_FrameInfo * pInfo)
6105 {
6106 HVD_Frm_Information *pFrmInfo = NULL;
6107 HVD_Frm_Information_EXT_Entry *pFrmInfo_ext = NULL;
6108
6109 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6110
6111 HVD_EX_MSG_TRACE();
6112 _DRV_HVD_Inited(u8DrvId,E_HVD_EX_FAIL);
6113
6114 if (pInfo == NULL)
6115 {
6116 return E_HVD_EX_FAIL;
6117 }
6118
6119 if (eType == E_HVD_EX_GFRMINFO_DISPLAY)
6120 {
6121 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_FRM_INFO);
6122 }
6123 else if (eType == E_HVD_EX_GFRMINFO_DECODE)
6124 {
6125 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_FRM_INFO);
6126 }
6127 else if (eType == E_HVD_EX_GFRMINFO_NEXT_DISPLAY)
6128 {
6129 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_NEXT_DISP_FRM_INFO);
6130 if(pFrmInfo != NULL)
6131 {
6132 pFrmInfo_ext = (HVD_Frm_Information_EXT_Entry *)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_NEXT_DISP_FRM_INFO_EXT);
6133 }
6134 }
6135 #if HVD_ENABLE_MVC
6136 else if (eType == E_HVD_EX_GFRMINFO_DISPLAY_SUB)
6137 {
6138 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_FRM_INFO_SUB);
6139 }
6140 else if (eType == E_HVD_EX_GFRMINFO_DECODE_SUB)
6141 {
6142 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_FRM_INFO_SUB);
6143 }
6144 #endif ///HVD_ENABLE_MVC
6145 else if (eType == E_HVD_EX_GFRMINFO_LAST_DISPLAY)
6146 {
6147 pFrmInfo = (HVD_Frm_Information *) pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo;
6148 }
6149 else if (eType == E_HVD_EX_GFRMINFO_LAST_DISPLAY_EX)
6150 {
6151 pFrmInfo = (HVD_Frm_Information *) pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo;
6152 pFrmInfo_ext = (HVD_Frm_Information_EXT_Entry *) pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo_ext;
6153 }
6154
6155 if (pFrmInfo != NULL)
6156 {
6157 MS_U32 u32Luma8MiuSel = (MS_U32)pFrmInfo->u2Luma0Miu;
6158 MS_U32 u32Luma2MiuSel = (MS_U32)pFrmInfo->u2Luma1Miu;
6159 MS_U32 u32Chroma8MiuSel = (MS_U32)pFrmInfo->u2Chroma0Miu;
6160 MS_U32 u32Chroma2MiuSel = (MS_U32)pFrmInfo->u2Chroma1Miu;
6161
6162 pInfo->u32LumaAddr = (MS_PHY) (pFrmInfo->u32LumaAddr + _HVD_EX_GetMIUBase(u8DrvId, u32Luma8MiuSel));
6163 pInfo->u32ChromaAddr = (MS_PHY) (pFrmInfo->u32ChromaAddr + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma8MiuSel));
6164 pInfo->u32TimeStamp = pFrmInfo->u32TimeStamp;
6165 pInfo->u32ID_L = pFrmInfo->u32ID_L;
6166 pInfo->u32ID_H = pFrmInfo->u32ID_H;
6167 pInfo->u32PrivateData = pFrmInfo->u32PrivateData; //[STB]only for AVC
6168 pInfo->u16Pitch = pFrmInfo->u16Pitch;
6169 pInfo->u16Height = pFrmInfo->u16Height;
6170 pInfo->u16Width = pFrmInfo->u16Width;
6171 pInfo->eFrmType = (HVD_EX_FrmType) (pFrmInfo->u8FrmType);
6172 pInfo->eFieldType = (HVD_EX_FieldType) (pFrmInfo->u8FieldType);
6173
6174 pInfo->u32LumaAddr_2bit = (MS_PHY) (pFrmInfo->u32LumaAddr_2bit + _HVD_EX_GetMIUBase(u8DrvId, u32Luma2MiuSel)) ;
6175 pInfo->u32ChromaAddr_2bit = (MS_PHY) (pFrmInfo->u32ChromaAddr_2bit + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma2MiuSel));
6176 pInfo->u16Pitch_2bit = pFrmInfo->u16Pitch_2bit;
6177 pInfo->u8LumaBitdepth = pFrmInfo->u8LumaBitdepth;
6178 pInfo->u8ChromaBitdepth = pFrmInfo->u8ChromaBitdepth;
6179
6180 if ((pInfo->u16Pitch == 0) && (pInfo->u16Width == 0) && (pInfo->u16Height == 0))
6181 {
6182 return E_HVD_EX_FAIL;
6183 }
6184
6185 if (eType == E_HVD_EX_GFRMINFO_NEXT_DISPLAY)
6186 {
6187 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo = pFrmInfo;
6188 }
6189
6190 if(pFrmInfo_ext != NULL)
6191 {
6192 pInfo->u32LumaAddr_2bit = (MS_PHY)(pFrmInfo_ext->u32LumaAddrExt[HVD_FRM_INFO_EXT_TYPE_10BIT]
6193 + _HVD_EX_GetMIUBase(u8DrvId, u32Luma2MiuSel));
6194 pInfo->u32ChromaAddr_2bit = (MS_PHY)(pFrmInfo_ext->u32ChromaAddrExt[HVD_FRM_INFO_EXT_TYPE_10BIT]
6195 + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma2MiuSel));
6196 pInfo->u32LumaAddrI = (MS_PHY)(pFrmInfo_ext->u32LumaAddrExt[HVD_FRM_INFO_EXT_TYPE_INTERLACE]
6197 + _HVD_EX_GetMIUBase(u8DrvId, u32Luma8MiuSel));
6198 pInfo->u32LumaAddrI_2bit = (MS_PHY)(pFrmInfo_ext->u32LumaAddrExt[HVD_FRM_INFO_EXT_TYPE_10BIT_INTERLACE]
6199 + _HVD_EX_GetMIUBase(u8DrvId, u32Luma2MiuSel));
6200 pInfo->u32ChromaAddrI = (MS_PHY)(pFrmInfo_ext->u32ChromaAddrExt[HVD_FRM_INFO_EXT_TYPE_INTERLACE]
6201 + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma8MiuSel));
6202 pInfo->u32ChromaAddrI_2bit = (MS_PHY)(pFrmInfo_ext->u32ChromaAddrExt[HVD_FRM_INFO_EXT_TYPE_10BIT_INTERLACE]
6203 + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma2MiuSel));
6204 pInfo->u32MFCodecInfo = pFrmInfo_ext->MFCodecInfo;
6205 pInfo->u32LumaMFCbitlen = pFrmInfo_ext->u32LumaAddrExt[HVD_FRM_INFO_EXT_TYPE_MFCBITLEN];
6206 pInfo->u32ChromaMFCbitlen = pFrmInfo_ext->u32ChromaAddrExt[HVD_FRM_INFO_EXT_TYPE_MFCBITLEN];
6207
6208
6209 pInfo->u32MaxLuminance = pFrmInfo_ext->maxLuminance;
6210 pInfo->u32MinLuminance = pFrmInfo_ext->minLuminance;
6211 pInfo->u16Primaries[0][0] = pFrmInfo_ext->primaries[0][0];
6212 pInfo->u16Primaries[0][1] = pFrmInfo_ext->primaries[0][1];
6213 pInfo->u16Primaries[1][0] = pFrmInfo_ext->primaries[1][0];
6214 pInfo->u16Primaries[1][1] = pFrmInfo_ext->primaries[1][1];
6215 pInfo->u16Primaries[2][0] = pFrmInfo_ext->primaries[2][0];
6216 pInfo->u16Primaries[2][1] = pFrmInfo_ext->primaries[2][1];
6217 pInfo->u16WhitePoint[0] = pFrmInfo_ext->whitePoint[0];
6218 pInfo->u16WhitePoint[1] = pFrmInfo_ext->whitePoint[1];
6219
6220 pInfo->u8Frm_Info_Ext_avail = pFrmInfo_ext->Frm_Info_Ext_avail;
6221 pInfo->u8Colour_primaries = pFrmInfo_ext->colour_primaries;
6222 pInfo->u8Transfer_characteristics = pFrmInfo_ext->transfer_characteristics;
6223 pInfo->u8Matrix_coefficients = pFrmInfo_ext->matrix_coefficients;
6224
6225 pInfo->u8DVMode = pFrmInfo_ext->u8DVMode;
6226 pInfo->u32DVMetadataAddr = (MS_PHY)(pFrmInfo_ext->u32DVMetadataAddr);
6227 if (pInfo->u8DVMode & 0x03) // we hide dolby vision infomation into Luma Interlace Address when dolby mode enable;
6228 {
6229 pInfo->u32LumaAddrI = pInfo->u8DVMode;
6230 }
6231 pInfo->u32DVDMSize = pFrmInfo_ext->u32DVDMSize;
6232 pInfo->u32DVCompSize = pFrmInfo_ext->u32DVCompSize;
6233 pInfo->u8CurrentIndex = pFrmInfo_ext->u8CurrentIndex;
6234 pInfo->u32HDRRegAddr = pFrmInfo_ext->u32DVRegAddr;
6235 pInfo->u32HDRRegSize = pFrmInfo_ext->u32DVRegSize;
6236 pInfo->u32HDRLutAddr = pFrmInfo_ext->u32DVLutAddr;
6237 pInfo->u32HDRLutSize = pFrmInfo_ext->u32DVLutSize;
6238 pInfo->bDMEnable = pFrmInfo_ext->bDMEnable;
6239 pInfo->bCompEnable = pFrmInfo_ext->bCompEnable;
6240 pInfo->u8ComplexityLevel = pFrmInfo_ext->u8ComplexityLevel;
6241
6242 pInfo->u32ParWidth = pFrmInfo_ext->u32ParWidth;
6243 pInfo->u32ParHeight = pFrmInfo_ext->u32ParHeight;
6244 pInfo->u16CropRight = pFrmInfo_ext->u16CropRight;
6245 pInfo->u16CropLeft = pFrmInfo_ext->u16CropLeft;
6246 pInfo->u16CropBottom = pFrmInfo_ext->u16CropBottom;
6247 pInfo->u16CropTop = pFrmInfo_ext->u16CropTop;
6248
6249 pInfo->u8TileMode = pFrmInfo_ext->u8TileMode;
6250 pInfo->u16MIUBandwidth = pFrmInfo_ext->u16MIUBandwidth;
6251 pInfo->u16Bitrate = pFrmInfo_ext->u16Bitrate;
6252 pInfo->u8HTLBTableId = pFrmInfo_ext->u8HTLBTableId;
6253 pInfo->u8HTLBEntriesSize = pFrmInfo_ext->u8HTLBEntriesSize;
6254 pInfo->u32HTLBEntriesAddr = pFrmInfo_ext->u32HTLBEntriesAddr;
6255
6256 if (eType == E_HVD_EX_GFRMINFO_NEXT_DISPLAY)
6257 {
6258 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo_ext = pFrmInfo_ext;
6259 }
6260 }
6261 }
6262 else
6263 {
6264 return E_HVD_EX_FAIL;
6265 }
6266
6267 return E_HVD_EX_OK;
6268 }
6269
6270 //-----------------------------------------------------------------------------
6271 /// @brief \b Function \b Name: MDrv_HVD_EX_GetISRInfo()
6272 /// @brief \b Function \b Description: Get information of HVD driver interrupt
6273 /// @param -eType \b OUT : ISR information
6274 /// @return -the result of get ISR information
6275 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetISRInfo(MS_U32 u32Id,MS_U32 * eType)6276 MS_BOOL MDrv_HVD_EX_GetISRInfo(MS_U32 u32Id, MS_U32 *eType)
6277 {
6278 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6279
6280 _DRV_HVD_Inited(u8DrvId,FALSE);
6281
6282 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.bInISR)
6283 {
6284 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.u32ISRInfo |= HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_HVD_ISR_STATUS);
6285 *eType = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.u32ISRInfo;
6286 }
6287 else
6288 {
6289 *eType = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_HVD_ISR_STATUS);
6290 }
6291
6292 HVD_EX_MSG_DBG("ISR=0x%x\n", *eType);
6293
6294 return TRUE;
6295 }
6296
6297 //-----------------------------------------------------------------------------
6298 /// @brief \b Function \b Name: MDrv_HVD_EX_CalLumaSum()
6299 /// @brief \b Function \b Description: Get the sum of luma data in a frame.
6300 /// @param -eType \b IN : Type of frame information
6301 /// @return -the sum
6302 /// @retval -0xFFFFFFFF: error occer.
6303 /// @retval -not zero: the sum.
6304 //-----------------------------------------------------------------------------
MDrv_HVD_EX_CalLumaSum(MS_U32 u32Id,HVD_EX_GetFrmInfoType eType)6305 MS_U32 MDrv_HVD_EX_CalLumaSum(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType)
6306 {
6307 HVD_Frm_Information *pFrmInfo = NULL;
6308 MS_U32 u32Ret = HVD_U32_MAX;
6309 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6310
6311 HVD_EX_MSG_TRACE();
6312 _DRV_HVD_Inited(u8DrvId,u32Ret);
6313
6314 if (eType == E_HVD_EX_GFRMINFO_DISPLAY)
6315 {
6316 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_FRM_INFO);
6317 }
6318 else if (eType == E_HVD_EX_GFRMINFO_DECODE)
6319 {
6320 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_FRM_INFO);
6321 }
6322
6323 if (pFrmInfo != NULL)
6324 {
6325 MS_U32 u32tmp = 0;
6326 MS_U32 u32PitchCnt = 0;
6327 MS_U32 u32HeightCnt = 0;
6328 volatile MS_U8 *pLumaData = NULL;
6329 // PA2VA
6330 u32tmp = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32FrameBufAddr;
6331
6332 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_1/*u32CtrlMode & HVD_CTRL_FRM_MIU_1*/)
6333 {
6334 u32tmp -= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr;
6335 }
6336 else if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_2)
6337 {
6338 u32tmp -= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU2BaseAddr;
6339 }
6340
6341 pLumaData = (volatile MS_U8 *) (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32FrameBufVAddr + (pFrmInfo->u32LumaAddr - u32tmp));
6342
6343 for (u32HeightCnt = 0; u32HeightCnt < pFrmInfo->u16Height; u32HeightCnt++)
6344 {
6345 for (u32PitchCnt = 0; u32PitchCnt < pFrmInfo->u16Pitch; u32PitchCnt++)
6346 {
6347 if (u32PitchCnt < pFrmInfo->u16Pitch)
6348 {
6349 u32Ret += (MS_U32) (*pLumaData);
6350 }
6351 pLumaData++;
6352 }
6353 }
6354 }
6355
6356 return u32Ret;
6357 }
6358
6359 //-----------------------------------------------------------------------------
6360 /// @brief \b Function \b Name: MDrv_HVD_EX_GetUserData_Wptr()
6361 /// @brief \b Function \b Description: Get write pointer of user data.
6362 /// @return -the information of write pointer of user data.
6363 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetUserData_Wptr(MS_U32 u32Id)6364 MS_U32 MDrv_HVD_EX_GetUserData_Wptr(MS_U32 u32Id)
6365 {
6366 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6367 MS_U32 u32Ret = 0;
6368
6369 HVD_EX_MSG_TRACE();
6370 _DRV_HVD_Inited(u8DrvId,FALSE);
6371
6372 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_WPTR);
6373
6374 return u32Ret;
6375 }
6376
6377 //-----------------------------------------------------------------------------
6378 /// @brief \b Function \b Name: MDrv_HVD_EX_GetUserData_Packet()
6379 /// @brief \b Function \b Description: Get information of user data packet.
6380 /// @param -u32Idx \b IN : the pointer of required user data packet( valid range is 0 ~ 11 )
6381 /// @param -u32Size \b OUT : the size of required user data packet
6382 /// @return -the offset of user data packet form code buffer start address
6383 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetUserData_Packet(MS_U32 u32Id,MS_U32 u32Idx,MS_U32 * u32Size)6384 MS_VIRT MDrv_HVD_EX_GetUserData_Packet(MS_U32 u32Id, MS_U32 u32Idx, MS_U32 *u32Size)
6385 {
6386 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6387 MS_U32 u32Ret = 0;
6388 MS_VIRT tmp = 0;
6389 MS_U8 *pIdx = NULL;
6390
6391 HVD_EX_MSG_TRACE();
6392 _DRV_HVD_Inited(u8DrvId,FALSE);
6393
6394 *u32Size = 0;
6395 tmp = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
6396
6397 if (u32Idx >= tmp)
6398 {
6399 HVD_EX_MSG_ERR("input user data index(%u) is larger than max index(%lu)\n", u32Idx, (unsigned long)tmp);
6400 return 0;
6401 }
6402 tmp = (MS_VIRT) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_ADDR);
6403 if (tmp == 0)
6404 {
6405 HVD_EX_MSG_INF("HVD FW ERR: user data packet idx tbl base addr(%lx) is zero\n", (unsigned long)tmp);
6406 return 0;
6407 }
6408
6409 pIdx = (MS_U8 *) (tmp + u32Idx);
6410
6411 tmp = (MS_VIRT) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_TBL_SIZE);
6412 if ((*pIdx) >= tmp)
6413 {
6414 HVD_EX_MSG_INF("HVD FW ERR: user data packet tbl ptr(%lu) is larger than max size(%lu)\n", (unsigned long) (*pIdx), (unsigned long)tmp);
6415 return 0;
6416 }
6417 tmp = (MS_VIRT) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_TBL_ADDR);
6418 if (tmp == 0)
6419 {
6420 HVD_EX_MSG_INF("HVD FW ERR: user data packet packet tbl base offset(%lx) is zero\n", (unsigned long)tmp);
6421 return 0;
6422 }
6423 u32Ret = tmp;
6424 tmp = (MS_VIRT) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_SIZE);
6425 if (tmp == 0)
6426 {
6427 HVD_EX_MSG_INF("HVD FW ERR: user data packet packet size(%lu) is zero\n", (unsigned long)tmp);
6428 return 0;
6429 }
6430 *u32Size = tmp;
6431 u32Ret += (MS_U32) (*pIdx) * tmp;
6432 return u32Ret;
6433 }
6434
6435 // VDEC Interal control
6436 //-----------------------------------------------------------------------------
6437 /// @brief \b Function \b Name: MDrv_HVD_EX_GenPattern()
6438 /// @brief \b Function \b Description: Generate spcific pattern to support some special function.
6439 /// @param -eType \b IN : the virtual address of spcific pattern
6440 /// @param -u32VAddr \b IN : the virtual address of spcific pattern
6441 /// @param -u32Size \b IN, OUT :
6442 /// IN: the input array size.
6443 /// OUT: the used array size.
6444 /// @return -The result of command generate spcific pattern
6445 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GenPattern(MS_U32 u32Id,HVD_EX_PatternType eType,MS_VIRT u32VAddr,MS_U32 * pu32Size)6446 HVD_EX_Result MDrv_HVD_EX_GenPattern(MS_U32 u32Id, HVD_EX_PatternType eType, MS_VIRT u32VAddr, MS_U32 * pu32Size)
6447 {
6448 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6449 MS_U8 *pDummyData = NULL;
6450 MS_U32 u32MinPatternSize = 0;
6451 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6452
6453 HVD_EX_MSG_TRACE();
6454 _DRV_HVD_Inited(u8DrvId,eRet);
6455 _DRV_HVD_EX_Entry(u8DrvId);
6456
6457 if (eType == E_HVD_EX_PATTERN_FLUSH) // flush pattern
6458 {
6459 // Driver input need not to push flush pattern
6460 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
6461 {
6462 *pu32Size = 0;
6463 eRet = E_HVD_EX_OK;
6464 _DRV_HVD_EX_RET(u8DrvId, eRet);
6465 }
6466
6467 // TSP input process
6468 if (u32VAddr == 0)
6469 {
6470 *pu32Size = 8 + 144;
6471 HVD_EX_MSG_ERR("Flush Pattern address shall not be zero\n");
6472 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
6473 _DRV_HVD_EX_RET(u8DrvId, eRet);
6474 }
6475
6476 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
6477 {
6478 case HVD_INIT_HW_AVC:
6479 case HVD_INIT_HW_MVC:
6480 case HVD_INIT_HW_VP8:
6481 case HVD_INIT_HW_AVS:
6482 #if SUPPORT_EVD
6483 case HVD_INIT_HW_VP9:
6484 case HVD_INIT_HW_HEVC:
6485 case HVD_INIT_HW_HEVC_DV:
6486 #endif
6487 {
6488 u32MinPatternSize = 8 + 144;
6489 break;
6490 }
6491 case HVD_INIT_HW_RM:
6492 default:
6493 u32MinPatternSize = 0;
6494 break;
6495 }
6496
6497 if (*pu32Size < u32MinPatternSize)
6498 {
6499 HVD_EX_MSG_ERR("Flush Pattern must have at least %u bytes, input:%u\n", u32MinPatternSize,
6500 (MS_U32) (*pu32Size));
6501 *pu32Size = u32MinPatternSize;
6502 eRet = E_HVD_EX_RET_OUTOF_MEMORY;
6503 _DRV_HVD_EX_RET(u8DrvId, eRet);
6504 }
6505
6506 *pu32Size = u32MinPatternSize;
6507 pDummyData = (MS_U8 *) u32VAddr;
6508
6509 #if defined(MSOS_TYPE_LINUX_KERNEL) && defined(__aarch64__)
6510 memset_io((void *) pDummyData, 0, *pu32Size);
6511 #else
6512 memset((void *) pDummyData, 0, *pu32Size);
6513 #endif
6514 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
6515 {
6516 case HVD_INIT_HW_AVC:
6517 case HVD_INIT_HW_MVC:
6518 case HVD_INIT_HW_VP8:
6519 #if SUPPORT_EVD
6520 case HVD_INIT_HW_VP9:
6521 case HVD_INIT_HW_HEVC:
6522 case HVD_INIT_HW_HEVC_DV:
6523 #endif
6524 {
6525 pDummyData[0] = 0;
6526 pDummyData[1] = 0;
6527 pDummyData[2] = 1;
6528 pDummyData[3] = 0xFF;
6529 pDummyData[4] = 0xAA;
6530 pDummyData[5] = 0x55;
6531 pDummyData[6] = 0xAA;
6532 pDummyData[7] = 0x55;
6533
6534 break;
6535 }
6536 case HVD_INIT_HW_AVS:
6537 {
6538 pDummyData[0] = 0;
6539 pDummyData[1] = 0;
6540 pDummyData[2] = 1;
6541 pDummyData[3] = 0xB4;
6542 pDummyData[4] = 0xAA;
6543 pDummyData[5] = 0x55;
6544 pDummyData[6] = 0xAA;
6545 pDummyData[7] = 0x55;
6546
6547 break;
6548 }
6549 case HVD_INIT_HW_RM:
6550 default:
6551 break;
6552 }
6553 }
6554 else if (eType == E_HVD_EX_PATTERN_FILEEND) // dummy pattern
6555 {
6556 // Driver input need not to push dummy pattern
6557 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
6558 {
6559 *pu32Size = 0;
6560 eRet = E_HVD_EX_OK;
6561 _DRV_HVD_EX_RET(u8DrvId, eRet);
6562 }
6563
6564 // TSP input process
6565 if (u32VAddr == 0)
6566 {
6567 *pu32Size = 8 + 144;
6568 HVD_EX_MSG_ERR("Dummy Pattern address shall not be zero\n");
6569 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
6570 _DRV_HVD_EX_RET(u8DrvId, eRet);
6571 }
6572
6573 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
6574 {
6575 case HVD_INIT_HW_AVC:
6576 case HVD_INIT_HW_MVC:
6577 case HVD_INIT_HW_VP8:
6578 case HVD_INIT_HW_AVS:
6579 #if SUPPORT_EVD
6580 case HVD_INIT_HW_VP9:
6581 case HVD_INIT_HW_HEVC:
6582 case HVD_INIT_HW_HEVC_DV:
6583 #endif
6584 u32MinPatternSize = 8 + 144;
6585 break;
6586 case HVD_INIT_HW_RM:
6587 default:
6588 u32MinPatternSize = 0;
6589 break;
6590 }
6591
6592 if (*pu32Size < u32MinPatternSize)
6593 {
6594 HVD_EX_MSG_ERR("Dummy Pattern must have at least %u bytes, input:%u\n", u32MinPatternSize,
6595 (MS_U32) (*pu32Size));
6596 *pu32Size = u32MinPatternSize;
6597 eRet = E_HVD_EX_RET_OUTOF_MEMORY;
6598 _DRV_HVD_EX_RET(u8DrvId, eRet);
6599 }
6600
6601 pDummyData = (MS_U8 *) u32VAddr;
6602 #if defined(MSOS_TYPE_LINUX_KERNEL) && defined(__aarch64__)
6603 memset_io((void *) pDummyData, 0, *pu32Size);
6604 #else
6605 memset((void *) pDummyData, 0, *pu32Size);
6606 #endif
6607 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
6608 {
6609 case HVD_INIT_HW_AVC:
6610 case HVD_INIT_HW_MVC:
6611 case HVD_INIT_HW_VP8:
6612 #if SUPPORT_EVD
6613 case HVD_INIT_HW_VP9:
6614 case HVD_INIT_HW_HEVC:
6615 case HVD_INIT_HW_HEVC_DV:
6616 #endif
6617 {
6618 pDummyData[0] = 0;
6619 pDummyData[1] = 0;
6620 pDummyData[2] = 1;
6621 pDummyData[3] = 0xFF;
6622 pDummyData[4] = 0xFF;
6623 pDummyData[5] = 0xFF;
6624 pDummyData[6] = 0xFF;
6625 pDummyData[7] = 0xFF;
6626
6627 break;
6628 }
6629 case HVD_INIT_HW_AVS:
6630 {
6631 pDummyData[0] = 0;
6632 pDummyData[1] = 0;
6633 pDummyData[2] = 1;
6634 pDummyData[3] = 0xB4;
6635 pDummyData[4] = 0xAA;
6636 pDummyData[5] = 0x66;
6637 pDummyData[6] = 0xAA;
6638 pDummyData[7] = 0x66;
6639
6640 break;
6641 }
6642 case HVD_INIT_HW_RM:
6643 default:
6644 *pu32Size = u32MinPatternSize;
6645 break;
6646 }
6647 }
6648
6649 eRet = E_HVD_EX_OK;
6650
6651 _DRV_HVD_EX_RET(u8DrvId, eRet);
6652 }
6653
6654 //-----------------------------------------------------------------------------
6655 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPatternInfo()
6656 /// @brief \b Function \b Description: Get driver specific data information
6657 /// @param -eType \b IN : the type of specific data information
6658 /// @return -the information of choosed type
6659 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPatternInfo(MS_U32 u32Id,HVD_EX_PatternInfo eType)6660 MS_U32 MDrv_HVD_EX_GetPatternInfo(MS_U32 u32Id, HVD_EX_PatternInfo eType)
6661 {
6662 MS_U32 eRet = 0;
6663 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6664
6665 HVD_EX_MSG_TRACE();
6666 _DRV_HVD_Inited(u8DrvId,FALSE);
6667
6668 switch (eType)
6669 {
6670 case E_HVD_EX_FLUSH_PATTERN_SIZE:
6671 {
6672 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
6673 {
6674 eRet = 0;
6675 }
6676 else if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
6677 {
6678 eRet = 8 + 144;
6679 }
6680 break;
6681 }
6682 case E_HVD_EX_DUMMY_HW_FIFO:
6683 {
6684 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
6685 {
6686 eRet = 0;
6687 }
6688 else if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
6689 {
6690 eRet = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_MAX_DUMMY_FIFO);
6691 }
6692 break;
6693 }
6694 default:
6695 break;
6696 }
6697
6698 return eRet;
6699 }
6700
6701
MDrv_HVD_EX_GetDSBufMiuSelect(MS_U32 u32Id)6702 MS_U8 MDrv_HVD_EX_GetDSBufMiuSelect(MS_U32 u32Id)
6703 {
6704 MS_U8 u8MiuSel;
6705 MS_U32 u32StartOffset;
6706 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6707
6708
6709 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
6710 {
6711 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf);
6712 }
6713 else
6714 {
6715 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr);
6716 }
6717 return u8MiuSel;
6718 }
6719
MDrv_HVD_EX_GetPVRSeamlessInfo(MS_U32 u32Id,HVD_EX_PVR_Seamless_Info * param)6720 MS_BOOL MDrv_HVD_EX_GetPVRSeamlessInfo(MS_U32 u32Id, HVD_EX_PVR_Seamless_Info* param)
6721 {
6722 param->u64PTS = (MS_U64) HAL_HVD_EX_GetData_EX(u32Id, E_HVD_GDATA_TS_SEAMLESS_TARGET_PTS);
6723 param->u32POC = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TS_SEAMLESS_TARGET_POC);
6724 param->u8FrameType = 0xFF; // not support now
6725
6726 return TRUE;
6727 }
6728
6729
6730 //-----------------------------------------------------------------------------
6731 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDynamicScalingInfo()
6732 /// @brief \b Function \b Description: Get information of Dynamic Scaling
6733 /// @param -eType \b IN : the type of specific information
6734 /// @return -the information of choosed type
6735 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDynamicScalingInfo(MS_U32 u32Id,HVD_EX_DynamicScalingInfo eType)6736 MS_U64 MDrv_HVD_EX_GetDynamicScalingInfo(MS_U32 u32Id, HVD_EX_DynamicScalingInfo eType)
6737 {
6738 MS_U32 u32Ret = 0;
6739 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6740 MS_U8 u8MiuSel;
6741 MS_U32 u32StartOffset;
6742
6743 HVD_EX_MSG_TRACE();
6744 _DRV_HVD_Inited(u8DrvId,FALSE);
6745
6746 switch (eType)
6747 {
6748 case E_HVD_EX_DS_BUF_MIUSEL:
6749 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
6750 {
6751 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf >= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr)
6752 {
6753 u32Ret = TRUE;
6754 }
6755 else
6756 {
6757 u32Ret = FALSE;
6758 }
6759
6760 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf);
6761
6762 if(u8MiuSel >= E_CHIP_MIU_2)
6763 {
6764
6765 HVD_EX_MSG_ERR("u8MiuSel is %d !!, but return type is only Boolean. Please use MDrv_HVD_EX_GetDSBufMiuSelect() to get right miu select of DS buffer!\n",u8MiuSel);
6766 }
6767 }
6768 else
6769 {
6770 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr >= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr)
6771 {
6772 u32Ret = TRUE;
6773 }
6774 else
6775 {
6776 u32Ret = FALSE;
6777 }
6778
6779 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr);
6780
6781 if(u8MiuSel >= E_CHIP_MIU_2)
6782 {
6783
6784 HVD_EX_MSG_ERR("u8MiuSel is %d !!, but return type is only Boolean. Please use MDrv_HVD_EX_GetDSBufMiuSelect() to get right miu select of DS buffer!\n",u8MiuSel);
6785 }
6786 }
6787 break;
6788 case E_HVD_EX_DS_BUF_ADDR:
6789 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
6790 {
6791 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf;
6792 ///HVD_PRINT("[EDS] E_HVD_EX_DS_BUF_ADDR 0x%lx.\n",u32Ret);
6793 }
6794 else
6795 {
6796 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_BUF_ADDR);
6797
6798 ///HVD_PRINT("[DS] DS_BUF_ADDR 0x%lx \n", u32Ret);
6799 ///HVD_PRINT("[EDS] E_HVD_EX_DS_BUF_ADDR Old.\n");
6800 }
6801 break;
6802 case E_HVD_EX_DS_BUF_SIZE:
6803 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_BUF_SIZE);
6804 break;
6805 case E_HVD_EX_DS_VECTOR_DEPTH:
6806 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_VECTOR_DEPTH);
6807 break;
6808 case E_HVD_EX_DS_INFO_ADDR:
6809 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
6810 {
6811 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_BUF_SIZE);//0xC00;
6812 ///HVD_PRINT("[EDS] E_HVD_EX_DS_INFO_ADDR 0x%lx.\n",u32Ret);
6813 }
6814 else
6815 {
6816 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_INFO_ADDR);
6817
6818 ///HVD_PRINT("[DS] DS_INFO_ADDR 0x%lx \n", u32Ret);
6819 }
6820 break;
6821 case E_HVD_EX_DS_IS_ENABLED:
6822 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_IS_ENABLED);
6823 break;
6824 default:
6825 break;
6826 }
6827 return u32Ret;
6828 }
6829
6830 //-----------------------------------------------------------------------------
6831 /// @brief \b Function \b Name: MDrv_HVD_EX_GetData()
6832 /// @brief \b Function \b Description: Get target data from HVD driver
6833 /// @param -eType \b IN : the type of the target data
6834 /// @return -the value of the target data
6835 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetData(MS_U32 u32Id,HVD_EX_GDataType eType)6836 MS_VIRT MDrv_HVD_EX_GetData(MS_U32 u32Id, HVD_EX_GDataType eType)
6837 {
6838 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6839 MS_VIRT u32Ret = 0;
6840
6841 _DRV_HVD_Inited(u8DrvId,FALSE);
6842
6843 switch (eType)
6844 {
6845 case E_HVD_EX_GDATA_TYPE_DISP_CNT:
6846 {
6847 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_CNT);
6848 break;
6849 }
6850 case E_HVD_EX_GDATA_TYPE_SKIP_CNT:
6851 {
6852 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_SKIP_CNT);
6853 break;
6854 }
6855 case E_HVD_EX_GDATA_TYPE_DROP_CNT:
6856 {
6857 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DROP_CNT);
6858 break;
6859 }
6860 case E_HVD_EX_GDATA_TYPE_IDLE_CNT:
6861 {
6862 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT);
6863 break;
6864 }
6865 case E_HVD_EX_GDATA_TYPE_VSYNC_CNT:
6866 {
6867 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VSYNC_CNT);
6868 break;
6869 }
6870 case E_HVD_EX_GDATA_TYPE_MAIN_LOOP_CNT:
6871 {
6872 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MAIN_LOOP_CNT);
6873 break;
6874 }
6875 case E_HVD_EX_GDATA_TYPE_AVC_LEVEL_IDC:
6876 {
6877 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_AVC_LEVEL_IDC);
6878 break;
6879 }
6880 case E_HVD_EX_GDATA_TYPE_DISP_Q_SIZE:
6881 {
6882 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB);
6883 break;
6884 }
6885 case E_HVD_EX_GDATA_TYPE_ES_LEVEL:
6886 {
6887 u32Ret = (MS_U32) (HVD_EX_ESLevel) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_LEVEL);
6888 break;
6889 }
6890 case E_HVD_EX_GDATA_TYPE_AVC_VUI_DISP_INFO:
6891 {
6892 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_AVC_VUI_DISP_INFO);
6893 break;
6894 }
6895 case E_HVD_EX_GDATA_TYPE_DISP_STC:
6896 {
6897 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_STC);
6898 break;
6899 }
6900 case E_HVD_EX_GDATA_TYPE_USERDATA_IDX_TBL_SIZE:
6901 {
6902 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
6903 break;
6904 }
6905 case E_HVD_EX_GDATA_TYPE_USERDATA_PACKET_SIZE:
6906 {
6907 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_SIZE);
6908 break;
6909 }
6910 case E_HVD_EX_GDATA_TYPE_REAL_FRAMERATE:
6911 {
6912 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_REAL_FRAMERATE);
6913 break;
6914 }
6915 case E_HVD_EX_GDATA_TYPE_IS_ORI_INTERLACE_MODE:
6916 {
6917 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_ORI_INTERLACE_MODE);
6918 break;
6919 }
6920 case E_HVD_EX_GDATA_TYPE_FRAME_MBS_ONLY_FLAG:
6921 {
6922 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TYPE_FRAME_MBS_ONLY_FLAG);
6923 break;
6924 }
6925 case E_HVD_EX_GDATA_TYPE_IS_LEAST_DISPQ_SIZE:
6926 {
6927 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TYPE_IS_LEAST_DISPQ_SIZE);
6928 break;
6929 }
6930 case E_HVD_EX_GDATA_TYPE_FIELD_PIC_FLAG:
6931 {
6932 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FIELD_PIC_FLAG);
6933 break;
6934 }
6935 case E_HVD_EX_GDATA_TYPE_FW_CODEC_TYPE:
6936 {
6937 //u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_CODEC_TYPE);
6938 switch(HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_CODEC_TYPE))
6939 {
6940 case E_HVD_Codec_AVC:
6941 {
6942 u32Ret = E_HVD_EX_AVC;
6943 break;
6944 }
6945 case E_HVD_Codec_AVS:
6946 {
6947 u32Ret = E_HVD_EX_AVS;
6948 break;
6949 }
6950 case E_HVD_Codec_RM:
6951 {
6952 u32Ret = E_HVD_EX_RM;
6953 break;
6954 }
6955 case E_HVD_Codec_MVC:
6956 {
6957 u32Ret = E_HVD_EX_MVC;
6958 break;
6959 }
6960 case E_HVD_Codec_VP8:
6961 {
6962 u32Ret = E_HVD_EX_VP8;
6963 break;
6964 }
6965 case E_HVD_Codec_MJPEG:
6966 {
6967 u32Ret = E_HVD_EX_NONE;
6968 break;
6969 }
6970 case E_HVD_Codec_HEVC:
6971 {
6972 u32Ret = E_HVD_EX_HEVC;
6973 break;
6974 }
6975 case E_HVD_Codec_VP9:
6976 {
6977 u32Ret = E_HVD_EX_VP9;
6978 break;
6979 }
6980 case E_HVD_Codec_HEVC_DV:
6981 {
6982 u32Ret = E_HVD_EX_HEVC_DV;
6983 break;
6984 }
6985 default:
6986 {
6987 u32Ret = E_HVD_EX_NONE;
6988 break;
6989 }
6990 }
6991 break;
6992 }
6993 case E_HVD_EX_GDATA_TYPE_FRC_MODE:
6994 {
6995 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRC_MODE);
6996 break;
6997 }
6998 case E_HVD_EX_GDATA_TYPE_FW_STATUS_FLAG:
6999 {
7000 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATUS_FLAG);
7001 break;
7002 }
7003 case E_HVD_EX_GDATA_TYPE_HVD_HW_MAX_PIXEL:
7004 {
7005 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_HVD_HW_MAX_PIXEL);
7006 break;
7007 }
7008 #ifdef VDEC3
7009 case E_HVD_EX_GDATA_TYPE_VBBU_ADDR:
7010 {
7011 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_VBBU_ADDR);
7012 break;
7013 }
7014 #endif
7015 case E_HVD_EX_GDATA_TYPE_VIDEO_FULL_RANGE_FLAG:
7016 {
7017 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VIDEO_FULL_RANGE_FLAG);
7018 break;
7019 }
7020 case E_HVD_EX_GDATA_TYPE_SEQ_CHANGE_INFO:
7021 {
7022 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_SEQ_CHANGE_INFO);
7023 break;
7024 }
7025 case E_HVD_EX_GDATA_TYPE_GET_NOT_SUPPORT_INFO:
7026 {
7027 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_GET_NOT_SUPPORT_INFO);
7028 break;
7029 }
7030 case E_HVD_EX_GDATA_TYPE_GET_MIN_TSP_DATA_SIZE :
7031 {
7032 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_GET_MIN_TSP_DATA_SIZE);
7033 break;
7034 }
7035 default:
7036 break;
7037 }
7038 return u32Ret;
7039 }
7040
7041 //-----------------------------------------------------------------------------
7042 /// @brief \b Function \b Name: MDrv_HVD_EX_GetMem_Dbg()
7043 /// @brief \b Function \b Description: Get any data from any memory address
7044 /// @param -u32Addr \b IN : the memory address of the target data
7045 /// @return -the value of the memory
7046 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetMem_Dbg(MS_U32 u32Id,MS_VIRT u32Addr)7047 MS_U32 MDrv_HVD_EX_GetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr)
7048 {
7049 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7050 MS_U32 u32Ret = 0;
7051
7052 HVD_EX_MSG_TRACE();
7053 _DRV_HVD_Inited(u8DrvId,u32Ret);
7054
7055 switch (u32Addr)
7056 {
7057 case 1:
7058 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR);
7059 break;
7060 case 2:
7061 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_PC_CNT);
7062 break;
7063 case 3:
7064 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR);
7065 break;
7066 default:
7067 break;
7068 }
7069
7070 return u32Ret;
7071 }
7072
7073 //-----------------------------------------------------------------------------
7074 /// @brief \b Function \b Name: MDrv_HVD_EX_DbgDumpStatus()
7075 /// @brief \b Function \b Description: Dump specific information to standard output.
7076 /// @param -eFlag \b IN : the type of information.
7077 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DbgDumpStatus(MS_U32 u32Id,HVD_EX_DumpStatus eFlag)7078 void MDrv_HVD_EX_DbgDumpStatus(MS_U32 u32Id, HVD_EX_DumpStatus eFlag)
7079 {
7080 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7081
7082 if (!(pHVDDrvContext->bHVDIsInited[u8DrvId]))
7083 {
7084 return;
7085 }
7086
7087 if (eFlag & E_HVD_EX_DUMP_STATUS_FW)
7088 {
7089 HAL_HVD_EX_Dump_FW_Status(u32Id);
7090 }
7091
7092 if (eFlag & E_HVD_EX_DUMP_STATUS_HW)
7093 {
7094 HAL_HVD_EX_Dump_HW_Status(HVD_U32_MAX);
7095 }
7096 }
7097
7098 //-----------------------------------------------------------------------------
7099 /// @brief \b Function \b Name: MDrv_HVD_EX_SetMem_Dbg()
7100 /// @brief \b Function \b Description: set any data into any memory address
7101 /// @param -u32Addr \b IN : the memory address of the target destination
7102 /// @param -u32Arg \b IN : the value of input content
7103 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetMem_Dbg(MS_U32 u32Id,MS_VIRT u32Addr,MS_U32 u32Arg)7104 void MDrv_HVD_EX_SetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr, MS_U32 u32Arg)
7105 {
7106 UNUSED(u32Id);
7107 HVD_EX_MSG_TRACE();
7108 HAL_HVD_EX_SetData_Dbg(u32Addr, u32Arg);
7109 }
7110
7111 //-----------------------------------------------------------------------------
7112 /// @brief \b Function \b Name: MDrv_HVD_SetData_Dbg()
7113 /// @brief \b Function \b Description: set any FW debug command
7114 /// @param -u32Cmd \b IN : specify the FW command ID.
7115 /// @param -u32Arg \b IN : specify the argument of FW command.
7116 /// @return -the result of debug command
7117 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetCmd_Dbg(MS_U32 u32Id,MS_U32 u32Cmd,MS_U32 u32Arg)7118 HVD_EX_Result MDrv_HVD_EX_SetCmd_Dbg(MS_U32 u32Id, MS_U32 u32Cmd, MS_U32 u32Arg)
7119 {
7120 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7121 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7122
7123 HVD_EX_MSG_TRACE();
7124 _DRV_HVD_Inited(u8DrvId,eRet);
7125 _DRV_HVD_EX_Entry(u8DrvId);
7126
7127 // todo: consider more...
7128 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, (HVD_User_Cmd) u32Cmd, u32Arg);
7129
7130 _DRV_HVD_EX_RET(u8DrvId, eRet);
7131 }
7132
7133 //-----------------------------------------------------------------------------
7134 /// @brief \b Function \b Name: MDrv_HVD_EX_Set_Err_Tolerance()
7135 /// @brief \b Function \b Description: set display error tolerance
7136 /// @param -u32Arg \b IN : //[15:8]+[7:0] = (err_tolerance(0%~100%)+enable or disable)
7137 /// @return -the result of set err tolerance
7138 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Set_Err_Tolerance(MS_U32 u32Id,MS_U32 u32Arg)7139 HVD_EX_Result MDrv_HVD_EX_Set_Err_Tolerance(MS_U32 u32Id, MS_U32 u32Arg)
7140 {
7141 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7142 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7143 HVD_EX_MSG_TRACE();
7144 _DRV_HVD_Inited(u8DrvId,eRet);
7145 _DRV_HVD_EX_Entry(u8DrvId);
7146
7147 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_DISP_ERROR_TOLERANCE, u32Arg);
7148
7149 _DRV_HVD_EX_RET(u8DrvId, eRet);
7150
7151 }
7152
7153 //-----------------------------------------------------------------------------
7154 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDVInfo()
7155 /// @brief \b Function \b Description: set DV profile and level
7156 /// @param -u32Arg \b IN : //[15:8]+[7:0] = (profile+level)
7157 /// @return -the result of set DV profile and level
7158 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDVInfo(MS_U32 u32Id,MS_U32 u32Arg)7159 HVD_EX_Result MDrv_HVD_EX_SetDVInfo(MS_U32 u32Id, MS_U32 u32Arg)
7160 {
7161 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7162 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7163 HVD_EX_MSG_TRACE();
7164 _DRV_HVD_Inited(u8DrvId,eRet);
7165 _DRV_HVD_EX_Entry(u8DrvId);
7166
7167 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DV_INFO, u32Arg);
7168
7169 eRet = E_HVD_EX_OK;
7170
7171 _DRV_HVD_EX_RET(u8DrvId, eRet);
7172 }
7173
7174 //-----------------------------------------------------------------------------
7175 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVP9HDR10Info()
7176 /// @brief \b Function \b Description: set VP9 HDR10 Info
7177 /// @param -VP9HDR10Info \b IN : // VP9 HDR10 Info
7178 /// @return -the result of set VP9 HDR10 Info
7179 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVP9HDR10Info(MS_U32 u32Id,HVD_EX_Config_VP9HDR10 * stVP9HDR10Info)7180 HVD_EX_Result MDrv_HVD_EX_SetVP9HDR10Info(MS_U32 u32Id, HVD_EX_Config_VP9HDR10 *stVP9HDR10Info)
7181 {
7182 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7183 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7184 HVD_EX_MSG_TRACE();
7185 _DRV_HVD_Inited(u8DrvId,eRet);
7186 _DRV_HVD_EX_Entry(u8DrvId);
7187
7188 if (stVP9HDR10Info == NULL)
7189 {
7190 _DRV_HVD_EX_RET(u8DrvId, eRet);
7191 }
7192
7193 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_VP9HDR10INFO, (MS_VIRT)stVP9HDR10Info);
7194
7195 eRet = E_HVD_EX_OK;
7196
7197 _DRV_HVD_EX_RET(u8DrvId, eRet);
7198 }
7199
7200 //-----------------------------------------------------------------------------
7201 /// @brief \b Function \b Name: MDrv_HVD_EX_Set_Slow_Sync()
7202 /// @brief \b Function \b Description: set slow sync
7203 /// @param -u32Arg \b IN : //[15:8]+[7:0] = (repeat period + drop period)
7204 /// @return -the result of set err tolerance
7205 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Set_Slow_Sync(MS_U32 u32Id,MS_U32 u32Arg)7206 HVD_EX_Result MDrv_HVD_EX_Set_Slow_Sync(MS_U32 u32Id, MS_U32 u32Arg)
7207 {
7208 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7209 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7210 HVD_EX_MSG_TRACE();
7211 _DRV_HVD_Inited(u8DrvId,eRet);
7212 _DRV_HVD_EX_Entry(u8DrvId);
7213
7214 eRet = _HVD_MapRetEx( HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_SLOW_SYNC, u32Arg));
7215
7216 _DRV_HVD_EX_RET(u8DrvId, eRet);
7217
7218 }
7219
7220
7221 //-----------------------------------------------------------------------------
7222 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSettings_Pro()
7223 /// @brief \b Function \b Description: set any FW debug command
7224 /// @param -eType \b IN : specify the type of setting.
7225 /// @param -u32Arg \b IN : specify the argument of the setting.
7226 /// @return -the result of set professional settings.
7227 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSettings_Pro(MS_U32 u32Id,HVD_EX_SSettingsType eType,MS_U32 u32Arg)7228 HVD_EX_Result MDrv_HVD_EX_SetSettings_Pro(MS_U32 u32Id, HVD_EX_SSettingsType eType, MS_U32 u32Arg)
7229 {
7230 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7231 HVD_User_Cmd eCmd = E_HVD_CMD_INVALID_CMD;
7232 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7233
7234 HVD_EX_MSG_TRACE();
7235 _DRV_HVD_Inited(u8DrvId,eRet);
7236 _DRV_HVD_EX_Entry(u8DrvId);
7237
7238 switch (eType)
7239 {
7240 case E_HVD_EX_SSET_TIME_UNIT:
7241 eCmd = E_HVD_CMD_TIME_UNIT_TYPE;
7242 break;
7243 case E_HVD_EX_SSET_PITCH:
7244 eCmd = E_HVD_CMD_PITCH;
7245 break;
7246 case E_HVD_EX_SSET_SYNC_EACH_FRM:
7247 eCmd = E_HVD_CMD_SYNC_EACH_FRM;
7248 break;
7249 case E_HVD_EX_SSET_MAX_DEC_TICK:
7250 eCmd = E_HVD_CMD_MAX_DEC_TICK;
7251 break;
7252 case E_HVD_EX_SSET_AUTO_FREE_ES:
7253 eCmd = E_HVD_CMD_AUTO_FREE_ES;
7254 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bAutoFreeES = u32Arg;
7255 break;
7256 case E_HVD_EX_SSET_MIN_FRAME_GAP:
7257 eCmd = E_HVD_CMD_MIN_FRAME_GAP;
7258 break;
7259 case E_HVD_EX_SSET_DISABLE_DEBLOCKING:
7260 eCmd = E_HVD_CMD_DIS_DBF;
7261 if (u32Arg > 2)
7262 {
7263 u32Arg = 1;
7264 }
7265 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bDisDeblocking = u32Arg;
7266 break;
7267 case E_HVD_EX_SSET_DISABLE_QUARTER_PIXEL:
7268 eCmd = E_HVD_CMD_DIS_QUART_PIXEL;
7269 if (u32Arg > 2)
7270 {
7271 u32Arg = 1;
7272 }
7273 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bDisQuarterPixel = u32Arg;
7274 break;
7275 case E_HVD_EX_SSET_MIU_BURST_CNT_LEVEL:
7276 {
7277 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32MiuBurstLevel = u32Arg;
7278 eCmd = E_HVD_CMD_MIU_BURST_CNT;
7279
7280 break;
7281 }
7282 default:
7283 break;
7284 }
7285
7286 if (eCmd != E_HVD_CMD_INVALID_CMD)
7287 {
7288 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, eCmd, u32Arg);
7289 }
7290 else
7291 {
7292 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
7293 }
7294
7295 _DRV_HVD_EX_RET(u8DrvId, eRet);
7296 }
7297
7298 //-----------------------------------------------------------------------------
7299 /// @brief \b Function \b Name: MDrv_HVD_EX_GetCaps()
7300 /// @brief \b Function \b Description: check if HW support this format
7301 /// @param -u32Type \b IN : specify the format type
7302 /// @return - TRUE/ FALSE
7303 /// @retval -FALSE(0): not supported by HW
7304 /// @retval -TRUE(1): supported by HW
7305 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetCaps(HVD_EX_Codec u32Type)7306 MS_BOOL MDrv_HVD_EX_GetCaps(HVD_EX_Codec u32Type)
7307 {
7308 if((E_HVD_EX_HEVC == u32Type) || (E_HVD_EX_HEVC_DV == u32Type))
7309 #if SUPPORT_EVD
7310 return TRUE;
7311 #else
7312 return FALSE;
7313 #endif
7314 #if SUPPORT_G2VP9 && defined(VDEC3)
7315 if(E_HVD_EX_VP9 == u32Type)
7316 return TRUE;
7317 #endif
7318
7319 #if SUPPORT_MSVP9 && defined(VDEC3)
7320 if(E_HVD_EX_VP9 == u32Type)
7321 return TRUE;
7322 #endif
7323
7324 #if ( HVD_HW_VERSION == HVD_HW_HVD)
7325 MS_U32 verID = HAL_HVD_EX_GetHWVersionID();
7326 verID = verID >> 12;
7327 switch (u32Type)
7328 {
7329 case E_HVD_EX_AVC:
7330 case E_HVD_EX_AVS:
7331 case E_HVD_EX_RM:
7332 case E_HVD_EX_MVC:
7333 if ((verID & BIT(u32Type)) == 0)
7334 {
7335 return FALSE;
7336 }
7337 break;
7338 case E_HVD_EX_VP8:
7339 return TRUE;
7340 default:
7341 return FALSE;
7342 }
7343 #else
7344 if (u32Type != E_HVD_EX_AVC)
7345 {
7346 return FALSE;
7347 }
7348 #endif
7349 return TRUE;
7350 }
7351
MDrv_HVD_LinkWeakSymbolPatch(void)7352 MS_BOOL MDrv_HVD_LinkWeakSymbolPatch(void)
7353 {
7354 return TRUE;
7355 }
7356
7357 //-----------------------------------------------------------------------------
7358 /// @brief \b Function \b Name: MDrv_HVD_EX_SetAutoRmLstZeroByte
7359 /// @brief \b Function \b Description: Turn on/off auto remove last zero byte
7360 /// @param -bOn \b IN : Turn on/off auto remove last zero byte
7361 /// @return -the result of turn on/off auto remove last zero byte
7362 ///\b NOTE: The default mode after initialization is On.
7363 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetAutoRmLstZeroByte(MS_U32 u32Id,MS_BOOL bOn)7364 HVD_EX_Result MDrv_HVD_EX_SetAutoRmLstZeroByte(MS_U32 u32Id, MS_BOOL bOn)
7365 {
7366 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7367 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7368
7369 HVD_EX_MSG_TRACE();
7370 _DRV_HVD_Inited(u8DrvId,eRet);
7371
7372 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bAutoRmLastZeroByte = bOn;
7373
7374 return E_HVD_EX_OK;
7375 }
7376
7377 //-----------------------------------------------------------------------------
7378 /// @brief \b Function \b Name: MDrv_HVD_EX_IsAlive
7379 /// @brief \b Function \b Description:Check Whether HVD is alive or not(check cnt)
7380 /// @return -the result of HVD alive status(E_HVD_EX_OK/E_HVD_EX_RET_NOT_RUNNING)
7381 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsAlive(MS_U32 u32Id)7382 HVD_EX_Result MDrv_HVD_EX_IsAlive(MS_U32 u32Id)
7383 {
7384 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7385
7386 HVD_EX_MSG_TRACE();
7387 _DRV_HVD_Inited(u8DrvId,E_HVD_EX_FAIL);
7388
7389 if(((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW) ||
7390 ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS))
7391 {
7392 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32LastAliveTime == 0 || ((MsOS_GetSystemTime()-pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32LastAliveTime) < 500))
7393 {
7394 return E_HVD_EX_OK;
7395 }
7396 }
7397
7398 if (HAL_HVD_EX_IsAlive(u32Id))
7399 {
7400 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32DecCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT);
7401 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32SkipCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_SKIP_CNT);
7402 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32IdleCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT);
7403 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32MainLoopCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MAIN_LOOP_CNT);
7404 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32LastAliveTime = MsOS_GetSystemTime();
7405 return E_HVD_EX_OK;
7406 }
7407 else
7408 {
7409 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32LastAliveTime = MsOS_GetSystemTime();
7410 return E_HVD_EX_RET_NOT_RUNNING;
7411 }
7412 }
7413
7414 //-----------------------------------------------------------------------------
7415 /// @brief \b Function \b Name: MDrv_HVD_EX_SetBalanceBW
7416 /// @brief \b Function \b Description: bandwidth adjustment
7417 /// @param -qp_cnt \b IN : QP threshold for overtime counter
7418 /// @param -db_cnt \b IN : Deblocking threshod for overtime counter
7419 /// @param -upper \b IN : upper bound for overtime counter
7420 /// @return -the result of command E_HVD_CMD_BALANCE_BW
7421 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetBalanceBW(MS_U32 u32Id,MS_U8 u8QPCnt,MS_U8 u8DBCnt,MS_U8 u8Upper)7422 HVD_EX_Result MDrv_HVD_EX_SetBalanceBW(MS_U32 u32Id, MS_U8 u8QPCnt, MS_U8 u8DBCnt, MS_U8 u8Upper)
7423 {
7424 HVD_EX_Result eRet = E_HVD_EX_FAIL;
7425 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7426
7427 HVD_EX_MSG_TRACE();
7428 _DRV_HVD_Inited(u8DrvId,eRet);
7429 _DRV_HVD_EX_Entry(u8DrvId);
7430
7431 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_BALANCE_BW, u8QPCnt | (u8DBCnt << 8) | (u8Upper << 16));
7432
7433 _DRV_HVD_EX_RET(u8DrvId, eRet);
7434 }
7435
7436 //-----------------------------------------------------------------------------
7437 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFdMaskDelayCnt()
7438 /// @brief \b Function \b Description: Set fd mask muting count
7439 /// @param -u8DelayCnt \b IN : 0~0xFF, Fdmask delay count, arg >= 0xFF -> use default
7440 /// @return -The result of command setting fd_mask muting count
7441 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFdMaskDelayCnt(MS_U32 u32Id,MS_U8 u8DelayCnt)7442 HVD_EX_Result MDrv_HVD_EX_SetFdMaskDelayCnt(MS_U32 u32Id, MS_U8 u8DelayCnt)
7443 {
7444 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7445 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7446
7447 HVD_EX_MSG_TRACE();
7448 _DRV_HVD_Inited(u8DrvId,eRet);
7449 _DRV_HVD_EX_Entry(u8DrvId);
7450
7451 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FDMASK_DELAY_CNT, u8DelayCnt);
7452
7453 _DRV_HVD_EX_RET(u8DrvId, eRet);
7454 }
7455
7456 //-----------------------------------------------------------------------------
7457 /// @brief \b Function \b Name: MDrv_HVD_EX_SetOutputFRCMode()
7458 /// @brief \b Function \b Description: Set output frame rate convert mode.
7459 /// @param -u8FrameRate \b IN : output vsync count.
7460 /// @param -u8Interlace \b IN : output scan type: 0:progress, 1:interlace.
7461 /// @return -The result of command setting output FRC mode
7462 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetOutputFRCMode(MS_U32 u32Id,MS_U8 u8FrameRate,MS_U8 u8Interlace)7463 HVD_EX_Result MDrv_HVD_EX_SetOutputFRCMode(MS_U32 u32Id, MS_U8 u8FrameRate, MS_U8 u8Interlace)
7464 {
7465 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7466 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7467
7468 HVD_EX_MSG_TRACE();
7469 _DRV_HVD_Inited(u8DrvId,eRet);
7470 _DRV_HVD_EX_Entry(u8DrvId);
7471
7472 if ((u8Interlace != 0) && (u8Interlace != 1) && (u8Interlace != 2))
7473 {
7474 _DRV_HVD_EX_RET(u8DrvId, eRet);
7475 }
7476
7477 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_OUTPUT_FRAMERATE, u8FrameRate);
7478
7479 if (eRet != E_HVD_EX_OK)
7480 {
7481 _DRV_HVD_EX_RET(u8DrvId, eRet);
7482 }
7483
7484 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_OUTPUT_INTERLACE, u8Interlace);
7485
7486 _DRV_HVD_EX_RET(u8DrvId, eRet);
7487 }
7488
MDrv_HVD_EX_DispFrame(MS_U32 u32Id,MS_U32 u32FrmIdx)7489 HVD_EX_Result MDrv_HVD_EX_DispFrame(MS_U32 u32Id, MS_U32 u32FrmIdx)
7490 {
7491 HVD_EX_MSG_TRACE();
7492
7493 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISPQ_STATUS_DISP, u32FrmIdx);
7494
7495 return E_HVD_EX_OK;
7496 }
7497
MDrv_HVD_EX_FreeFrame(MS_U32 u32Id,MS_U32 u32FrmIdx)7498 HVD_EX_Result MDrv_HVD_EX_FreeFrame(MS_U32 u32Id, MS_U32 u32FrmIdx)
7499 {
7500 HVD_EX_MSG_TRACE();
7501
7502 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISPQ_STATUS_FREE, u32FrmIdx);
7503
7504 return E_HVD_EX_OK;
7505 }
7506
MDrv_HVD_EX_EnableDispQue(MS_U32 u32Id,MS_BOOL bEnable)7507 HVD_EX_Result MDrv_HVD_EX_EnableDispQue(MS_U32 u32Id, MS_BOOL bEnable)
7508 {
7509 HVD_EX_MSG_TRACE();
7510
7511 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_DISP_QUEUE, bEnable);
7512
7513 return E_HVD_EX_OK;
7514 }
7515
MDrv_HVD_EX_EnableVSizeAlign(MS_U32 u32Id,MS_BOOL bEnable)7516 HVD_EX_Result MDrv_HVD_EX_EnableVSizeAlign(MS_U32 u32Id, MS_BOOL bEnable)
7517 {
7518 HVD_EX_MSG_TRACE();
7519
7520 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_ALIGN_VSIZE, bEnable);
7521
7522 return E_HVD_EX_OK;
7523 }
7524
MDrv_HVD_EX_ShowDecodeOrder(MS_U32 u32Id,MS_BOOL bEnable)7525 HVD_EX_Result MDrv_HVD_EX_ShowDecodeOrder(MS_U32 u32Id, MS_BOOL bEnable)
7526 {
7527 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7528 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7529
7530 HVD_EX_MSG_TRACE();
7531 _DRV_HVD_Inited(u8DrvId,eRet);
7532 _DRV_HVD_EX_Entry(u8DrvId);
7533
7534 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SHOW_DECODE_ORDER, bEnable);
7535
7536 _DRV_HVD_EX_RET(u8DrvId, eRet);
7537 }
7538
7539 //-----------------------------------------------------------------------------
7540 /// @brief \b Function \b Name: MDrv_HVD_EX_Disp_Ignore_Crop()
7541 /// @brief \b Function \b Description: ingore corp info
7542 /// @param -bEnable \b IN : turn on / off.
7543 /// @return -The result of command setting fd_mask muting count
7544 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Disp_Ignore_Crop(MS_U32 u32Id,MS_BOOL bEnable)7545 HVD_EX_Result MDrv_HVD_EX_Disp_Ignore_Crop(MS_U32 u32Id, MS_BOOL bEnable)
7546 {
7547 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7548 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7549
7550 HVD_EX_MSG_TRACE();
7551 _DRV_HVD_Inited(u8DrvId,eRet);
7552 _DRV_HVD_EX_Entry(u8DrvId);
7553
7554 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_IGNORE_CROP, bEnable);
7555
7556 _DRV_HVD_EX_RET(u8DrvId, eRet);
7557 }
7558
MDrv_HVD_EX_SuspendDynamicScale(MS_U32 u32Id,MS_BOOL bEnable)7559 HVD_EX_Result MDrv_HVD_EX_SuspendDynamicScale(MS_U32 u32Id, MS_BOOL bEnable)
7560 {
7561 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7562 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7563 HVD_EX_MSG_TRACE();
7564 _DRV_HVD_Inited(u8DrvId,eRet);
7565 _DRV_HVD_EX_Entry(u8DrvId);
7566
7567 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SUSPEND_DYNAMIC_SCALE, bEnable);
7568
7569 _DRV_HVD_EX_RET(u8DrvId, eRet);
7570 }
7571
MDrv_HVD_EX_RmEnablePtsTbl(MS_U32 u32Id,MS_BOOL bEnable)7572 HVD_EX_Result MDrv_HVD_EX_RmEnablePtsTbl(MS_U32 u32Id, MS_BOOL bEnable)
7573 {
7574 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7575 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7576 HVD_EX_MSG_TRACE();
7577 _DRV_HVD_Inited(u8DrvId,eRet);
7578 _DRV_HVD_EX_Entry(u8DrvId);
7579
7580 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RM_ENABLE_PTS_TBL, bEnable);
7581
7582 _DRV_HVD_EX_RET(u8DrvId, eRet);
7583 }
7584
7585
MDrv_HVD_EX_AutoExhaustESMode(MS_U32 u32Id,MS_U32 u32ESbound)7586 HVD_EX_Result MDrv_HVD_EX_AutoExhaustESMode(MS_U32 u32Id, MS_U32 u32ESbound)
7587 {
7588 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7589 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7590 HVD_EX_MSG_TRACE();
7591 _DRV_HVD_Inited(u8DrvId,eRet);
7592 _DRV_HVD_EX_Entry(u8DrvId);
7593
7594 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AUTO_EXHAUST_ES_MODE, u32ESbound);
7595
7596 _DRV_HVD_EX_RET(u8DrvId, eRet);
7597 }
7598
7599
MDrv_HVD_EX_SetMinTspSize(MS_U32 u32Id,MS_U32 u32Size)7600 HVD_EX_Result MDrv_HVD_EX_SetMinTspSize(MS_U32 u32Id, MS_U32 u32Size)
7601 {
7602 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7603 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7604 HVD_EX_MSG_TRACE();
7605 _DRV_HVD_Inited(u8DrvId,eRet);
7606 _DRV_HVD_EX_Entry(u8DrvId);
7607
7608 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_MIN_TSP_DATA_SIZE, u32Size);
7609
7610 _DRV_HVD_EX_RET(u8DrvId, eRet);
7611 }
7612
7613 //------------------------------------------------------------------------------
7614 /// Set HVD FRC drop type.
7615 /// @param u8DropType \b IN : drop type. 0:drop frame, 1:drop field. default:0
7616 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
7617 //------------------------------------------------------------------------------
MDrv_HVD_EX_SetFRCDropType(MS_U32 u32Id,MS_U8 u8DropType)7618 HVD_EX_Result MDrv_HVD_EX_SetFRCDropType(MS_U32 u32Id, MS_U8 u8DropType)
7619 {
7620 HVD_EX_Result eRet = E_HVD_EX_FAIL;
7621 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7622
7623 HVD_EX_MSG_TRACE();
7624 _DRV_HVD_Inited(u8DrvId,eRet);
7625 _DRV_HVD_EX_Entry(u8DrvId);
7626
7627 if (u8DropType != 0 && u8DropType != 1)
7628 {
7629 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
7630 _DRV_HVD_EX_RET(u8DrvId, eRet);
7631 }
7632
7633 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_DROP_MODE, u8DropType);
7634
7635 _DRV_HVD_EX_RET(u8DrvId, eRet);
7636 }
7637
7638 //-----------------------------------------------------------------------------
7639 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDrvFwVer()
7640 /// @brief \b Function \b Description: Get driver's FW version
7641 /// @return - Driver's FW version
7642 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDrvFwVer(void)7643 MS_U32 MDrv_HVD_EX_GetDrvFwVer(void)
7644 {
7645 return HVD_FW_VERSION;
7646 }
7647
7648 //-----------------------------------------------------------------------------
7649 /// @brief \b Function \b Name: MDrv_HVD_EX_GetFwVer()
7650 /// @brief \b Function \b Description: Get driver's FW version
7651 /// @return - FW version obtained by querying FW
7652 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFwVer(MS_U32 u32Id)7653 MS_U32 MDrv_HVD_EX_GetFwVer(MS_U32 u32Id)
7654 {
7655 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_VERSION_ID);
7656 }
7657
MDrv_HVD_SetSingleDecodeMode(MS_BOOL bEnable)7658 MS_BOOL MDrv_HVD_SetSingleDecodeMode(MS_BOOL bEnable)
7659 {
7660 return HAL_VPU_EX_SetSingleDecodeMode(bEnable);
7661 }
7662
MDrv_HVD_SetSTCMode(MS_U32 u32Id,MS_U32 u32STCIndex)7663 MS_BOOL MDrv_HVD_SetSTCMode(MS_U32 u32Id, MS_U32 u32STCIndex)
7664 {
7665 return HAL_VPU_EX_SetSTCMode(u32Id, u32STCIndex);
7666 }
7667
MDrv_HVD_SetDecodeMode(HVD_EX_DecModCfg * pstCfg)7668 MS_BOOL MDrv_HVD_SetDecodeMode(HVD_EX_DecModCfg *pstCfg)
7669 {
7670 MS_U8 i;
7671 VPU_EX_DecModCfg stVpuDecModCfg;
7672
7673 stVpuDecModCfg.u8DecMod = pstCfg->u8DecMod;
7674 stVpuDecModCfg.u8CodecCnt = pstCfg->u8CodecCnt;
7675 for (i=0; ((i<pstCfg->u8CodecCnt)&&(i<HVD_MAX_DEC_NUM)); i++)
7676 {
7677 stVpuDecModCfg.u8CodecType[i] = pstCfg->u8CodecType[i];
7678 }
7679 stVpuDecModCfg.u8ArgSize = pstCfg->u8ArgSize;
7680 stVpuDecModCfg.u32Arg = pstCfg->u32Arg;
7681
7682 return HAL_VPU_EX_SetDecodeMode(&stVpuDecModCfg);
7683 }
7684
MDrv_HVD_EX_SetBurstMode(MS_U32 u32Id,MS_BOOL bBurst)7685 void MDrv_HVD_EX_SetBurstMode(MS_U32 u32Id, MS_BOOL bBurst)
7686 {
7687 HVD_Return eCtrlRet = E_HVD_RETURN_FAIL;
7688
7689 eCtrlRet = HAL_HVD_EX_SetCmd(u32Id, E_DUAL_BURST_MODE, bBurst);
7690 if (E_HVD_RETURN_SUCCESS != eCtrlRet)
7691 {
7692 HVD_EX_MSG_ERR("E_DUAL_BURST_MODE NG eCtrlRet=%x\n", eCtrlRet);
7693 }
7694 else
7695 {
7696 HVD_EX_MSG_DBG("MJPEG!!! Set burst mode =%d success!!!!\n", bBurst);
7697 }
7698 }
7699
7700 //------------------------------------------------------------------------------
7701 /// Force into interlace mode
7702 /// @param u8Mode \b IN : 0: Disable, 1: Enable
7703 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
7704 //------------------------------------------------------------------------------
MDrv_HVD_EX_ForceInterlaceMode(MS_U32 u32Id,MS_U8 u8Mode)7705 HVD_EX_Result MDrv_HVD_EX_ForceInterlaceMode(MS_U32 u32Id, MS_U8 u8Mode)
7706 {
7707 HVD_EX_Result eRet = E_HVD_EX_FAIL;
7708 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7709
7710 HVD_EX_MSG_TRACE();
7711 _DRV_HVD_Inited(u8DrvId,eRet);
7712 _DRV_HVD_EX_Entry(u8DrvId);
7713
7714 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_INTERLACE, u8Mode);
7715
7716 _DRV_HVD_EX_RET(u8DrvId, eRet);
7717 }
7718
7719 //------------------------------------------------------------------------------
7720 /// Push Disp Q with Ref num
7721 /// @param u8Mode \b IN : 0: Disable, 1: Enable
7722 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
7723 //------------------------------------------------------------------------------
MDrv_HVD_EX_PushDispQWithRefNum(MS_U32 u32Id,MS_U8 u8Mode)7724 HVD_EX_Result MDrv_HVD_EX_PushDispQWithRefNum(MS_U32 u32Id, MS_U8 u8Mode)
7725 {
7726 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7727 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7728
7729 HVD_EX_MSG_TRACE();
7730 _DRV_HVD_Inited(u8DrvId,eRet);
7731 _DRV_HVD_EX_Entry(u8DrvId);
7732
7733 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PUSH_DISPQ_WITH_REF_NUM, u8Mode);
7734
7735 _DRV_HVD_EX_RET(u8DrvId, eRet);
7736 }
7737
7738 //------------------------------------------------------------------------------
7739 /// Ignore HW error - PIC_OVERRUN
7740 /// @param bEnable \b IN : 0: Disable, 1: Enable
7741 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
7742 //------------------------------------------------------------------------------
MDrv_HVD_EX_IgnorePicOverrun(MS_U32 u32Id,MS_BOOL bEnable)7743 HVD_EX_Result MDrv_HVD_EX_IgnorePicOverrun(MS_U32 u32Id, MS_BOOL bEnable)
7744 {
7745 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7746 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7747
7748 HVD_EX_MSG_TRACE();
7749 _DRV_HVD_Inited(u8DrvId,eRet);
7750 _DRV_HVD_EX_Entry(u8DrvId);
7751
7752 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_PIC_OVERRUN, bEnable);
7753
7754 _DRV_HVD_EX_RET(u8DrvId, eRet);
7755 }
7756
7757 //------------------------------------------------------------------------------
7758 /// Control speed in displaying time only.
7759 /// @param bEnable \b IN : 0: Original, control in decoding and displaying time, 1: Enable,control speed in displaying time only
7760 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
7761 //------------------------------------------------------------------------------
MDrv_HVD_EX_CtlSpeedInDispOnly(MS_U32 u32Id,MS_BOOL bEnable)7762 HVD_EX_Result MDrv_HVD_EX_CtlSpeedInDispOnly(MS_U32 u32Id, MS_BOOL bEnable)
7763 {
7764 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7765 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7766
7767 HVD_EX_MSG_TRACE();
7768 _DRV_HVD_Inited(u8DrvId,eRet);
7769 _DRV_HVD_EX_Entry(u8DrvId);
7770
7771 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, bEnable);
7772
7773 _DRV_HVD_EX_RET(u8DrvId, eRet);
7774 }
7775
7776 //------------------------------------------------------------------------------
7777 /// AVC support reference number over max DPB size when frame buffer is enough.
7778 /// @param bEnable \b IN : 0: Disable, 1: Enable
7779 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
7780 //------------------------------------------------------------------------------
MDrv_HVD_EX_AVCSupportRefNumOverMaxDBPSize(MS_U32 u32Id,MS_BOOL bEnable)7781 HVD_EX_Result MDrv_HVD_EX_AVCSupportRefNumOverMaxDBPSize(MS_U32 u32Id, MS_BOOL bEnable)
7782 {
7783 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7784 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7785
7786 HVD_EX_MSG_TRACE();
7787 _DRV_HVD_Inited(u8DrvId,eRet);
7788 _DRV_HVD_EX_Entry(u8DrvId);
7789
7790 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_SUPPORT_REF_NUM_OVER_MAX_DPB_SIZE, bEnable);
7791
7792 _DRV_HVD_EX_RET(u8DrvId, eRet);
7793 }
7794
MDrv_HVD_EX_ReturnInvalidAFD(MS_U32 u32Id,MS_BOOL bEnable)7795 HVD_EX_Result MDrv_HVD_EX_ReturnInvalidAFD(MS_U32 u32Id, MS_BOOL bEnable)
7796 {
7797 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7798 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7799
7800 HVD_EX_MSG_TRACE();
7801 _DRV_HVD_Inited(u8DrvId,eRet);
7802 _DRV_HVD_EX_Entry(u8DrvId);
7803
7804 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RETURN_INVALID_AFD, bEnable);
7805
7806 _DRV_HVD_EX_RET(u8DrvId, eRet);
7807 }
7808
7809
MDrv_HVD_EX_AVCForceBrokenByUs(MS_U32 u32Id,MS_BOOL bEnable)7810 HVD_EX_Result MDrv_HVD_EX_AVCForceBrokenByUs(MS_U32 u32Id, MS_BOOL bEnable)
7811 {
7812 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7813 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7814
7815 HVD_EX_MSG_TRACE();
7816 _DRV_HVD_Inited(u8DrvId,eRet);
7817 _DRV_HVD_EX_Entry(u8DrvId);
7818
7819 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_FORCE_BROKEN_BY_US, bEnable);
7820
7821 _DRV_HVD_EX_RET(u8DrvId, eRet);
7822 }
7823
7824 //-----------------------------------------------------------------------------
7825 /// @brief \b Function \b Name: MDrv_HVD_EX_Support_AVC2MVC()
7826 /// @brief \b Function \b Description: Set Support AVC to MVC
7827 /// @param -bEnable \b IN : turn on / off.
7828 /// @return -The result of command setting fd_mask muting count
7829 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Support_AVC2MVC(MS_U32 u32Id,MS_BOOL bEnable)7830 HVD_EX_Result MDrv_HVD_EX_Support_AVC2MVC(MS_U32 u32Id, MS_BOOL bEnable)
7831 {
7832 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7833 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7834
7835 HVD_EX_MSG_TRACE();
7836 _DRV_HVD_Inited(u8DrvId,eRet);
7837 _DRV_HVD_EX_Entry(u8DrvId);
7838
7839 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SUPPORT_AVC_TO_MVC, bEnable);
7840
7841 _DRV_HVD_EX_RET(u8DrvId, eRet);
7842 }
7843
7844 //-----------------------------------------------------------------------------
7845 /// @brief \b Function \b Name: MDrv_HVD_EX_3DLR_View_Exchange()
7846 /// @brief \b Function \b Description: view exchange
7847 /// @param -bEnable \b IN : turn on / off.
7848 /// @return -The result of command setting fd_mask muting count
7849 //-----------------------------------------------------------------------------
MDrv_HVD_EX_3DLR_View_Exchange(MS_U32 u32Id,MS_BOOL bEnable)7850 HVD_EX_Result MDrv_HVD_EX_3DLR_View_Exchange(MS_U32 u32Id, MS_BOOL bEnable)
7851 {
7852 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7853 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7854
7855 HVD_EX_MSG_TRACE();
7856 _DRV_HVD_Inited(u8DrvId,eRet);
7857 _DRV_HVD_EX_Entry(u8DrvId);
7858
7859 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_3DLR_VIEW_EXCHANGE, bEnable);
7860
7861 _DRV_HVD_EX_RET(u8DrvId, eRet);
7862 }
7863
7864 //-----------------------------------------------------------------------------
7865 /// @brief \b Function \b Name: MDrv_HVD_GetFrmRateIsSupported()
7866 /// @brief \b Function \b Description: Get if the framerate is supported
7867 /// @return -The result of supported or not.
7868 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFrmRateIsSupported(MS_U32 u32Id)7869 MS_BOOL MDrv_HVD_EX_GetFrmRateIsSupported(MS_U32 u32Id)
7870 {
7871 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7872 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7873 MS_BOOL bRet = pCtrl->bFrmRateSupported;
7874
7875 return bRet;
7876 }
7877
7878
7879 //-----------------------------------------------------------------------------
7880 /// @brief \b Function \b Name: MDrv_HVD_EX_Enable_New_Slow_Motion()
7881 /// @brief \b Function \b Description: view exchange
7882 /// @param -bEnable \b IN : turn on / off.
7883 /// @return -The result of command setting fd_mask muting count
7884 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Enable_New_Slow_Motion(MS_U32 u32Id,MS_BOOL bEnable)7885 HVD_EX_Result MDrv_HVD_EX_Enable_New_Slow_Motion(MS_U32 u32Id, MS_BOOL bEnable)
7886 {
7887 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7888 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7889
7890 HVD_EX_MSG_TRACE();
7891 _DRV_HVD_Inited(u8DrvId,eRet);
7892 _DRV_HVD_EX_Entry(u8DrvId);
7893
7894 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_NEW_SLOW_MOTION, bEnable);
7895
7896 _DRV_HVD_EX_RET(u8DrvId, eRet);
7897 }
7898
7899 //------------------------------------------------------------------------------
7900 /// Get SEI USER DATA Info
7901 /// @param pUsrInfo \b OUT : Get CC USER Data info
7902 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
7903 //------------------------------------------------------------------------------
MDrv_HVD_EX_GetUserDataInfo(MS_U32 u32Id,HVD_EX_UserData_Info * pUsrInfo)7904 HVD_EX_Result MDrv_HVD_EX_GetUserDataInfo(MS_U32 u32Id,HVD_EX_UserData_Info* pUsrInfo)
7905 {
7906 HVD_EX_Result eRet = E_HVD_EX_FAIL;
7907 MS_U32 u32UserDataIdxSize = 0;
7908 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
7909 MS_U32 u32UserDataSize = 0;
7910 MS_VIRT u32UserDataAddr = 0;
7911 MS_VIRT u32CodeVAddr = 0;
7912 DTV_BUF_type* pHVD_User_Data = NULL;
7913 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7914 HVD_EX_MSG_TRACE();
7915 _DRV_HVD_Inited(u8DrvId,eRet);
7916 _DRV_HVD_EX_Entry(u8DrvId);
7917
7918 u32UserDataIdxSize = (MS_U32)HAL_HVD_EX_GetData(u32Id,E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
7919 u32UsrDataIdxWptr = MDrv_HVD_EX_GetUserData_Wptr(u32Id);
7920
7921 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
7922 {
7923 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr = u32UsrDataIdxWptr;
7924 }
7925
7926 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd == pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr)
7927 { // User Data Buffer Empty
7928 _DRV_HVD_EX_RET(u8DrvId, eRet);
7929 }
7930
7931 u32CodeVAddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufVAddr;
7932 if(u32CodeVAddr == 0x0)
7933 {
7934 eRet = E_HVD_EX_FAIL;
7935 _DRV_HVD_EX_RET(u8DrvId, eRet);
7936 }
7937
7938 u32UserDataAddr = MDrv_HVD_EX_GetUserData_Packet(u32Id,pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd, (MS_U32*)&u32UserDataSize );
7939 if(u32UserDataAddr == 0x0)
7940 {
7941 eRet = E_HVD_EX_FAIL;
7942 _DRV_HVD_EX_RET(u8DrvId, eRet);
7943 }
7944 u32UserDataAddr += u32CodeVAddr; // change to virtual address
7945
7946 pHVD_User_Data = (DTV_BUF_type*)u32UserDataAddr;
7947
7948 pUsrInfo->u16TmpRef = pHVD_User_Data->u16TempRefCnt;
7949 pUsrInfo->u8PicStruct = pHVD_User_Data->pic_struct;
7950 pUsrInfo->u8PicType = pHVD_User_Data->type;
7951 pUsrInfo->u32Pts = pHVD_User_Data->pts;
7952 pUsrInfo->u8ByteCnt = pHVD_User_Data->len;
7953 pUsrInfo->u32DataBuf = (MS_VIRT)pHVD_User_Data->buf;
7954
7955 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd++;
7956
7957 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd >= u32UserDataIdxSize)
7958 {
7959 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd = 0;
7960 }
7961
7962 eRet = E_HVD_EX_OK;
7963
7964 _DRV_HVD_EX_RET(u8DrvId, eRet);
7965
7966 }
7967
7968 //------------------------------------------------------------------------------
7969 /// @brief \b Function \b Name: MDrv_HVD_GetUsrDataIsAvailable()
7970 /// @brief \b Function \b Description: Is there new user data info.
7971 /// @return - TRUE/ FALSE
7972 /// @retval -FALSE(0): no new user data info
7973 /// @retval -TRUE(1): has new user data info
7974 //------------------------------------------------------------------------------
MDrv_HVD_EX_GetUsrDataIsAvailable(MS_U32 u32Id)7975 MS_BOOL MDrv_HVD_EX_GetUsrDataIsAvailable(MS_U32 u32Id)
7976 {
7977
7978 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7979 MS_BOOL bRet = FALSE;
7980 HVD_EX_MSG_TRACE();
7981 _DRV_HVD_EX_Entry(u8DrvId);
7982 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
7983 u32UsrDataIdxWptr = MDrv_HVD_EX_GetUserData_Wptr(u32Id);
7984
7985 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
7986 {
7987 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr = u32UsrDataIdxWptr;
7988 }
7989
7990 bRet = (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr == pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd)?FALSE:TRUE;
7991 _DRV_HVD_EX_RET(u8DrvId, bRet);
7992 }
7993
7994 //------------------------------------------------------------------------------
7995 /// Set HVD DTV User Data Packet Mode
7996 /// @param u8UserDataMode \b IN : User Data Packet Mode. 0: DVB normal, 1: ATSC DirectTV. default:0
7997 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
7998 //------------------------------------------------------------------------------
MDrv_HVD_EX_SetDTVUserDataMode(MS_U32 u32Id,MS_U8 u8UserDataMode)7999 HVD_EX_Result MDrv_HVD_EX_SetDTVUserDataMode(MS_U32 u32Id,MS_U8 u8UserDataMode)
8000 {
8001 HVD_EX_Result eRet = E_HVD_EX_FAIL;
8002 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8003 HVD_EX_MSG_TRACE();
8004 _DRV_HVD_Inited(u8DrvId,eRet);
8005 _DRV_HVD_EX_Entry(u8DrvId);
8006
8007
8008 if (u8UserDataMode == 0)
8009 {
8010 // Noraml DVB USER DATA
8011 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 0);
8012 }
8013 else if (u8UserDataMode == 1)
8014 {
8015 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 1);
8016 }
8017 else if (u8UserDataMode == 2)
8018 {
8019 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 2);
8020 }
8021 else if (u8UserDataMode == 3)
8022 {
8023 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 3);
8024 }
8025 else if (u8UserDataMode == 7)
8026 {
8027 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 7);
8028 }
8029 else
8030 {
8031 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, u8UserDataMode);
8032 VPRINTF("Debug Mode for set user data mode \n");
8033 }
8034
8035 _DRV_HVD_EX_RET(u8DrvId, eRet);
8036 }
8037
8038
8039 //-----------------------------------------------------------------------------
8040 /// @brief \b Function \b Name: MDrv_HVD_GetFrmPackingArrSEI()
8041 /// @brief \b Function \b Description: Get if the Frame packing arrangement SEI data
8042 /// @param -bEnable \b IN : The frame packing SEI struct
8043 /// @return -The result of got the info. or not.
8044 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFrmPackingArrSEI(MS_U32 u32Id,HVD_EX_FrmPackingSEI * pFrmPacking)8045 HVD_EX_Result MDrv_HVD_EX_GetFrmPackingArrSEI(MS_U32 u32Id, HVD_EX_FrmPackingSEI *pFrmPacking)
8046 {
8047
8048 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8049 MS_VIRT u32FPAFrameAddr = 0 ;
8050 MS_VIRT u32CodeVaddr = 0 ;
8051 HVD_Frame_packing_SEI *pFrmPackingSrc = NULL;
8052 MS_BOOL bIn = FALSE;
8053 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8054
8055 HVD_EX_MSG_TRACE();
8056 _DRV_HVD_Inited(u8DrvId,eRet);
8057 _DRV_HVD_EX_Entry(u8DrvId);
8058
8059 u32CodeVaddr = MS_PA2KSEG1((MS_PHY)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr));
8060 if(u32CodeVaddr == 0x0)
8061 {
8062 eRet = E_HVD_EX_FAIL;
8063 _DRV_HVD_EX_RET(u8DrvId, eRet);
8064 }
8065
8066 u32FPAFrameAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRM_PACKING_SEI_DATA);
8067
8068 //u32FPAFrameAddr = HAL_HVD_EX_GetData(u8DrvId,E_HVD_GDATA_FRM_PACKING_SEI_DATA);
8069 if(u32FPAFrameAddr == 0x0)
8070 {
8071 eRet = E_HVD_EX_FAIL;
8072 _DRV_HVD_EX_RET(u8DrvId, eRet);
8073 }
8074
8075 u32FPAFrameAddr = MS_PA2KSEG1((MS_PHY)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr+u32FPAFrameAddr)); // change to virtual address
8076
8077 pFrmPackingSrc = (HVD_Frame_packing_SEI *)u32FPAFrameAddr;
8078
8079 if(pFrmPacking != NULL)
8080 {
8081 if(pFrmPackingSrc->bvaild == TRUE)
8082 {
8083 bIn = TRUE;
8084 pFrmPacking->bvaild = pFrmPackingSrc->bvaild;
8085 pFrmPacking->bUsed = pFrmPackingSrc->bUsed;
8086 pFrmPacking->u8Frm_packing_arr_cnl_flag = pFrmPackingSrc->u8Frm_packing_arr_cnl_flag;
8087 pFrmPacking->u8Frm_packing_arr_type = pFrmPackingSrc->u8Frm_packing_arr_type;
8088 pFrmPacking->u8content_interpretation_type = pFrmPackingSrc->u8content_interpretation_type;
8089 pFrmPacking->u1Quincunx_sampling_flag = pFrmPackingSrc->u1Quincunx_sampling_flag;
8090 pFrmPacking->u1Spatial_flipping_flag = pFrmPackingSrc->u1Spatial_flipping_flag;
8091 pFrmPacking->u1Frame0_flipping_flag = pFrmPackingSrc->u1Frame0_flipping_flag;
8092 pFrmPacking->u1Field_views_flag = pFrmPackingSrc->u1Field_views_flag;
8093 pFrmPacking->u1Current_frame_is_frame0_flag = pFrmPackingSrc->u1Current_frame_is_frame0_flag;
8094 pFrmPacking->u1Frame0_self_contained_flag = pFrmPackingSrc->u1Frame0_self_contained_flag;
8095 pFrmPacking->u1Frame1_self_contained_flag = pFrmPackingSrc->u1Frame1_self_contained_flag;
8096 pFrmPacking->u4Frame0_grid_position_x = pFrmPackingSrc->u4Frame0_grid_position_x;
8097 pFrmPacking->u4Frame0_grid_position_y = pFrmPackingSrc->u4Frame0_grid_position_y;
8098 pFrmPacking->u4Frame1_grid_position_x = pFrmPackingSrc->u4Frame1_grid_position_x;
8099 pFrmPacking->u4Frame1_grid_position_y = pFrmPackingSrc->u4Frame1_grid_position_y;
8100 pFrmPacking->u16CropRight = pFrmPackingSrc->u16CropRight;
8101 pFrmPacking->u16CropLeft = pFrmPackingSrc->u16CropLeft;
8102 pFrmPacking->u16CropBottom = pFrmPackingSrc->u16CropBottom;
8103 pFrmPacking->u16CropTop = pFrmPackingSrc->u16CropTop;
8104
8105 if(pFrmPackingSrc->u8payload_len > 32)
8106 {
8107 pFrmPacking->u8payload_len = 32;
8108 }
8109 else
8110 {
8111 pFrmPacking->u8payload_len = pFrmPackingSrc->u8payload_len;
8112 }
8113
8114 pFrmPacking->u8WaitSPS = pFrmPackingSrc->u8WaitSPS;
8115 pFrmPacking->u32payload = (MS_VIRT)pFrmPackingSrc->u8payload;
8116
8117 eRet = E_HVD_EX_OK;
8118 }
8119 else
8120 {
8121 eRet = E_HVD_EX_FAIL;
8122 }
8123 HVD_EX_MSG_DBG("SEI status (%d): %d %d %d %d %d %d %d %d\n",bIn,
8124 pFrmPacking->bvaild,pFrmPacking->bUsed,pFrmPacking->u8Frm_packing_arr_cnl_flag,pFrmPacking->u8Frm_packing_arr_type,
8125 pFrmPacking->u16CropRight,pFrmPacking->u16CropLeft,pFrmPacking->u16CropBottom,pFrmPacking->u16CropTop);
8126 }
8127 else
8128 {
8129 eRet = E_HVD_EX_FAIL;
8130 }
8131 _DRV_HVD_EX_RET(u8DrvId, eRet);
8132 }
8133
MDrv_HVD_EX_GetDisplayColourVolumeArrSEI(MS_U32 u32Id,HVD_EX_DisplayColourVolumeSEI * pDisplayColourVolume)8134 HVD_EX_Result MDrv_HVD_EX_GetDisplayColourVolumeArrSEI(MS_U32 u32Id, HVD_EX_DisplayColourVolumeSEI *pDisplayColourVolume)
8135 {
8136 HVD_EX_Result eRet = E_HVD_EX_FAIL;
8137 MS_VIRT u32DCVFrameAddr = 0 ;
8138
8139 HVD_EX_DisplayColourVolumeSEI *pDisplayColourVolumeSrc = NULL;
8140 MS_BOOL bIn = FALSE;
8141 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8142
8143 HVD_EX_MSG_TRACE();
8144 _DRV_HVD_Inited(u8DrvId,eRet);
8145 _DRV_HVD_EX_Entry(u8DrvId);
8146
8147 u32DCVFrameAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISPLAY_COLOUR_VOLUME_SEI_DATA);//get data
8148
8149 if(u32DCVFrameAddr == 0x0)
8150 {
8151 eRet = E_HVD_EX_FAIL;
8152 _DRV_HVD_EX_RET(u8DrvId, eRet);
8153 }
8154
8155 u32DCVFrameAddr = MS_PA2KSEG1((MS_U32)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr+u32DCVFrameAddr)); // change to virtual address
8156
8157 pDisplayColourVolumeSrc = (HVD_EX_DisplayColourVolumeSEI *)u32DCVFrameAddr;
8158
8159 if(pDisplayColourVolume != NULL)
8160 {
8161 bIn = TRUE;
8162
8163 pDisplayColourVolume->bUsed = pDisplayColourVolumeSrc->bUsed;
8164 pDisplayColourVolume->bColourVolumeSEIEnabled = pDisplayColourVolumeSrc->bColourVolumeSEIEnabled;
8165 pDisplayColourVolume->u32MaxLuminance = pDisplayColourVolumeSrc->u32MaxLuminance;
8166 pDisplayColourVolume->u32MinLuminance = pDisplayColourVolumeSrc->u32MinLuminance;
8167 pDisplayColourVolume->u16Primaries[0][0] = pDisplayColourVolumeSrc->u16Primaries[0][0];
8168 pDisplayColourVolume->u16Primaries[0][1] = pDisplayColourVolumeSrc->u16Primaries[0][1];
8169 pDisplayColourVolume->u16Primaries[1][0] = pDisplayColourVolumeSrc->u16Primaries[1][0];
8170 pDisplayColourVolume->u16Primaries[1][1] = pDisplayColourVolumeSrc->u16Primaries[1][1];
8171 pDisplayColourVolume->u16Primaries[2][0] = pDisplayColourVolumeSrc->u16Primaries[2][0];
8172 pDisplayColourVolume->u16Primaries[2][1] = pDisplayColourVolumeSrc->u16Primaries[2][1];
8173 pDisplayColourVolume->u16WhitePoint[0] = pDisplayColourVolumeSrc->u16WhitePoint[0];
8174 pDisplayColourVolume->u16WhitePoint[1] = pDisplayColourVolumeSrc->u16WhitePoint[1];
8175
8176 eRet = E_HVD_EX_OK;
8177 }
8178 else
8179 {
8180 eRet = E_HVD_EX_FAIL;
8181 }
8182 _DRV_HVD_EX_RET(u8DrvId, eRet);
8183 }
8184
MDrv_HVD_EX_GetContentLightLevelInfoSEI(MS_U32 u32Id,HVD_EX_ContentLightLevelInfoSEI * pContentLightLevel)8185 HVD_EX_Result MDrv_HVD_EX_GetContentLightLevelInfoSEI(MS_U32 u32Id, HVD_EX_ContentLightLevelInfoSEI *pContentLightLevel)
8186 {
8187 HVD_EX_Result eRet = E_HVD_EX_FAIL;
8188 MS_VIRT u32CLLIAddr = 0 ;
8189
8190 HVD_EX_ContentLightLevelInfoSEI *pContentLightLevelInfoSrc = NULL;
8191 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8192
8193 HVD_EX_MSG_TRACE();
8194 _DRV_HVD_Inited(u8DrvId,eRet);
8195 _DRV_HVD_EX_Entry(u8DrvId);
8196
8197 u32CLLIAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_CONTENT_LIGHT_LEVEL_INFO);//get data
8198
8199 if(u32CLLIAddr == 0x0)
8200 {
8201 eRet = E_HVD_EX_FAIL;
8202 _DRV_HVD_EX_RET(u8DrvId, eRet);
8203 }
8204
8205 u32CLLIAddr = MS_PA2KSEG1((MS_U32)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr+u32CLLIAddr)); // change to virtual address
8206 pContentLightLevelInfoSrc = (HVD_EX_ContentLightLevelInfoSEI *)u32CLLIAddr;
8207 if(pContentLightLevel != NULL)
8208 {
8209 pContentLightLevel->bUsed = pContentLightLevelInfoSrc->bUsed;
8210 pContentLightLevel->ContentLightLevelEnabled = pContentLightLevelInfoSrc->ContentLightLevelEnabled;
8211 pContentLightLevel->maxContentLightLevel = pContentLightLevelInfoSrc->maxContentLightLevel;
8212 pContentLightLevel->maxPicAverageLightLevel = pContentLightLevelInfoSrc->maxPicAverageLightLevel;
8213 eRet = E_HVD_EX_OK;
8214 }
8215 else
8216 {
8217 eRet = E_HVD_EX_FAIL;
8218 }
8219 _DRV_HVD_EX_RET(u8DrvId, eRet);
8220 }
8221
8222 //-----------------------------------------------------------------------------
8223 /// @brief \b Function \b Name: MDrv_HVD_EX_DynamicScalingResvNBuffer()
8224 /// @brief \b Function \b Description: use N buffers for Dynamic Scaling
8225 /// @param -bEnable \b IN : turn on / off.
8226 /// @return -The result of command to enable/disable N buffer for DS
8227 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DynamicScalingResvNBuffer(MS_U32 u32Id,MS_BOOL bEnable)8228 HVD_EX_Result MDrv_HVD_EX_DynamicScalingResvNBuffer(MS_U32 u32Id, MS_BOOL bEnable)
8229 {
8230 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8231 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8232
8233 HVD_EX_MSG_TRACE();
8234 _DRV_HVD_Inited(u8DrvId,eRet);
8235 _DRV_HVD_EX_Entry(u8DrvId);
8236
8237 //HVD_PRINT("MDrv_HVD_EX_DynamicScalingResvNBuffer bEnable = %d\n", bEnable);
8238 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, bEnable);
8239
8240 _DRV_HVD_EX_RET(u8DrvId, eRet);
8241 }
8242
8243 //-----------------------------------------------------------------------------
8244 /// @brief \b Function \b Name: MDrv_HVD_EX_GetBBUQNum()
8245 /// @brief \b Function \b Description: Get BBU Q number
8246 /// @return - BBU Q number
8247 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetBBUQNum(MS_U32 u32Id)8248 MS_U32 MDrv_HVD_EX_GetBBUQNum(MS_U32 u32Id)
8249 {
8250 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8251 _DRV_HVD_Inited(u8DrvId,FALSE);
8252
8253 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB);
8254 }
8255
8256 //-----------------------------------------------------------------------------
8257 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDispFrmNum()
8258 /// @brief \b Function \b Description: Get Disp frame number
8259 /// @return - Disp frame number
8260 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDispFrmNum(MS_U32 u32Id)8261 MS_U32 MDrv_HVD_EX_GetDispFrmNum(MS_U32 u32Id)
8262 {
8263 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8264 _DRV_HVD_Inited(u8DrvId,FALSE);
8265
8266 return HAL_HVD_EX_GetDispFrmNum(u32Id);
8267 }
8268
8269 //-----------------------------------------------------------------------------
8270 /// @brief \b Function \b Name: MDrv_HVD_EX_SetHVDClock()
8271 /// @brief \b Function \b Description: set hvd clock speed
8272 /// @return - The result of setting hvd clock speed
8273 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetHVDClockSpeed(HVD_EX_ClockSpeed eClockSpeed)8274 HVD_EX_Result MDrv_HVD_EX_SetHVDClockSpeed(HVD_EX_ClockSpeed eClockSpeed)
8275 {
8276 #if defined(CHIP_A3)
8277 HAL_HVD_EX_ClockSpeed eHVDClockSpeed = E_HVD_EX_CLOCK_SPEED_NONE;
8278 switch (eClockSpeed)
8279 {
8280 case E_HVD_EX_CLOCK_SPEED_HIGHEST:
8281 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_HIGHEST;
8282 break;
8283 case E_HVD_EX_CLOCK_SPEED_HIGH:
8284 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_HIGH;
8285 break;
8286 case E_HVD_EX_CLOCK_SPEED_MEDIUM:
8287 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_MEDIUM;
8288 break;
8289 case E_HVD_EX_CLOCK_SPEED_LOW:
8290 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_LOW;
8291 break;
8292 case E_HVD_EX_CLOCK_SPEED_LOWEST:
8293 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_LOWEST;
8294 break;
8295 case E_HVD_EX_CLOCK_SPEED_DEFAULT:
8296 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_DEFAULT;
8297 break;
8298 default:
8299 HVD_EX_MSG_ERR("hvd clock setting is wrong(%d)\n", eClockSpeed);
8300 return E_HVD_EX_FAIL;
8301 break;
8302 }
8303
8304 if(E_HVD_RETURN_SUCCESS != HAL_HVD_EX_SetClockSpeed(eHVDClockSpeed))
8305 {
8306 return E_HVD_EX_FAIL;
8307 }
8308
8309 return E_HVD_EX_OK;
8310 #else
8311 UNUSED(eClockSpeed);
8312 VPRINTF("This chip does not support hvd clock presetting~\n");
8313 return E_HVD_EX_RET_UNSUPPORTED;
8314 #endif
8315 }
8316
8317 //-----------------------------------------------------------------------------
8318 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVPUClockSpeed()
8319 /// @brief \b Function \b Description: set vpu clock speed
8320 /// @return - The result of setting vpu clock speed
8321 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVPUClockSpeed(HVD_EX_ClockSpeed eClockSpeed)8322 HVD_EX_Result MDrv_HVD_EX_SetVPUClockSpeed(HVD_EX_ClockSpeed eClockSpeed)
8323 {
8324 #if defined(CHIP_A3)
8325 HAL_VPU_EX_ClockSpeedType eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_NONE;
8326 switch (eClockSpeed)
8327 {
8328 case E_HVD_EX_CLOCK_SPEED_HIGHEST:
8329 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_HIGHEST;
8330 break;
8331 case E_HVD_EX_CLOCK_SPEED_HIGH:
8332 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_HIGH;
8333 break;
8334 case E_HVD_EX_CLOCK_SPEED_MEDIUM:
8335 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_MEDIUM;
8336 break;
8337 case E_HVD_EX_CLOCK_SPEED_LOW:
8338 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_LOW;
8339 break;
8340 case E_HVD_EX_CLOCK_SPEED_LOWEST:
8341 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_LOWEST;
8342 break;
8343 case E_HVD_EX_CLOCK_SPEED_DEFAULT:
8344 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_DEFAULT;
8345 break;
8346 default:
8347 HVD_EX_MSG_ERR("vpu clock setting is wrong(%d)\n", eVPUClockSpeed);
8348 return E_HVD_EX_FAIL;
8349 break;
8350 }
8351
8352 if(FALSE == HAL_VPU_EX_SetClockSpeedType(eVPUClockSpeed))
8353 {
8354 return E_HVD_EX_FAIL;
8355 }
8356
8357 return E_HVD_EX_OK;
8358 #else
8359 UNUSED(eClockSpeed);
8360 VPRINTF("This chip does not support vpu clock presetting~\n");
8361 return E_HVD_EX_RET_UNSUPPORTED;
8362 #endif
8363 }
8364
MDrv_HVD_EX_SetHVDColBBUMode(MS_U32 u32Id,MS_U8 bEnable)8365 HVD_EX_Result MDrv_HVD_EX_SetHVDColBBUMode(MS_U32 u32Id, MS_U8 bEnable)
8366 {
8367 #if (defined(CHIP_EDISON) || defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3)) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MUJI) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(CHIP_MANHATTAN) || defined(CHIP_MESSI) || defined(CHIP_MASERATI) || defined(CHIP_MAXIM) || defined(CHIP_K6) || defined(CHIP_LITE)
8368 if(E_HVD_RETURN_SUCCESS != HAL_HVD_EX_SetHVDColBBUMode(u32Id, bEnable))
8369 return E_HVD_EX_FAIL;
8370 #endif
8371 return E_HVD_EX_OK;
8372 }
8373
8374 //-----------------------------------------------------------------------------
8375 /// @brief \b Function \b Name: MDrv_HVD_EX_DSReportDispInfoChange()
8376 /// @brief \b Function \b Description: Setting report display info change info. when DS enabled.
8377 /// @param -bEnable \b IN : turn on / off.
8378 /// @return -The result of command to enable/disable Report display info change info.
8379 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DSReportDispInfoChange(MS_U32 u32Id,MS_BOOL bEnable)8380 HVD_EX_Result MDrv_HVD_EX_DSReportDispInfoChange(MS_U32 u32Id, MS_BOOL bEnable)
8381 {
8382 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8383 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8384
8385 HVD_EX_MSG_TRACE();
8386 _DRV_HVD_Inited(u8DrvId,eRet);
8387 _DRV_HVD_EX_Entry(u8DrvId);
8388
8389 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DS_RESET_XC_DISP_WIN, bEnable);
8390
8391 _DRV_HVD_EX_RET(u8DrvId, eRet);
8392
8393 }
8394
MDrv_HVD_EX_SetSecureMode(MS_U32 u32Id,MS_U32 u32SecureMode)8395 HVD_EX_Result MDrv_HVD_EX_SetSecureMode(MS_U32 u32Id, MS_U32 u32SecureMode)
8396 {
8397 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8398 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8399
8400 HVD_EX_MSG_TRACE();
8401 _DRV_HVD_Inited(u8DrvId,eRet);
8402 _DRV_HVD_EX_Entry(u8DrvId);
8403
8404 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SecureMode = (MS_U8)u32SecureMode;
8405
8406 _DRV_HVD_EX_RET(u8DrvId, eRet);
8407 }
8408
8409
8410 //-----------------------------------------------------------------------------
8411 /// @brief \b Function \b Name: MDrv_HVD_EX_SupportRefNumOverMaxDpbSize()
8412 /// @brief \b Function \b Description: Support h264 FHD ref frame up to 6
8413 /// @param -bEnable \b IN : turn on / off.
8414 /// @return -The result of command to enable/disable support h264 FHD ref frame up to 6
8415 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SupportRefNumOverMaxDpbSize(MS_U32 u32Id,MS_BOOL bEnable)8416 HVD_EX_Result MDrv_HVD_EX_SupportRefNumOverMaxDpbSize(MS_U32 u32Id, MS_BOOL bEnable)
8417 {
8418 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8419 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8420
8421 HVD_EX_MSG_TRACE();
8422 _DRV_HVD_Inited(u8DrvId,eRet);
8423 _DRV_HVD_EX_Entry(u8DrvId);
8424
8425 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_SUPPORT_REF_NUM_OVER_MAX_DPB_SIZE, bEnable);
8426
8427 _DRV_HVD_EX_RET(u8DrvId, eRet);
8428 }
8429
8430 //-----------------------------------------------------------------------------
8431 /// @brief \b Function \b Name: MDrv_HVD_EX_RVU_Setting_Mode()
8432 /// @brief \b Function \b Description: RVU settings
8433 /// @param -u32Param \u32 IN : 0: diable, 1: Drop B-frame and force IDR.
8434 /// @return -The result of command setting E_HVD_CMD_RVU_SETTING_MODE
8435 //-----------------------------------------------------------------------------
MDrv_HVD_EX_RVU_Setting_Mode(MS_U32 u32Id,MS_U32 u32Param)8436 HVD_EX_Result MDrv_HVD_EX_RVU_Setting_Mode(MS_U32 u32Id, MS_U32 u32Param)
8437 {
8438 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8439 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8440
8441 HVD_EX_MSG_TRACE();
8442 _DRV_HVD_Inited(u8DrvId,eRet);
8443 _DRV_HVD_EX_Entry(u8DrvId);
8444
8445 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RVU_SETTING_MODE, u32Param);
8446
8447 _DRV_HVD_EX_RET(u8DrvId, eRet);
8448 }
8449
8450
8451 //-----------------------------------------------------------------------------
8452 /// @brief \b Function \b Name: MDrv_HVD_EX_FramerateHandling()
8453 /// @brief \b Function \b Description: FramerateHandling
8454 /// @brief \b A.Case of (timing_info_present_flag == 1)
8455 /// @brief \b i.Use num_units_in_tick and time_scale
8456 /// @brief \b ii.framerate = time_scale / num_units_in_tick / 2
8457 /// @brief \b iii.If calculated framerate from ii.
8458 /// @brief \b iv.If there is no time_scale or num_units_in_tick, framerate should be 30fps as default vaule.
8459 /// @brief \b B.Case of timing_info_present_flag == 0
8460 /// @brief \b i.Use framerate from application
8461 /// @brief \b C.If there is no VUI information, use framerate from application
8462 /// @param -bu32FrameRate \b IN : framerate from application
8463 /// @return -The result of command for handling framerate
8464 //-----------------------------------------------------------------------------
MDrv_HVD_EX_FramerateHandling(MS_U32 u32Id,MS_U32 u32FrameRate)8465 HVD_EX_Result MDrv_HVD_EX_FramerateHandling(MS_U32 u32Id, MS_U32 u32FrameRate)
8466 {
8467 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8468 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8469
8470 HVD_EX_MSG_TRACE();
8471 _DRV_HVD_Inited(u8DrvId,eRet);
8472 _DRV_HVD_EX_Entry(u8DrvId);
8473
8474 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRAMERATE_HANDLING, u32FrameRate);
8475
8476 _DRV_HVD_EX_RET(u8DrvId, eRet);
8477 }
8478
8479 //-----------------------------------------------------------------------------
8480 /// @brief \b Function \b Name: MDrv_HVD_EX_DualNonBlockMode()
8481 /// @brief \b Function \b Description: handle dual non blocking mode
8482 /// @param -bEnable \b IN : turn on / off.
8483 /// @return -The result of command setting E_HVD_CMD_DUAL_NON_BLOCK_MODE
8484 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DualNonBlockMode(MS_U32 u32Id,MS_BOOL bEnable)8485 HVD_EX_Result MDrv_HVD_EX_DualNonBlockMode(MS_U32 u32Id, MS_BOOL bEnable)
8486 {
8487 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8488 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8489
8490 HVD_EX_MSG_TRACE();
8491 _DRV_HVD_Inited(u8DrvId,eRet);
8492 _DRV_HVD_EX_Entry(u8DrvId);
8493
8494 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DUAL_NON_BLOCK_MODE, bEnable);
8495
8496 _DRV_HVD_EX_RET(u8DrvId, eRet);
8497 }
8498
8499 //-----------------------------------------------------------------------------
8500 /// @brief \b Function \b Name: MDrv_HVD_EX_IgnorePicStructDisplay()
8501 /// @brief \b Function \b Description: Ignore Pic_struct when display progressive frame.
8502 /// @param -bEnable \b IN : turn on / off.
8503 /// @return -The result of command to enable/disable ignore Pic_struct when display progressive frame.
8504 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IgnorePicStructDisplay(MS_U32 u32Id,MS_U32 param)8505 HVD_EX_Result MDrv_HVD_EX_IgnorePicStructDisplay(MS_U32 u32Id, MS_U32 param)
8506 {
8507 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8508 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8509
8510 HVD_EX_MSG_TRACE();
8511 _DRV_HVD_Inited(u8DrvId,eRet);
8512 _DRV_HVD_EX_Entry(u8DrvId);
8513
8514 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_PIC_STRUCT_DISPLAY, param);
8515
8516 _DRV_HVD_EX_RET(u8DrvId, eRet);
8517 }
8518
8519 //-----------------------------------------------------------------------------
8520 /// @brief \b Function \b Name: MDrv_HVD_EX_InputPtsFreerunMode()
8521 /// @brief \b Function \b Description: video free run when the difference between input PTS and current STC is large than E_HVD_CMD_FREERUN_THRESHOLD + 1s.
8522 /// @param -bEnable \b IN : turn on / off.
8523 /// @return -The result of command to enable/disable video free run when the difference between input PTS and current STC is large than E_HVD_CMD_FREERUN_THRESHOLD + 1s.
8524 //-----------------------------------------------------------------------------
MDrv_HVD_EX_InputPtsFreerunMode(MS_U32 u32Id,MS_U32 param)8525 HVD_EX_Result MDrv_HVD_EX_InputPtsFreerunMode(MS_U32 u32Id, MS_U32 param)
8526 {
8527 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8528 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8529
8530 HVD_EX_MSG_TRACE();
8531 _DRV_HVD_Inited(u8DrvId,eRet);
8532 _DRV_HVD_EX_Entry(u8DrvId);
8533
8534 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_INPUT_PTS_FREERUN_MODE, param);
8535
8536 _DRV_HVD_EX_RET(u8DrvId, eRet);
8537 }
8538
8539 //-----------------------------------------------------------------------------
8540 /// @brief \b Function \b Name: MDrv_HVD_EX_ErrConcealStartSlice1stMB()
8541 /// @brief \b Function \b Description: Error concealment from current slice first MB.(Need enable E_HVD_CMD_ERR_CONCEAL)
8542 /// @param -bEnable \b IN : turn on / off.
8543 /// @return -The result of command to enable/disable Error concealment from current slice first MB.(Need enable E_HVD_CMD_ERR_CONCEAL)
8544 //-----------------------------------------------------------------------------
MDrv_HVD_EX_ErrConcealStartSlice1stMB(MS_U32 u32Id,MS_U32 param)8545 HVD_EX_Result MDrv_HVD_EX_ErrConcealStartSlice1stMB(MS_U32 u32Id, MS_U32 param)
8546 {
8547 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8548 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8549
8550 HVD_EX_MSG_TRACE();
8551 _DRV_HVD_Inited(u8DrvId,eRet);
8552 _DRV_HVD_EX_Entry(u8DrvId);
8553
8554 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ERR_CONCEAL_SLICE_1ST_MB, param);
8555
8556 _DRV_HVD_EX_RET(u8DrvId, eRet);
8557 }
8558
8559
8560 //-----------------------------------------------------------------------------
8561 /// @brief \b Function \b Name: MDrv_HVD_EX_SetExternalDSBuffer()
8562 /// @brief \b Function \b Description: Set External DS buffer
8563 /// @param -bEnable \b IN : External DS buffer info.
8564 /// @return -The result of command to set external DS buffer.
8565 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetExternalDSBuffer(MS_U32 u32Id,HVD_EX_ExternalDSBuf * pExternalBuf)8566 HVD_EX_Result MDrv_HVD_EX_SetExternalDSBuffer(MS_U32 u32Id, HVD_EX_ExternalDSBuf *pExternalBuf)
8567 {
8568 #define SIZE_3K 0xC00
8569 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8570 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8571 HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
8572 MS_BOOL bFWInMIU1 = FALSE;
8573 MS_BOOL bExternalInMIU1 = FALSE;
8574 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8575 MS_PHY u32DSBufAddr = pExternalBuf->u32DSBufAddr;
8576
8577 HVD_EX_MSG_TRACE();
8578 _DRV_HVD_Inited(u8DrvId,eRet);
8579 _DRV_HVD_EX_Entry(u8DrvId);
8580
8581 if((pShm == NULL) || (pCtrl == NULL) || (pExternalBuf->u32DSBufSize < SIZE_3K)) /// DS buffer size need more than 3K (0xC00)
8582 {
8583 return E_HVD_EX_FAIL;
8584 }
8585
8586 #if defined(CHIP_MONACO) || defined(CHIP_MUJI) || defined(CHIP_MONET) || defined(CHIP_MANHATTAN) || defined(CHIP_MESSI) || defined(CHIP_MASERATI) || defined(CHIP_MAXIM) || defined(CHIP_K6) || defined(CHIP_K6LITE)
8587 if(VPU_FORCE_MIU_MODE == 1)
8588 {
8589 HVD_EX_MSG_ERR("this chip does not support set external DS buffer since VPU_FORCE_MIU_MODE == 1 !!\n");
8590 return E_HVD_EX_RET_UNSUPPORTED;
8591 }
8592 #endif
8593
8594 ///HVD_PRINT("[EDS] 0x%lx, 0x%lx.\n",pCtrl->MemMap.u32CodeBufAddr,pCtrl->MemMap.u32MIU1BaseAddr);
8595 if((pCtrl->MemMap.u32CodeBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr) && (pCtrl->MemMap.u32MIU1BaseAddr != 0))
8596 {
8597 bFWInMIU1 = TRUE;
8598 }
8599
8600 if((pExternalBuf->u32DSBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr) && (pCtrl->MemMap.u32MIU1BaseAddr != 0) )
8601 {
8602 bExternalInMIU1 = TRUE;
8603 u32DSBufAddr -= pCtrl->MemMap.u32MIU1BaseAddr;
8604 }
8605 //HVD_PRINT("[EDS] MIU %d, %d.\n",bFWInMIU1,bExternalInMIU1);
8606
8607 /// If FW and external buf is in the same MIU, the External buffer do nothing.
8608 if(bFWInMIU1 == bExternalInMIU1)
8609 {
8610 pShm->u32DSbufferAddr = u32DSBufAddr;
8611 }
8612 else
8613 {
8614 /// If FW and external buf is not in the same MIU, the External buffer add the VPU Miu base size
8615 pShm->u32DSbufferAddr = u32DSBufAddr + HAL_VPU_EX_MIU1BASE();
8616 }
8617 pShm->u32DSBuffSize = pExternalBuf->u32DSBufSize;
8618
8619 MsOS_FlushMemory();
8620 ///HVD_PRINT("[EDS] DS addr = 0x%lx, size = 0x%lx.\n",pShm->u32DSbufferAddr,pShm->u32DSBuffSize);
8621 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_EXTERNAL_DS_BUF, TRUE);
8622
8623 pCtrl->u8SettingMode |= HVD_DRV_MODE_EXTERNAL_DS_BUFFER;
8624 pCtrl->u32ExternalDSbuf = pExternalBuf->u32DSBufAddr;
8625
8626 _DRV_HVD_EX_RET(u8DrvId, eRet);
8627 }
8628
MDrv_HVD_EX_GetESBufferStatus(MS_U32 u32Id)8629 MS_U32 MDrv_HVD_EX_GetESBufferStatus(MS_U32 u32Id)
8630 {
8631 MS_U32 u32Ret = 0;
8632 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8633
8634 _DRV_HVD_Inited(u8DrvId,FALSE);
8635
8636 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_ES_BUF_STATUS);
8637 u32Ret = _HVD_EX_Map2HVDESBufStatus(u32Ret);
8638
8639 return u32Ret;
8640 }
8641
MDrv_HVD_EX_SetCMAReleaseStatus(MS_U32 u32Id,HVD_EX_CMA_Release_Status eCMAReleaseStatus)8642 MS_U32 MDrv_HVD_EX_SetCMAReleaseStatus(MS_U32 u32Id, HVD_EX_CMA_Release_Status eCMAReleaseStatus)
8643 {
8644 volatile HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
8645 MS_U32 u32Ret = FALSE;
8646 HVD_CMA_Release_Status eStatus;
8647
8648 switch (eCMAReleaseStatus)
8649 {
8650 case E_HVD_EX_CMA_RELEASE_NONE:
8651 eStatus = E_HVD_CMA_RELEASE_NONE;
8652 break;
8653 case E_HVD_EX_CMA_RELEASE_WAITING:
8654 eStatus = E_HVD_CMA_RELEASE_WAITING;
8655 break;
8656 case E_HVD_EX_CMA_RELEASE_DONE:
8657 eStatus = E_HVD_CMA_RELEASE_DONE;
8658 break;
8659 default:
8660 VPRINTF("ERROR! Unhandled CMA release status %d\n", eCMAReleaseStatus);
8661 return u32Ret;
8662 }
8663
8664 if (pShm != NULL)
8665 {
8666 pShm->u8CMAReleaseStatus = eStatus;
8667 MsOS_FlushMemory();
8668 u32Ret = TRUE;
8669 }
8670 return u32Ret;
8671 }
8672
MDrv_HVD_EX_GetCMAReleaseStatus(MS_U32 u32Id)8673 HVD_EX_CMA_Release_Status MDrv_HVD_EX_GetCMAReleaseStatus(MS_U32 u32Id)
8674 {
8675 volatile HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
8676 HVD_CMA_Release_Status eStatus;
8677
8678 HAL_HVD_EX_ReadMemory();
8679 if (pShm != NULL)
8680 {
8681 eStatus = (HVD_CMA_Release_Status)pShm->u8CMAReleaseStatus;
8682 switch (eStatus)
8683 {
8684 case E_HVD_CMA_RELEASE_NONE:
8685 return E_HVD_EX_CMA_RELEASE_NONE;
8686 case E_HVD_CMA_RELEASE_WAITING:
8687 return E_HVD_EX_CMA_RELEASE_WAITING;
8688 case E_HVD_CMA_RELEASE_DONE:
8689 return E_HVD_EX_CMA_RELEASE_DONE;
8690 default:
8691 VPRINTF("ERROR! Unhandled CMA release status %d\n", eStatus);
8692 }
8693 }
8694
8695 return E_HVD_EX_CMA_RELEASE_NONE;
8696 }
8697
MDrv_HVD_EX_SetCMAAllocateStatus(MS_U32 u32Id,HVD_EX_CMA_Allocation_Status eCMAAllocStatus)8698 MS_U32 MDrv_HVD_EX_SetCMAAllocateStatus(MS_U32 u32Id, HVD_EX_CMA_Allocation_Status eCMAAllocStatus)
8699 {
8700 volatile HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
8701 MS_U32 u32Ret = FALSE;
8702 HVD_CMA_Allocation_Status eStatus;
8703
8704 switch (eCMAAllocStatus)
8705 {
8706 case E_HVD_EX_CMA_ALLOCATION_NONE:
8707 eStatus = E_HVD_CMA_ALLOCATION_NONE;
8708 break;
8709 case E_HVD_EX_CMA_ALLOCATION_WAITING:
8710 eStatus = E_HVD_CMA_ALLOCATION_WAITING;
8711 break;
8712 case E_HVD_EX_CMA_ALLOCATION_DONE:
8713 eStatus = E_HVD_CMA_ALLOCATION_DONE;
8714 break;
8715 case E_HVD_EX_CMA_ALLOCATION_FAILED:
8716 eStatus = E_HVD_CMA_ALLOCATION_FAILED;
8717 break;
8718 default:
8719 VPRINTF("ERROR! Unhandled CMA allocation status %d\n", eCMAAllocStatus);
8720 return FALSE;
8721 }
8722
8723 if (pShm != NULL)
8724 {
8725 pShm->u8CMAAllocationStatus = eStatus;
8726 MsOS_FlushMemory();
8727 u32Ret = TRUE;
8728 }
8729 return u32Ret;
8730 }
8731
MDrv_HVD_EX_GetCMAAllocateStatus(MS_U32 u32Id)8732 HVD_EX_CMA_Allocation_Status MDrv_HVD_EX_GetCMAAllocateStatus(MS_U32 u32Id)
8733 {
8734 volatile HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
8735 HVD_CMA_Allocation_Status eStatus;
8736
8737 HAL_HVD_EX_ReadMemory();
8738 if (pShm != NULL)
8739 {
8740 eStatus = (HVD_CMA_Allocation_Status)pShm->u8CMAAllocationStatus;
8741 switch (eStatus)
8742 {
8743 case E_HVD_CMA_ALLOCATION_NONE:
8744 return E_HVD_EX_CMA_ALLOCATION_NONE;
8745 case E_HVD_CMA_ALLOCATION_DONE:
8746 return E_HVD_EX_CMA_ALLOCATION_DONE;
8747 case E_HVD_CMA_ALLOCATION_WAITING:
8748 return E_HVD_EX_CMA_ALLOCATION_WAITING;
8749 case E_HVD_CMA_ALLOCATION_FAILED:
8750 return E_HVD_EX_CMA_ALLOCATION_FAILED;
8751 default:
8752 VPRINTF("ERROR! Unhandled CMA allocation status %d\n", eStatus);
8753 }
8754 }
8755
8756 return E_HVD_EX_CMA_ALLOCATION_NONE;
8757 }
8758
MDrv_HVD_EX_GetCMAAllocationInfo(MS_U32 u32Id,MS_U8 * Miu_sel,MS_U64 * offset,MS_SIZE * length)8759 MS_BOOL MDrv_HVD_EX_GetCMAAllocationInfo(MS_U32 u32Id, MS_U8 *Miu_sel, MS_U64 *offset, MS_SIZE *length)
8760 {
8761 volatile HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
8762 MS_BOOL u32Ret = FALSE;
8763 MS_U32 i = 0;
8764 if (pShm != NULL)
8765 {
8766 for (i = 0; i < HVD_CMA_SUPPORT_MAX_MIU_NUM; i++)
8767 {
8768 HAL_HVD_EX_ReadMemory();
8769 if (pShm->u32AllocateCMABuffSize[i] > 0)
8770 {
8771 *offset = (MS_U64)pShm->u32AllocateCMABuffAddr[i];
8772 *length = (MS_SIZE)pShm->u32AllocateCMABuffSize[i];
8773 *Miu_sel = i;
8774
8775 pShm->u32AllocateCMABuffAddr[i] = 0;
8776 pShm->u32AllocateCMABuffSize[i] = 0;
8777 HAL_HVD_EX_FlushMemory();
8778 u32Ret = TRUE;
8779 break;
8780 }
8781 }
8782 }
8783
8784 return u32Ret;
8785 }
8786
MDrv_HVD_EX_GetCMAReleaseInfo(MS_U32 u32Id,MS_U8 * Miu_sel,MS_U8 * block_sel,MS_U64 * offset,MS_SIZE * length)8787 MS_BOOL MDrv_HVD_EX_GetCMAReleaseInfo(MS_U32 u32Id, MS_U8 *Miu_sel, MS_U8 *block_sel, MS_U64 *offset, MS_SIZE *length)
8788 {
8789 volatile HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
8790 MS_U32 u32Ret = FALSE;
8791 MS_U8 i = 0, j = 0;
8792 if (pShm != NULL)
8793 {
8794 for (i = 0; i < HVD_CMA_SUPPORT_MAX_MIU_NUM; i++)
8795 {
8796 for (j = 0; j < HVD_CMA_SUPPORT_MAX_MIU_NUM; j++)
8797 {
8798 HAL_HVD_EX_ReadMemory();
8799 if (pShm->pending_release_queue[i][j].u32HVD_PENDING_RELEASE_SIZE > 0 && pShm->pending_release_queue[i][j].u32HVD_COLLISION_NUM == 0)
8800 {
8801 *offset = (MS_U64)pShm->pending_release_queue[i][j].u32HVD_PENDING_RELEASE_ST_ADDR;
8802 *length = (MS_SIZE)pShm->pending_release_queue[i][j].u32HVD_PENDING_RELEASE_SIZE;
8803 *Miu_sel = i;
8804 *block_sel = j;
8805
8806 pShm->pending_release_queue[i][j].u32HVD_PENDING_RELEASE_ST_ADDR = 0;
8807 pShm->pending_release_queue[i][j].u32HVD_PENDING_RELEASE_SIZE = 0;
8808 // HVD_EX_MSG_DBG("offset=0x%llx addr=0x%x i=%d j=%d\n", (unsigned long long int)(*offset),
8809 // (unsigned int)(*length), (unsigned int)i, (unsigned int)j);
8810 HAL_HVD_EX_FlushMemory();
8811 return TRUE;
8812 }
8813 }
8814 }
8815 }
8816
8817 return u32Ret;
8818 }
8819
MDrv_HVD_EX_SetCMAAllocateData(MS_U32 u32Id,MS_U8 miu_sel,MS_PHY FWBaseAddr,MS_PHY offset,MS_U32 length)8820 MS_BOOL MDrv_HVD_EX_SetCMAAllocateData(MS_U32 u32Id, MS_U8 miu_sel, MS_PHY FWBaseAddr, MS_PHY offset, MS_U32 length)
8821 {
8822 HVD_EX_MSG_DBG("[%s] miu=%d Size=0x%x Addr=0x%llx\n", __FUNCTION__, miu_sel, length, (unsigned long long int)offset);
8823 volatile HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
8824
8825 HAL_HVD_EX_ReadMemory();
8826 MS_BOOL bRet = FALSE;
8827 MS_U8 u8FrmMiuSel;
8828 MS_U32 u32FrmStartOffset;
8829
8830 UNUSED(FWBaseAddr);
8831 if (pShm != NULL)
8832 {
8833 _phy_to_miu_offset(u8FrmMiuSel, u32FrmStartOffset, offset);
8834 if (miu_sel == 0)
8835 {
8836 pShm->u32FrameBufAddr = (MS_U32)u32FrmStartOffset;
8837 pShm->u32FrameBufSize = length;
8838 }
8839 else
8840 {
8841 pShm->u32FrameBuf2Addr = (MS_U32)u32FrmStartOffset;
8842 pShm->u32FrameBuf2Size = length;
8843 }
8844 bRet = TRUE;
8845 HAL_HVD_EX_FlushMemory();
8846 }
8847 return bRet;
8848 }
8849
MDrv_HVD_EX_WaitCMAStatusDone(MS_U32 u32Id,MS_BOOL bCMAInitPool0,MS_BOOL bCMAInitPool1)8850 MS_BOOL MDrv_HVD_EX_WaitCMAStatusDone(MS_U32 u32Id, MS_BOOL bCMAInitPool0, MS_BOOL bCMAInitPool1)
8851 {
8852 MS_BOOL bRet = TRUE;
8853 MS_U32 u32Timer = 0;
8854 if (bCMAInitPool0 == FALSE && bCMAInitPool1 == FALSE)
8855 bRet = TRUE;
8856 else
8857 {
8858 do
8859 {
8860 u32Timer++;
8861 if (u32Timer >= HVD_FW_EXIT_ACTION_TIMEOUT)
8862 {
8863 bRet = FALSE;
8864 HVD_EX_MSG_ERR("HVD CMA wait status done timeout!!!\n");
8865 break;
8866 }
8867 else
8868 {
8869 HVD_Delay_ms(1);
8870 }
8871 } while (MDrv_HVD_EX_GetCMAAllocateStatus(u32Id) == E_HVD_EX_CMA_ALLOCATION_WAITING || MDrv_HVD_EX_GetCMAReleaseStatus(u32Id) == E_HVD_EX_CMA_RELEASE_WAITING);
8872 }
8873
8874 return bRet;
8875 }
8876
_HVD_EX_CC_Update_UserData_Wptr(MS_U32 u32Id)8877 static MS_U32 _HVD_EX_CC_Update_UserData_Wptr(MS_U32 u32Id)
8878 {
8879
8880 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8881 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8882
8883 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8884 MS_U32 u32UsrDataIdxWptr = MDrv_HVD_EX_GetUserData_Wptr(u32Id);
8885
8886 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
8887 pCCInfo->u32FWUsrDataWIdx = u32UsrDataIdxWptr;
8888
8889 return pCCInfo->u32FWUsrDataWIdx;
8890 }
8891
_HVD_EX_CC_Parse_AFD_data(MS_U8 ** pUserDataBuf)8892 static void _HVD_EX_CC_Parse_AFD_data(MS_U8 **pUserDataBuf)
8893 {
8894
8895 (*pUserDataBuf)++;
8896 (*pUserDataBuf)++;
8897
8898 }
8899
_HVD_EX_CC_Parse_BAR_data(MS_U8 ** pUserDataBuf)8900 static void _HVD_EX_CC_Parse_BAR_data(MS_U8 **pUserDataBuf)
8901 {
8902
8903 MS_BOOL bTopBarFlag, bBottomBarFlag, bLeftBarFlag, bRightBarlag;
8904
8905 bTopBarFlag = (((**pUserDataBuf) & 0x80) == 0x80); //u_f(1,"top_bar_flag");
8906 bBottomBarFlag = (((**pUserDataBuf) & 0x40) == 0x40); //u_f(1,"bottom_bar_flag");
8907 bLeftBarFlag = (((**pUserDataBuf) & 0x20) == 0x20); //u_f(1,"left_bar_flag");
8908 bRightBarlag = ((*((*pUserDataBuf)++) & 0x10) == 0x10); //u_f(1,"right_bar_flag"); u_f(4,"reserved");
8909
8910 if (bTopBarFlag)
8911 {
8912 *pUserDataBuf += 2;
8913 }
8914
8915 if (bBottomBarFlag)
8916 {
8917 *pUserDataBuf += 2;
8918 }
8919
8920 if (bLeftBarFlag)
8921 {
8922 *pUserDataBuf += 2;
8923 }
8924
8925 if (bRightBarlag)
8926 {
8927 *pUserDataBuf += 2;
8928 }
8929
8930 }
8931
_HVD_EX_CC_Parse_CC_data(MS_U32 u32Id,MS_U8 u8CCMode,MS_U8 ** pSrc,MS_U8 * pDst608,MS_U32 * pu32Dst608Len,MS_U8 * pDst708,MS_U32 * pu32Dst708Len,HVD_CC_608EnhanceInfo * pEhInfo608)8932 static void _HVD_EX_CC_Parse_CC_data(MS_U32 u32Id, MS_U8 u8CCMode,MS_U8 **pSrc, MS_U8 *pDst608, MS_U32 *pu32Dst608Len, MS_U8 *pDst708, MS_U32 *pu32Dst708Len, HVD_CC_608EnhanceInfo *pEhInfo608)
8933 {
8934 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8935 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8936
8937 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8938
8939 MS_U32 i,j;
8940 MS_U32 u32CC_Count;
8941 MS_U8 u8CC_Code;
8942 MS_U8 u8CC_Type;
8943 MS_U8 u8CC_Data1, u8CC_Data2;
8944 MS_U32 u32Pad;
8945
8946
8947
8948 u8CC_Code = *((*pSrc)++); //u_f(8,"cc_data_flag cc_count");
8949
8950 u32CC_Count = u8CC_Code & 0x1F; // cc_count
8951 if (!(u8CC_Code & 0x40)) return; // process_cc_data_flag
8952
8953
8954
8955 (*pSrc)++; //u_f(8,"reserved 1");
8956
8957
8958
8959 for (i=0;i<u32CC_Count;i++)
8960 {
8961 MS_U8 u8Code;
8962
8963
8964 u8Code = *((*pSrc)++); // u_f(8,"cc_valid and cc_type");
8965
8966
8967 u8CC_Type = u8Code & 0x03;
8968
8969 u8CC_Data1 = *((*pSrc)++); // u_f(8,"cc_data_1");
8970 u8CC_Data2 = *((*pSrc)++); // u_f(8,"cc_data_2");
8971
8972 if (!(u8Code & 0x04)) continue; // cc_valid
8973
8974 //NTSC CC 608
8975 if ((u8CC_Type == 0) || (u8CC_Type == 1))
8976 {
8977 //g_DTV_CC.ntsc_cc_data[g_DTV_CC.NTSC_element++] = (cc_type << 16) | (cc_data2 << 8) | (cc_data1);
8978
8979 if(pCCInfo->b608InfoEnhance)
8980 {
8981 if( ( (*pu32Dst608Len) + 16) > MAX_608_CC_LEN)
8982 {
8983 HVD_EX_MSG_ERR("u32Dst608Len+16: %d is larger than MAX_608_CC_LEN !! \n",((*pu32Dst608Len)+16));
8984 return;
8985 }
8986 }
8987 else
8988 {
8989 if( ( (*pu32Dst608Len) + 4) > MAX_608_CC_LEN)
8990 {
8991 HVD_EX_MSG_ERR("u32Dst608Len+4: %d is larger than MAX_608_CC_LEN !! \n",((*pu32Dst608Len)+4));
8992 return;
8993 }
8994 }
8995
8996 pDst608[(*pu32Dst608Len)++] = u8CC_Data1;
8997 pDst608[(*pu32Dst608Len)++] = u8CC_Data2;
8998 pDst608[(*pu32Dst608Len)++] = u8CC_Type;
8999 pDst608[(*pu32Dst608Len)++] = 0;
9000
9001 if (pCCInfo->b608InfoEnhance)
9002 {
9003 // PTS searched_pts;
9004 //search_pts(pContext, &searched_pts);
9005 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u16TmpRef&0xff);
9006 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u16TmpRef>>8)&0xff);
9007 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u16PicStruct&0xff);
9008 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u16PicStruct>>8)&0xff);
9009 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u32Pts&0xff);
9010 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>8)&0xff);
9011 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>16)&0xff);
9012 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>24)&0xff);
9013 pDst608[(*pu32Dst608Len)++] = pEhInfo608->u8UsrDataCnt;
9014
9015 // for enhance cc-608 data dump, 16bytes/pkt
9016 u32Pad = (*pu32Dst608Len) & 0xf; //align to 16 byte
9017 if(u32Pad) u32Pad = 16-u32Pad;
9018 for(j=0;j<u32Pad;j++)
9019 pDst608[(*pu32Dst608Len)++] = 0xff;
9020
9021 }
9022
9023
9024
9025
9026 }
9027 else // ATSC_CC 708
9028 {
9029 if( ( (*pu32Dst708Len) + 4) > MAX_708_CC_LEN)
9030 {
9031 HVD_EX_MSG_ERR(" u32Dst708Len+4: %d is larger than MAX_708_CC_LEN !! \n",((*pu32Dst708Len)+4));
9032 return;
9033 }
9034 pDst708[(*pu32Dst708Len)++] = u8CC_Data1;
9035 pDst708[(*pu32Dst708Len)++] = u8CC_Data2;
9036 pDst708[(*pu32Dst708Len)++] = u8CC_Type;
9037 pDst708[(*pu32Dst708Len)++] = 0;
9038
9039 }
9040 //new DTV CC header
9041
9042 }
9043
9044
9045
9046 //padding cc608
9047
9048
9049 if(u8CCMode & (CC_NTSC1|CC_NTSC2))
9050 {
9051 if (pCCInfo->b608InfoEnhance==0)
9052 { // for original cc-608 data dump, 16bytes/pkt
9053
9054
9055 u32Pad = (*pu32Dst608Len) & 0x7;
9056 if(u32Pad) u32Pad = 8 - u32Pad;
9057
9058 if((u32Pad + (*pu32Dst608Len)) > MAX_608_CC_LEN)
9059 {
9060 HVD_EX_MSG_ERR("u32Dst608Len:%d + u32Pad: %d is larger than MAX_608_CC_LEN !! \n",(*pu32Dst608Len), u32Pad);
9061 return;
9062 }
9063 for(i=0;i<u32Pad;i++)
9064 pDst608[(*pu32Dst608Len)++] = 0xff;
9065 }
9066 }
9067
9068
9069 }
9070
9071
_HVD_EX_CC_Extract_CCdata(MS_U32 u32Id,MS_U8 * pDst608Buf,MS_U32 * pu32Dst608Len,MS_U8 * pDst708Buf,MS_U32 * pu32Dst708Len,DTV_BUF_type * pUserData)9072 static void _HVD_EX_CC_Extract_CCdata(MS_U32 u32Id, MS_U8 *pDst608Buf ,MS_U32 *pu32Dst608Len,MS_U8 *pDst708Buf ,MS_U32 *pu32Dst708Len, DTV_BUF_type* pUserData)
9073 {
9074
9075 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9076 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9077 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9078
9079
9080
9081 MS_U8 * pUserDataStartBuf = &pUserData->buf[0];//&pSrcBuf[0];
9082 MS_U8 * pUserDataBuf;
9083
9084 pUserDataBuf = &pUserData->buf[0];
9085
9086
9087 HVD_CC_608EnhanceInfo stEhInfo608;
9088 stEhInfo608.u16TmpRef = pUserData->u16TempRefCnt;
9089 stEhInfo608.u16PicStruct = (MS_U16)pUserData->pic_struct;
9090 stEhInfo608.u32Pts = pUserData->pts;
9091 stEhInfo608.u8UsrDataCnt = 0;
9092
9093
9094 {
9095 MS_U32 dvb_code;
9096
9097 dvb_code = (*pUserDataBuf << 24) | (*(pUserDataBuf+1) << 16) | (*(pUserDataBuf+2) << 8) | *(pUserDataBuf+3); //(u_f(16,"provider_code") << 16) | u_f(16,"provider_code");
9098 pUserDataBuf += 4;
9099
9100 if (dvb_code == DTV_DTB1_CODE)
9101 {
9102 MS_U8 code;
9103
9104 code = *pUserDataBuf++; //u_f(8,"code");
9105
9106 if (code == DTV_CC_CODE)
9107 {
9108 _HVD_EX_CC_Parse_CC_data(u32Id, pCCInfo->u8ParsingStatus,&pUserDataBuf, pDst608Buf, pu32Dst608Len, pDst708Buf, pu32Dst708Len, &stEhInfo608);
9109 }
9110 else if (code == DTV_BAR_CODE)
9111 {
9112 _HVD_EX_CC_Parse_BAR_data(&pUserDataBuf);
9113 }
9114
9115 }
9116 else if (dvb_code == DTV_AFD_CODE)
9117 {
9118 _HVD_EX_CC_Parse_AFD_data(&pUserDataBuf);
9119 }
9120
9121 }
9122
9123
9124 if((pUserDataBuf - pUserDataStartBuf) > pUserData->len)
9125 HVD_EX_MSG_ERR("ERROR!!!! (pUserDataBuf - pUserDataStartBuf) > u32SrcLen\n");
9126
9127
9128 }
9129
9130
_HVD_EX_CC_RB_Have_Avail_Space(MS_U32 u32Id,MS_U8 u8CC608,MS_U32 u32QuerySize)9131 static MS_BOOL _HVD_EX_CC_RB_Have_Avail_Space(MS_U32 u32Id, MS_U8 u8CC608, MS_U32 u32QuerySize)
9132 {
9133 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9134 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9135 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9136
9137 MS_U32 u32RingBufVacancy = pCCInfo->u32RingBufVacancy[u8CC608];
9138 MS_U32 u32AlignCCLen;
9139
9140 if ((u32QuerySize % HVD_CCRB_PACKET_LENGTH) != 0)
9141 {
9142 u32AlignCCLen = HVD_CCRB_PACKET_LENGTH * ((u32QuerySize / HVD_CCRB_PACKET_LENGTH)+1);
9143 }
9144 else
9145 {
9146 u32AlignCCLen = u32QuerySize;
9147 }
9148
9149
9150 if(u32RingBufVacancy >= u32AlignCCLen)
9151 return TRUE;
9152 else
9153 return FALSE;
9154
9155
9156 }
9157
_HVD_EX_CC_Copy_CCdata_To_RB(MS_U32 u32Id,MS_U8 u8CC608,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)9158 static MS_BOOL _HVD_EX_CC_Copy_CCdata_To_RB(MS_U32 u32Id, MS_U8 u8CC608,MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
9159 {
9160 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9161 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9162 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9163
9164 MS_U32 u32RingBufRPAddr = pCCInfo->u32RingBufRPAddr[u8CC608];
9165 MS_U32 u32RingBufWPAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
9166 MS_U32 u32AlignCCLen;
9167
9168
9169
9170 if(u32SrcLen == 0)
9171 return FALSE;
9172
9173
9174
9175 u32AlignCCLen = u32SrcLen;
9176
9177
9178 if(pCCInfo->u32RingBufVacancy[u8CC608] < u32AlignCCLen)
9179 {
9180 HVD_EX_MSG_ERR("overflow !!!, u32RingBufVacancy: %d, u32AlignLen: %d\n",pCCInfo->u32RingBufVacancy[u8CC608], u32AlignCCLen);
9181 return TRUE;
9182 }
9183
9184
9185 if(u32RingBufWPAddr >= u32RingBufRPAddr)
9186 {
9187 if( (u32RingBufWPAddr + u32AlignCCLen) <= (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
9188 {
9189
9190 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)), (void *)pSrcBuf, u32AlignCCLen);
9191
9192
9193 if((pCCInfo->u32RingBufWPAddr[u8CC608] + u32AlignCCLen) == (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
9194 pCCInfo->u32RingBufWPAddr[u8CC608] = pCCInfo->u32RingBufStartPAddr[u8CC608];
9195 else
9196 pCCInfo->u32RingBufWPAddr[u8CC608] += u32AlignCCLen;
9197
9198 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
9199
9200 }
9201 else
9202 {
9203 MS_U32 part1_len = (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]) - u32RingBufWPAddr;
9204 MS_U32 part2_len = u32AlignCCLen - part1_len;
9205
9206
9207
9208
9209 {
9210
9211
9212 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)),(void *)pSrcBuf, part1_len);
9213
9214 pCCInfo->u32RingBufWPAddr[u8CC608] = u32RingBufWPAddr = pCCInfo->u32RingBufStartPAddr[u8CC608];
9215
9216 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)),(void *)(&pSrcBuf[part1_len]), part2_len);
9217
9218 pCCInfo->u32RingBufWPAddr[u8CC608] = u32RingBufWPAddr = pCCInfo->u32RingBufStartPAddr[u8CC608] + part2_len;
9219 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
9220 }
9221
9222 }
9223
9224 }
9225 else
9226 {
9227
9228
9229 {
9230
9231 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)), (void *)pSrcBuf, u32AlignCCLen);
9232 pCCInfo->u32RingBufWPAddr[u8CC608] += u32AlignCCLen;
9233 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
9234 }
9235
9236
9237 }
9238
9239 return FALSE;
9240 }
9241
_HVD_EX_CC_Add_PaddingData_To_608(MS_U32 u32Id,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)9242 static MS_BOOL _HVD_EX_CC_Add_PaddingData_To_608(MS_U32 u32Id, MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
9243 {
9244
9245 MS_U32 u32AlignCCLen;
9246 MS_U32 i;
9247 MS_BOOL b608OverFlow;
9248
9249 if ((u32SrcLen % HVD_CCRB_PACKET_LENGTH) != 0)
9250 {
9251 u32AlignCCLen = HVD_CCRB_PACKET_LENGTH * ((u32SrcLen / HVD_CCRB_PACKET_LENGTH)+1);
9252 }
9253 else
9254 {
9255 u32AlignCCLen = u32SrcLen;
9256 }
9257
9258
9259
9260 if(u32AlignCCLen > MAX_608_CC_LEN)
9261 {
9262 HVD_EX_MSG_ERR("u32AlignCCLen:%d > MAX_608_CC_LEN", u32AlignCCLen);
9263 return TRUE;
9264 }
9265
9266
9267
9268 for(i =0; i < (u32AlignCCLen-u32SrcLen);i++)
9269 pSrcBuf[u32SrcLen+i] = 0xff;// add padinng data
9270
9271 b608OverFlow =_HVD_EX_CC_Copy_CCdata_To_RB(u32Id, 1, &(pSrcBuf[0]), u32AlignCCLen);
9272 return b608OverFlow;
9273
9274 }
9275
_HVD_EX_CC_Add_PaddingData_To_708(MS_U32 u32Id,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)9276 static MS_BOOL _HVD_EX_CC_Add_PaddingData_To_708(MS_U32 u32Id, MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
9277 {
9278 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9279 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9280 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9281
9282 MS_VIRT *u32RingBufWAddr = (MS_VIRT *)(HVD_PA2VA(pCCInfo->u32RingBufWPAddr[0]));
9283
9284 MS_U8 u8CC_Type, u8CC_Data1, u8CC_Data2,u8Temp;
9285 MS_U16 i,j,u16Pad,u16DataCount;
9286 MS_U8 *pAddr;
9287 MS_U8 u8CCPading[MAX_708_CC_LEN];
9288 MS_BOOL b708OverFlow = FALSE;
9289 u16DataCount = 0;
9290
9291 for(j=0;j<u32SrcLen;j+=4)
9292 {
9293 u8CC_Data1 = *pSrcBuf++;
9294 u8CC_Data2 = *pSrcBuf++;
9295 u8CC_Type = *pSrcBuf++;
9296 u8Temp = *pSrcBuf++;
9297
9298 if(u8CC_Type==3) //padd_out();
9299 {
9300 if( pCCInfo->u32PktLen708 > 0 )
9301 {
9302 u16Pad = pCCInfo->u32PktLen708;
9303 for (i=0;i<u16Pad;i++)
9304 u8CCPading[u16DataCount++] = 0xff;
9305 pCCInfo->u32PktLen708 = 0;
9306 #if 1
9307
9308 pAddr = (MS_U8 *)pCCInfo->u32PktHdrAddr708;
9309 if(pAddr)
9310 {
9311 u8Temp = *pAddr;
9312 u16Pad = (u8Temp&0x3f)<<1;
9313 if((i!=0)&&(u16Pad > i))
9314 {
9315 i = i>>1;
9316 u8Temp = u8Temp - i;
9317 *pAddr = (u8Temp&0xff);
9318 }
9319 }
9320 #endif
9321 }
9322
9323 u16Pad = (pCCInfo->u32RingBufWPAddr[0] + u16DataCount) & 7;
9324 if(u16Pad) u16Pad = HVD_CCRB_PACKET_LENGTH-u16Pad;
9325 for(i=0;i<u16Pad;i++)
9326 u8CCPading[u16DataCount++] = 0xff;
9327
9328
9329 b708OverFlow =_HVD_EX_CC_Copy_CCdata_To_RB(u32Id, 0, u8CCPading, u16DataCount);
9330 if(b708OverFlow)
9331 return TRUE;
9332 pCCInfo->u32PktLen708 = (u8CC_Data1 & 0x3f)*2;
9333 if(pCCInfo->u32PktLen708 == 0) pCCInfo->u32PktLen708 = 128;
9334 u16DataCount = 0;
9335
9336 pCCInfo->u32PktHdrAddr708 = (MS_VIRT)(u32RingBufWAddr);
9337 }
9338
9339 if(pCCInfo->u32PktLen708 > 0)
9340 {
9341 u8CCPading[u16DataCount++] = u8CC_Data1;
9342 u8CCPading[u16DataCount++] = u8CC_Data2;
9343 pCCInfo->u32PktLen708 = pCCInfo->u32PktLen708 - 2;
9344 }
9345 else
9346 {
9347 pCCInfo->u32PktLen708 = 0;
9348 }
9349 }
9350
9351 if(u16DataCount > 0)
9352 {
9353 if( pCCInfo->u32PktLen708 ==0 )
9354 {
9355 u16Pad = (pCCInfo->u32RingBufWPAddr[0] + u16DataCount) & 7;
9356 if(u16Pad) u16Pad = HVD_CCRB_PACKET_LENGTH-u16Pad;
9357 for(i=0;i<u16Pad;i++)
9358 u8CCPading[u16DataCount++] = 0xff;
9359
9360 }
9361
9362 b708OverFlow = _HVD_EX_CC_Copy_CCdata_To_RB(u32Id, 0, u8CCPading, u16DataCount);
9363 if(b708OverFlow)
9364 return TRUE;
9365 }
9366
9367 return FALSE;
9368
9369 }
9370
9371
9372 ///////////////////////////////////////////////////////////////////////////////
9373 /// Closed Caption Driver Initialization
9374 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Init(MS_U32 u32Id)9375 HVD_EX_Result MDrv_HVD_EX_CC_Init(MS_U32 u32Id)
9376 {
9377 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9378 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9379 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9380 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9381
9382
9383 HVD_EX_MSG_TRACE();
9384 _DRV_HVD_Inited(u8DrvId,eRet);
9385 _DRV_HVD_EX_Entry(u8DrvId);
9386
9387 pCCInfo->u8UserDataMode = (USER_DATA_MODE_DIRECTTV_CC|USER_DATA_MODE_ATSC_CC_RAW);
9388
9389 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_USERDATA_MODE, pCCInfo->u8UserDataMode);
9390
9391 if (pCCInfo->u8ParsingStatus == 0xff)
9392 pCCInfo->u8ParsingStatus = 0x00;
9393
9394 //eRet = E_HVD_OK;
9395 _DRV_HVD_EX_RET(u8DrvId, eRet);
9396 }
9397
9398 ///////////////////////////////////////////////////////////////////////////////
9399 /// Set Closed Caption config
9400 /// @param u8Operation \b IN Digital Closed Caption Type
9401 /// @param u16BufferSize \b IN buffer size of the given hardware parser
9402 /// @param u8CC608 \b IN
9403 /// - # TRUE for CC608 parser
9404 /// - # FALSE for CC708 parser
9405 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_SetCfg(MS_U32 u32Id,MS_U8 u8Operation,MS_U16 u16BufferSize,MS_U8 u8CC608)9406 HVD_EX_Result MDrv_HVD_EX_CC_SetCfg(MS_U32 u32Id, MS_U8 u8Operation, MS_U16 u16BufferSize, MS_U8 u8CC608)
9407 {
9408
9409 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9410 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9411 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9412 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9413
9414 HVD_EX_MSG_TRACE();
9415 _DRV_HVD_Inited(u8DrvId,eRet);
9416 _DRV_HVD_EX_Entry(u8DrvId);
9417
9418
9419
9420 pCCInfo->u32RingBufLen[u8CC608] = pCCInfo->u32RingBufVacancy[u8CC608] = u16BufferSize;
9421 pCCInfo->u8ParsingStatus |= u8Operation;
9422 pCCInfo->u8ParsingStatus &= 0x07;
9423
9424 HVD_EX_MSG_DBG("u8Operation: %x, u16BufferSize:%x, u8CC608:%d\n",u8Operation, u16BufferSize,u8CC608);
9425
9426
9427 if (u8CC608==0x00)
9428 pCCInfo->b708Enable = TRUE;
9429
9430 eRet = E_HVD_EX_OK;
9431 _DRV_HVD_EX_RET(u8DrvId, eRet);
9432
9433 }
9434
9435
9436 ///////////////////////////////////////////////////////////////////////////////
9437 /// Set HVD Ring Buffer's Start Address
9438 /// @param u32StartAddress \b IN Ring Buffer's Address
9439 /// @param u8CC608 \b IN
9440 /// - # TRUE for CC608 parser
9441 /// - # FALSE for CC708 parser
9442 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Set_RB_StartAddr(MS_U32 u32Id,MS_PHY u32StartPAddress,MS_U8 u8CC608)9443 HVD_EX_Result MDrv_HVD_EX_CC_Set_RB_StartAddr(MS_U32 u32Id, MS_PHY u32StartPAddress, MS_U8 u8CC608)
9444 {
9445 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9446 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9447 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9448 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9449
9450 MS_U8 u8MiuSel;
9451 MS_U32 u32StartOffset;
9452
9453 HVD_EX_MSG_TRACE();
9454 _DRV_HVD_Inited(u8DrvId,eRet);
9455 _DRV_HVD_EX_Entry(u8DrvId);
9456
9457 _phy_to_miu_offset(u8MiuSel,u32StartOffset,u32StartPAddress);
9458
9459 pCCInfo->u8BufMiuSel[u8CC608] = u8MiuSel;
9460 /*
9461 if ( (u32StartPAddress & pCtrl->MemMap.u32MIU1BaseAddr) == pCtrl->MemMap.u32MIU1BaseAddr)
9462 {
9463 pCCInfo->bBufMiu1[u8CC608] = TRUE;
9464 }
9465 else
9466 {
9467 pCCInfo->bBufMiu1[u8CC608] = FALSE;
9468 }*/
9469
9470
9471 HVD_EX_MSG_DBG("u32StartPAddress: 0x%lx ,u8CC608: 0x%x, pCCInfo->u8BufMiuSel[u8CC608]: %d, pCtrl->MemMap.u32MIU1BaseAddr: 0x%lx, pCtrl->MemMap.u32MIU2BaseAddr: 0x%lx\n",
9472 (unsigned long)u32StartPAddress , u8CC608,pCCInfo->u8BufMiuSel[u8CC608], (unsigned long)pCtrl->MemMap.u32MIU1BaseAddr, (unsigned long)pCtrl->MemMap.u32MIU2BaseAddr);
9473
9474
9475 pCCInfo->u32RingBufStartPAddr[u8CC608] = pCCInfo->u32RingBufRPAddr[u8CC608] = pCCInfo->u32RingBufWPAddr[u8CC608] = u32StartPAddress;
9476 if(pCCInfo->u32RingBufLen[u8CC608] > 0)
9477 pCCInfo->u32RingBufVacancy[u8CC608] = pCCInfo->u32RingBufLen[u8CC608];
9478
9479
9480 _HVD_EX_CC_Update_UserData_Wptr(u32Id);
9481 pCCInfo->u32FWUsrDataRIdx = /*pCCInfo->u32FWUsrDataPrevWIdx =*/ pCCInfo->u32FWUsrDataWIdx;
9482
9483
9484 eRet = E_HVD_EX_OK;
9485 _DRV_HVD_EX_RET(u8DrvId, eRet);
9486
9487 }
9488
9489
9490 ///////////////////////////////////////////////////////////////////////////////
9491 /// Set HVD Ring Buffer's Read Address as Write Address
9492 /// @param u8CC608 \b IN
9493 /// - # TRUE for CC608 parser
9494 /// - # FALSE for CC708 parser
9495 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_SyncRB_RdAddr2WrAddr(MS_U32 u32Id,MS_U8 u8CC608)9496 HVD_EX_Result MDrv_HVD_EX_CC_SyncRB_RdAddr2WrAddr(MS_U32 u32Id, MS_U8 u8CC608)
9497 {
9498 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9499 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9500 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9501 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9502
9503
9504 pCCInfo->u32RingBufRPAddr[u8CC608] = pCCInfo->u32RingBufWPAddr[u8CC608];//u32ReadAddress;
9505 _HVD_EX_CC_Update_UserData_Wptr(u32Id);
9506 pCCInfo->u32FWUsrDataRIdx = pCCInfo->u32FWUsrDataWIdx;
9507 if(pCCInfo->u32RingBufLen[u8CC608] > 0)
9508 pCCInfo->u32RingBufVacancy[u8CC608] = pCCInfo->u32RingBufLen[u8CC608];
9509 eRet = E_HVD_EX_OK;
9510 _DRV_HVD_EX_RET(u8DrvId, eRet);
9511
9512 }
9513
9514 ///////////////////////////////////////////////////////////////////////////////
9515 /// Advance Read Address of HVD CC Ring Buffer by u32EachPacketSize
9516 /// @param u32EachPacketSize \b IN
9517 /// @param u8CC608 \b IN
9518 /// - # TRUE for CC608 parser
9519 /// - # FALSE for CC708 parser
9520 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Adv_RB_ReadAddr(MS_U32 u32Id,MS_U32 u32EachPacketSize,MS_U8 u8CC608)9521 HVD_EX_Result MDrv_HVD_EX_CC_Adv_RB_ReadAddr(MS_U32 u32Id, MS_U32 u32EachPacketSize, MS_U8 u8CC608)
9522 {
9523
9524 HVD_EX_Result eRet = E_HVD_EX_FAIL;
9525 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9526 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9527 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9528
9529 MS_U32 u32ParsedDataSize;
9530
9531 // Get the Parsed Data Size
9532 if ((u32EachPacketSize % HVD_CCRB_PACKET_LENGTH) != 0)
9533 {
9534 u32ParsedDataSize = HVD_CCRB_PACKET_LENGTH * ((u32EachPacketSize / HVD_CCRB_PACKET_LENGTH)+1); //HVD_CCRB_PACKET_LENGTH bytes alignment
9535 }
9536 else
9537 {
9538 u32ParsedDataSize = u32EachPacketSize;
9539 }
9540
9541 if(u32ParsedDataSize > (pCCInfo->u32RingBufLen[u8CC608] - pCCInfo->u32RingBufVacancy[u8CC608]))
9542 {
9543 HVD_EX_MSG_ERR("MDrv_HVD_CC_Adv_RB_ReadAddr fail!, no enough data!, vacancy: %d, u32ParsedDataSize: %d, u32RingBufLen:%d, u32RingBufRPAddr: 0x%lx, u32RingBufWPAddr: 0x%lx\n",
9544 pCCInfo->u32RingBufVacancy[u8CC608], u32ParsedDataSize, pCCInfo->u32RingBufLen[u8CC608], (unsigned long)pCCInfo->u32RingBufRPAddr[u8CC608],(unsigned long)pCCInfo->u32RingBufWPAddr[u8CC608]);
9545 return E_HVD_EX_FAIL;
9546 }
9547
9548
9549 if ((pCCInfo->u32RingBufRPAddr[u8CC608] + u32ParsedDataSize) < (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
9550 {
9551 pCCInfo->u32RingBufRPAddr[u8CC608] += u32ParsedDataSize;
9552 }
9553 else
9554 {
9555 pCCInfo->u32RingBufRPAddr[u8CC608] = (u32ParsedDataSize + pCCInfo->u32RingBufRPAddr[u8CC608] - pCCInfo->u32RingBufLen[u8CC608]);
9556 }
9557
9558 pCCInfo->u32RingBufVacancy[u8CC608] += u32ParsedDataSize ;
9559
9560 eRet = E_HVD_EX_OK;
9561 _DRV_HVD_EX_RET(u8DrvId, eRet);
9562
9563 }
9564
9565 ///////////////////////////////////////////////////////////////////////////////
9566 /// Stop HVD CC parsing
9567 /// @param u8CC608 \b IN
9568 /// - # TRUE for CC608 parser
9569 /// - # FALSE for CC708 parser
9570 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_DisableParsing(MS_U32 u32Id,MS_U8 u8CC608)9571 HVD_EX_Result MDrv_HVD_EX_CC_DisableParsing(MS_U32 u32Id, MS_U8 u8CC608)
9572 {
9573
9574 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9575 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9576 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9577 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9578
9579 if (u8CC608==0)
9580 {
9581 pCCInfo->u8ParsingStatus &= ~0x04;
9582 pCCInfo->b708Enable = FALSE;
9583 }
9584 else
9585 pCCInfo->u8ParsingStatus &= ~0x03;
9586
9587 pCCInfo->u8ParsingStatus &= 0x07;
9588
9589 eRet = E_HVD_EX_OK;
9590 _DRV_HVD_EX_RET(u8DrvId, eRet);
9591 }
9592
9593
MDrv_HVD_EX_CC_GetInfo(MS_U32 u32Id,MS_U32 selector,MS_U8 type,MS_U32 * p1,MS_U32 * p2)9594 HVD_EX_Result MDrv_HVD_EX_CC_GetInfo(MS_U32 u32Id, MS_U32 selector, MS_U8 type, MS_U32 *p1, MS_U32 *p2)
9595 {
9596
9597 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9598 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9599 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9600 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9601
9602 // Functionality select
9603 switch (selector)
9604 {
9605 case HVD_EX_CC_SELECTOR_708_SW:
9606 *p1 = (MS_U32)pCCInfo->b708Enable;
9607 break;
9608
9609 #if defined( MSOS_TYPE_LINUX )
9610 case HVD_EX_CC_SELECTOR_RINGBUFFER:
9611 {
9612 MS_U32 u32PAddr;
9613 u32PAddr = pCCInfo->u32RingBufStartPAddr[type];
9614 *p1 = u32PAddr;
9615 *p2 = (MS_U32) pCCInfo->u32RingBufLen[type];
9616 }
9617 break;
9618 #endif
9619
9620 default:
9621 *p1 = *p2 = 0;
9622 break;
9623 }
9624 eRet = E_HVD_EX_OK;
9625 _DRV_HVD_EX_RET(u8DrvId, eRet);
9626 }
9627
9628
MDrv_HVD_EX_CC_IsHvdRstDone(MS_U32 u32Id,MS_U8 type)9629 MS_BOOL MDrv_HVD_EX_CC_IsHvdRstDone(MS_U32 u32Id, MS_U8 type)
9630 {
9631 UNUSED(u32Id);
9632 UNUSED(type);
9633
9634 return TRUE;
9635 }
9636
9637 ///////////////////////////////////////////////////////////////////////////////
9638 /// Get Overflow Status of HVD CC Ring Buffer
9639 /// @param u8CC608 \b IN
9640 /// - # TRUE for CC608 parser
9641 /// - # FALSE for CC708 parser
9642 /// Return value:: Overflow Status Flag
9643 ////////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_GetOverflowStatus(MS_U32 u32Id,MS_U8 u8CC608)9644 MS_U8 MDrv_HVD_EX_CC_GetOverflowStatus(MS_U32 u32Id, MS_U8 u8CC608)
9645 {
9646
9647 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9648 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9649 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9650
9651 MS_BOOL bOverFlow = pCCInfo->bOverFlow[u8CC608];
9652 pCCInfo->bOverFlow[u8CC608] = FALSE;
9653 return (bOverFlow);
9654 }
9655
9656 ///////////////////////////////////////////////////////////////////////////////
9657 /// Get Write Address of HVD CC Ring Buffer
9658 /// @param u8CC608 \b IN
9659 /// - # TRUE for CC608 parser
9660 /// - # FALSE for CC708 parser
9661 /// Return value:: Write Address
9662 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Get_RB_WriteAddr(MS_U32 u32Id,MS_U8 u8CC608)9663 MS_U32 MDrv_HVD_EX_CC_Get_RB_WriteAddr(MS_U32 u32Id, MS_U8 u8CC608)
9664 {
9665
9666 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9667 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9668 MS_U32 u32UserDataIdxSize = 0;
9669 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
9670 MS_U32 u32UserDataSize = 0;
9671 MS_VIRT u32UserDataAddr = 0;
9672 DTV_BUF_type* pHVD_User_Data = NULL;
9673
9674 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9675 MS_U32 u32FwParseCnt;
9676 MS_U32 u32PAddr;
9677
9678
9679 if ((pCCInfo->u8ParsingStatus == 0xff) || (pCCInfo->u8ParsingStatus == 0x00))
9680 {
9681
9682 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
9683 /*
9684 if(!pCCInfo->bBufMiu1[u8CC608])
9685 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9686 */
9687 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
9688 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9689
9690
9691 return u32PAddr;
9692 }
9693
9694 u32UserDataIdxSize = (MS_U32)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
9695
9696 u32UsrDataIdxWptr =_HVD_EX_CC_Update_UserData_Wptr(u32Id);
9697
9698
9699
9700 if (pCCInfo->u32FWUsrDataRIdx == u32UsrDataIdxWptr)
9701 {
9702 // User Data Buffer Empty
9703 HVD_EX_MSG_DBG("RIdx(%d) == WIdx(%d) , empty !!!\n", pCCInfo->u32FWUsrDataRIdx,u32UsrDataIdxWptr);
9704 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
9705
9706 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
9707 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9708
9709 return u32PAddr;
9710
9711 }
9712 else if (u32UsrDataIdxWptr > pCCInfo->u32FWUsrDataRIdx)
9713 {
9714 u32FwParseCnt = u32UsrDataIdxWptr - pCCInfo->u32FWUsrDataRIdx;
9715 }
9716 else// pCCInfo->u32FWUsrDataWIdx < pCCInfo->u32FWUsrDataRIdx
9717 {
9718 u32FwParseCnt = u32UserDataIdxSize - (pCCInfo->u32FWUsrDataRIdx - u32UsrDataIdxWptr);
9719 }
9720
9721 HVD_EX_MSG_DBG("u32FwParseCnt(%d) !!!, pCCInfo->u32RingBufWPAddr[%d]: 0x%lx\n", u32FwParseCnt, u8CC608,(unsigned long)pCCInfo->u32RingBufWPAddr[u8CC608] );
9722
9723 MS_BOOL b608OverFlow = FALSE, b708OverFlow = FALSE;
9724 MS_U8 *pCC608buf = &(pCCInfo->u8CC608buf[0]);
9725 MS_U8 *pCC708buf = &(pCCInfo->u8CC708buf[0]);
9726 MS_U32 u32CC608Len = 0;
9727 MS_U32 u32CC708Len = 0;
9728
9729
9730
9731
9732 while(u32FwParseCnt)
9733 {
9734
9735
9736
9737 if( (!_HVD_EX_CC_RB_Have_Avail_Space(u32Id, 1, MAX_608_CC_LEN)) || (!_HVD_EX_CC_RB_Have_Avail_Space(u32Id, 0, MAX_708_CC_LEN)))
9738 {
9739 HVD_EX_MSG_DBG("not have available space!!!\n");
9740 break;
9741 }
9742 u32UserDataAddr = MDrv_HVD_EX_GetUserData_Packet(u32Id, pCCInfo->u32FWUsrDataRIdx, (MS_U32*)&u32UserDataSize);
9743 u32UserDataAddr += pCtrl->MemMap.u32CodeBufVAddr; // change to virtual address
9744
9745 pHVD_User_Data = (DTV_BUF_type*)u32UserDataAddr;
9746
9747 u32CC608Len = 0;
9748 u32CC708Len = 0;
9749
9750
9751
9752 _HVD_EX_CC_Extract_CCdata(u32Id, pCC608buf, &u32CC608Len, pCC708buf, &u32CC708Len, pHVD_User_Data);
9753
9754 if(u32CC608Len > 0)
9755 b608OverFlow =_HVD_EX_CC_Add_PaddingData_To_608(u32Id, &(pCCInfo->u8CC608buf[0]), u32CC608Len);
9756
9757
9758
9759
9760 if(u32CC708Len > 0)
9761 b708OverFlow = _HVD_EX_CC_Add_PaddingData_To_708(u32Id, &(pCCInfo->u8CC708buf[0]), u32CC708Len);
9762 //b708OverFlow =_HVD_CC_Copy_CCdata_To_RB(0, &CC708buf[0], u32CC708Len);
9763
9764
9765
9766
9767 if(b608OverFlow)
9768 {
9769 HVD_EX_MSG_ERR("##### Critical error!!!! b608OverFlow: %d!!!\n",b608OverFlow);
9770 pCCInfo->bOverFlow[1] = TRUE;
9771 }
9772
9773 if(b708OverFlow)
9774 {
9775 HVD_EX_MSG_ERR("##### Critical error!!!! b708OverFlow:%d !!!\n",b708OverFlow);
9776 pCCInfo->bOverFlow[0] = TRUE;
9777 }
9778
9779
9780
9781 pCCInfo->u32FWUsrDataRIdx++;
9782
9783 if (pCCInfo->u32FWUsrDataRIdx >= u32UserDataIdxSize)
9784 {
9785 pCCInfo->u32FWUsrDataRIdx = 0;
9786 }
9787
9788
9789 u32FwParseCnt--;
9790 }
9791
9792
9793 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
9794 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
9795 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9796
9797 return u32PAddr;
9798
9799
9800
9801 }
9802
9803
9804 ///////////////////////////////////////////////////////////////////////////////
9805 /// Get Read Address of HVD CC Ring Buffer
9806 /// @param u8CC608 \b IN
9807 /// - # TRUE for CC608 parser
9808 /// - # FALSE for CC708 parser
9809 /// Return value:: Read Address
9810 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Get_RB_ReadAddr(MS_U32 u32Id,MS_U8 u8CC608)9811 MS_U32 MDrv_HVD_EX_CC_Get_RB_ReadAddr(MS_U32 u32Id, MS_U8 u8CC608)
9812 {
9813
9814 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9815 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9816 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9817
9818 MS_U32 u32PAddr = pCCInfo->u32RingBufRPAddr[u8CC608];
9819 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
9820 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9821
9822 return u32PAddr;
9823
9824 }
9825
9826 ///////////////////////////////////////////////////////////////////////////////
9827 /// Enhance CC info mode, only support cc608
9828 /// @param bEnable \b IN
9829 /// - # TRUE for enhance to dump the pts/tmp_ref info
9830 /// - # FALSE for original
9831 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_InfoEnhanceMode(MS_U32 u32Id,MS_BOOL bEnable)9832 MS_BOOL MDrv_HVD_EX_CC_InfoEnhanceMode(MS_U32 u32Id, MS_BOOL bEnable)
9833 {
9834
9835 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9836 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9837 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9838
9839 pCCInfo->b608InfoEnhance = bEnable;
9840
9841 return TRUE;
9842 }
9843
9844
9845
9846
MDrv_HVD_EX_SetExternal_CC608_Buffer(MS_U32 u32Id,MS_PHY u32Addr,MS_U32 u32Len)9847 HVD_EX_Result MDrv_HVD_EX_SetExternal_CC608_Buffer(MS_U32 u32Id, MS_PHY u32Addr, MS_U32 u32Len)
9848 {
9849 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9850 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9851 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9852 MS_U8 u8UserDataMode = (USER_DATA_MODE_DIRECTTV_CC|USER_DATA_MODE_ATSC_CC_RAW|USER_DATA_MODE_EXTERNAL_CC_BUFFER);
9853 MS_U32 u32CCinfo;
9854
9855 HVD_EX_MSG_TRACE();
9856 _DRV_HVD_Inited(u8DrvId,eRet);
9857 _DRV_HVD_EX_Entry(u8DrvId);
9858
9859 u32Addr <<= 10;// 1kbytes unit
9860 u32Len <<= 10; // 1kbytes unit
9861
9862 // Read Ptr (4 bytes), Write Ptr (4 bytes), Latch Bit (2 bytes), overflow (2 bytes), Miu Base Address (4 bytes)
9863 MS_U32 *u32ReadPtr = (MS_U32 *)(HVD_PA2VA(u32Addr));
9864 MS_U32 *u32WritePtr = (MS_U32 *)(HVD_PA2VA(u32Addr+4));
9865 MS_U32 *u32LatchOverflow = (MS_U32 *)(HVD_PA2VA(u32Addr+8));
9866 MS_U32 *u32FWBinaryAddr = (MS_U32 *)(HVD_PA2VA(u32Addr+12));
9867
9868 *u32ReadPtr = *u32WritePtr = u32Addr+EXT_608_CC_DATA_ALIGN;
9869 *u32LatchOverflow = 0;
9870
9871
9872 u32Addr -= pCtrl->MemMap.u32FWBinaryAddr;
9873 *u32FWBinaryAddr = pCtrl->MemMap.u32FWBinaryAddr;
9874
9875 u32CCinfo = ((u32Addr >> 10) << 8) & 0xffffff00; //arg[31:8] * 1kbytes
9876 u32CCinfo |= ((u32Len >> 10) & 0xff); //arg[7:0] *1kbytes
9877
9878 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_USERDATA_MODE, u8UserDataMode);
9879
9880 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_EXTERNAL_CC_608_BUF, u32CCinfo);
9881
9882 _DRV_HVD_EX_RET(u8DrvId, eRet);
9883
9884
9885 }
9886
MDrv_HVD_EX_SetExternal_CC708_Buffer(MS_U32 u32Id,MS_PHY u32Addr,MS_U32 u32Len)9887 HVD_EX_Result MDrv_HVD_EX_SetExternal_CC708_Buffer(MS_U32 u32Id, MS_PHY u32Addr, MS_U32 u32Len)
9888 {
9889
9890 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9891 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9892 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9893 MS_U8 u8UserDataMode = (USER_DATA_MODE_DIRECTTV_CC|USER_DATA_MODE_ATSC_CC_RAW|USER_DATA_MODE_EXTERNAL_CC_BUFFER);
9894 MS_U32 u32CCinfo;
9895
9896 HVD_EX_MSG_TRACE();
9897 _DRV_HVD_Inited(u8DrvId,eRet);
9898 _DRV_HVD_EX_Entry(u8DrvId);
9899
9900 u32Addr <<= 10;// 1kbytes unit
9901 u32Len <<= 10; // 1kbytes unit
9902
9903 // Read Ptr (4 bytes), Write Ptr (4 bytes), Latch Bit (2 bytes), overflow (2 bytes), Miu Base Address (4 bytes)
9904 MS_U32 *u32ReadPtr = (MS_U32 *)(HVD_PA2VA(u32Addr));
9905 MS_U32 *u32WritePtr = (MS_U32 *)(HVD_PA2VA(u32Addr+4));
9906 MS_U32 *u32LatchOverflow = (MS_U32 *)(HVD_PA2VA(u32Addr+8));
9907 MS_U32 *u32FWBinaryAddr = (MS_U32 *)(HVD_PA2VA(u32Addr+12));
9908
9909
9910 MS_U32 i;
9911 MS_U8 *u8ResvAddr = (MS_U8 *)((HVD_PA2VA(u32Addr))+EXT_CC_INFO_LENGTH);
9912 for(i=0;i< (EXT_708_CC_DATA_ALIGN- EXT_CC_INFO_LENGTH) ;i++)
9913 {
9914 u8ResvAddr[i] = 0xff;
9915 }
9916
9917
9918
9919 *u32ReadPtr = *u32WritePtr = u32Addr+EXT_708_CC_DATA_ALIGN;
9920 *u32LatchOverflow = 0;
9921
9922 u32Addr -= pCtrl->MemMap.u32FWBinaryAddr;
9923 *u32FWBinaryAddr = pCtrl->MemMap.u32FWBinaryAddr;
9924
9925
9926 u32CCinfo = ((u32Addr >> 10) << 8) & 0xffffff00; //arg[31:8] * 1kbytes
9927 u32CCinfo |= ((u32Len >> 10) & 0xff); //arg[7:0] *1kbytes
9928
9929 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_USERDATA_MODE, u8UserDataMode);
9930
9931 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_EXTERNAL_CC_708_BUF, u32CCinfo);
9932
9933 _DRV_HVD_EX_RET(u8DrvId, eRet);
9934 }
9935
9936
9937 //-----------------------------------------------------------------------------
9938 /// @brief \b Function \b Name: MDrv_HVD_EX_ShowFirstFrameDirect()
9939 /// @brief \b Function \b Description: Push First Frame to Display Queue Directly
9940 /// @param -bEnable \b IN : Enable/Disable
9941 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
9942 //-----------------------------------------------------------------------------
MDrv_HVD_EX_ShowFirstFrameDirect(MS_U32 u32Id,MS_BOOL bEnable)9943 HVD_EX_Result MDrv_HVD_EX_ShowFirstFrameDirect(MS_U32 u32Id, MS_BOOL bEnable)
9944 {
9945 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9946 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9947
9948 HVD_EX_MSG_TRACE();
9949 _DRV_HVD_Inited(u8DrvId,eRet);
9950 _DRV_HVD_EX_Entry(u8DrvId);
9951
9952 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SHOW_FIRST_FRAME_DIRECT, bEnable);
9953
9954 _DRV_HVD_EX_RET(u8DrvId, eRet);
9955 }
9956
9957 //-----------------------------------------------------------------------------
9958 /// @brief \b Function \b Name: MDrv_HVD_EX_AVCResizeDosDispPendBuf()
9959 /// @brief \b Function \b Description: Resize disp pending buffer size for display outside mode(dos),
9960 /// @param -u32Size \b IN : size of display pending buffer
9961 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
9962 //-----------------------------------------------------------------------------
MDrv_HVD_EX_AVCResizeDosDispPendBuf(MS_U32 u32Id,MS_U32 u32Size)9963 HVD_EX_Result MDrv_HVD_EX_AVCResizeDosDispPendBuf(MS_U32 u32Id, MS_U32 u32Size)
9964 {
9965 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9966 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9967
9968 HVD_EX_MSG_TRACE();
9969 _DRV_HVD_Inited(u8DrvId,eRet);
9970 _DRV_HVD_EX_Entry(u8DrvId);
9971
9972 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_RESIZE_DOS_DISP_PEND_BUF, u32Size);
9973
9974 _DRV_HVD_EX_RET(u8DrvId, eRet);
9975 }
9976 //-----------------------------------------------------------------------------
9977 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDmxFrameRate()
9978 /// @brief \b Function \b Description: set the demuxer prefered frame rate.
9979 /// @param -eMode \b IN : mode type
9980 /// @return -The result is successful or not
9981 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDmxFrameRate(MS_U32 u32Id,MS_U32 u32Value)9982 HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRate(MS_U32 u32Id, MS_U32 u32Value)
9983 {
9984 return (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DMX_FRAMERATE, u32Value);
9985 }
9986
9987 //-----------------------------------------------------------------------------
9988 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDmxFrameRateBase()
9989 /// @brief \b Function \b Description: set the demuxer prefered frame rate.
9990 /// @param -eMode \b IN : mode type
9991 /// @return -The result is successful or not
9992 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDmxFrameRateBase(MS_U32 u32Id,MS_U32 u32Value)9993 HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRateBase(MS_U32 u32Id, MS_U32 u32Value)
9994 {
9995 return (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DMX_FRAMERATEBASE, u32Value);
9996 }
9997
9998 //-----------------------------------------------------------------------------
9999 /// @brief \b Function \b Name: MDrv_HVD_EX_GetSupport2ndMVOPInterface()
10000 /// @brief \b Function \b Description: Get if support 2nd MVOP interface.
10001 /// @param : none
10002 /// @return -The result is true or false
10003 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetSupport2ndMVOPInterface(void)10004 MS_BOOL MDrv_HVD_EX_GetSupport2ndMVOPInterface(void)
10005 {
10006 return HAL_HVD_EX_GetSupport2ndMVOPInterface();
10007 }
10008
10009 //-----------------------------------------------------------------------------
10010 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVPUSecureMode()
10011 /// @brief \b Function \b Description: Set secure mode for HVD Drv.
10012 /// @param : none
10013 /// @return -The result is true or false
10014 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVPUSecureMode(MS_BOOL bEnable)10015 MS_BOOL MDrv_HVD_EX_SetVPUSecureMode(MS_BOOL bEnable)
10016 {
10017 pHVDDrvContext->bVPUIsSecureMode = bEnable;
10018 return TRUE;
10019 }
10020
MDrv_HVD_EX_OnePendingBufferMode(MS_U32 u32Id,MS_BOOL bEnable)10021 HVD_EX_Result MDrv_HVD_EX_OnePendingBufferMode(MS_U32 u32Id,MS_BOOL bEnable)
10022 {
10023 HVD_EX_Result eRet = E_HVD_EX_OK;
10024
10025 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10026
10027 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bOnePendingBuffer = bEnable;
10028 _DRV_HVD_EX_RET(u8DrvId, eRet);
10029 }
10030
MDrv_HVD_EX_TsInBbuMode(MS_U32 u32Id,MS_BOOL bDisable)10031 HVD_EX_Result MDrv_HVD_EX_TsInBbuMode(MS_U32 u32Id,MS_BOOL bDisable)
10032 {
10033 HVD_EX_Result eRet = E_HVD_EX_OK;
10034
10035 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10036
10037 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bDisableTspInBbuMode = bDisable;
10038 _DRV_HVD_EX_RET(u8DrvId, eRet);
10039 }
10040
MDrv_HVD_EX_IapGnBufShareBWMode(MS_U32 u32Id,MS_BOOL bEnable,MS_PHY u32IapGnBufAddr,MS_U32 u32IapGnBufSize)10041 HVD_EX_Result MDrv_HVD_EX_IapGnBufShareBWMode(MS_U32 u32Id,MS_BOOL bEnable, MS_PHY u32IapGnBufAddr, MS_U32 u32IapGnBufSize)
10042 {
10043 HVD_EX_Result eRet = E_HVD_EX_OK;
10044
10045 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10046
10047 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stIapGnShBWMode.bEnable = bEnable;
10048 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stIapGnShBWMode.u32IapGnBufAddr = u32IapGnBufAddr;
10049 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stIapGnShBWMode.u32IapGnBufSize = u32IapGnBufSize;
10050 _DRV_HVD_EX_RET(u8DrvId, eRet);
10051 }
10052
10053 //-----------------------------------------------------------------------------
10054 /// @brief \b Function \b Name: MDrv_HVD_EX_FRC_OnlyShowTopField()
10055 /// @brief \b Function \b Description: enable/disable only show top filed for FRC mode
10056 /// @param -bEnable \b IN :enable/disable
10057 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
10058 //-----------------------------------------------------------------------------
MDrv_HVD_EX_FRC_OnlyShowTopField(MS_U32 u32Id,MS_BOOL bEnable)10059 HVD_EX_Result MDrv_HVD_EX_FRC_OnlyShowTopField(MS_U32 u32Id, MS_BOOL bEnable)
10060 {
10061 HVD_EX_Result eRet = E_HVD_EX_OK;
10062 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10063
10064 HVD_EX_MSG_TRACE();
10065 _DRV_HVD_Inited(u8DrvId,eRet);
10066 _DRV_HVD_EX_Entry(u8DrvId);
10067
10068 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_ONLY_SHOW_TOP_FIELD, bEnable);
10069
10070 _DRV_HVD_EX_RET(u8DrvId, eRet);
10071 }
10072
10073 //-----------------------------------------------------------------------------
10074 /// @brief \b Function \b Name: MDrv_HVD_EX_DisableEsFullStop()
10075 /// @brief \b Function \b Description: enable/disable es full stop mode
10076 /// @param -bDisable \b IN :enable/disable
10077 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
10078 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DisableEsFullStop(MS_U32 u32Id,MS_BOOL bDisable)10079 HVD_EX_Result MDrv_HVD_EX_DisableEsFullStop(MS_U32 u32Id, MS_BOOL bDisable)
10080 {
10081 HVD_EX_Result eRet = E_HVD_EX_OK;
10082 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10083
10084 if(bDisable)
10085 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, FALSE);
10086 else
10087 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, TRUE);
10088
10089 _DRV_HVD_EX_RET(u8DrvId, eRet);
10090 }
10091
MDrv_HVD_EX_PreSetMFCodecMode(MS_U32 u32Id,HVD_EX_MFCodec_mode eMFCodecMode)10092 HVD_EX_Result MDrv_HVD_EX_PreSetMFCodecMode(MS_U32 u32Id, HVD_EX_MFCodec_mode eMFCodecMode)
10093 {
10094 HVD_EX_Result eRet = E_HVD_EX_OK;
10095
10096 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10097
10098 switch(eMFCodecMode)
10099 {
10100 case E_HVD_EX_MFCODEC_DEFAULT:
10101 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eMFCodecMode = E_HVD_DEF_MFCODEC_DEFAULT;
10102 break;
10103 case E_HVD_EX_MFCODEC_FORCE_ENABLE:
10104 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eMFCodecMode = E_HVD_DEF_MFCODEC_FORCE_ENABLE;
10105 break;
10106 case E_HVD_EX_MFCODEC_FORCE_DISABLE:
10107 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eMFCodecMode = E_HVD_DEF_MFCODEC_FORCE_DISABLE;
10108 break;
10109 default:
10110 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eMFCodecMode = E_HVD_DEF_MFCODEC_DEFAULT;
10111 break;
10112 }
10113
10114 _DRV_HVD_EX_RET(u8DrvId, eRet);
10115 }
10116
MDrv_HVD_EX_PreSetForce8BitMode(MS_U32 u32Id,MS_BOOL bForce8BitMode)10117 HVD_EX_Result MDrv_HVD_EX_PreSetForce8BitMode(MS_U32 u32Id, MS_BOOL bForce8BitMode)
10118 {
10119 HVD_EX_Result eRet = E_HVD_EX_OK;
10120 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10121
10122 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bForce8BitMode = bForce8BitMode;
10123 _DRV_HVD_EX_RET(u8DrvId, eRet);
10124 }
10125
MDrv_HVD_EX_PreSetDVSingleLayerMode(MS_U32 u32Id,HVD_EX_Feature bEnableDVSingleLayerMode)10126 HVD_EX_Result MDrv_HVD_EX_PreSetDVSingleLayerMode(MS_U32 u32Id, HVD_EX_Feature bEnableDVSingleLayerMode)
10127 {
10128 HVD_EX_Result eRet = E_HVD_EX_OK;
10129 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10130
10131 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bDVSingleLayerMode = bEnableDVSingleLayerMode;
10132 HVD_EX_MSG_DBG("MDrv_HVD_EX_PreSetDVSingleLayerMode 0x%x\n", bEnableDVSingleLayerMode);
10133 _DRV_HVD_EX_RET(u8DrvId, eRet);
10134 }
10135
MDrv_HVD_EX_PreSetVdecFeature(MS_U32 u32Id,MS_U32 eVdecFeature)10136 HVD_EX_Result MDrv_HVD_EX_PreSetVdecFeature(MS_U32 u32Id, MS_U32 eVdecFeature)
10137 {
10138 HVD_EX_Result eRet = E_HVD_EX_OK;
10139 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10140
10141 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eVdecFeature = eVdecFeature;
10142 HVD_EX_MSG_DBG("MDrv_HVD_EX_PreSetVdecFeature 0x%x\n", eVdecFeature);
10143 _DRV_HVD_EX_RET(u8DrvId, eRet);
10144 }
10145
MDrv_HVD_EX_PreSetDynamicCMA(MS_U32 u32Id,MS_BOOL bDynamicCMAMode)10146 HVD_EX_Result MDrv_HVD_EX_PreSetDynamicCMA(MS_U32 u32Id, MS_BOOL bDynamicCMAMode)
10147 {
10148 HVD_EX_Result eRet = E_HVD_EX_OK;
10149 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10150
10151 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bEnableDynamicCMA = bDynamicCMAMode;
10152 HVD_EX_MSG_DBG("MDrv_HVD_EX_PreSetDynamicCMA 0x%x\n", bDynamicCMAMode);
10153 _DRV_HVD_EX_RET(u8DrvId, eRet);
10154 }
10155
MDrv_HVD_EX_PreConnectDispPath(MS_U32 u32Id,MS_BOOL bEnable,MS_BOOL bConnect,HVD_EX_DISPLAY_PATH eMvopPath)10156 HVD_EX_Result MDrv_HVD_EX_PreConnectDispPath(MS_U32 u32Id, MS_BOOL bEnable, MS_BOOL bConnect, HVD_EX_DISPLAY_PATH eMvopPath)
10157 {
10158 HVD_EX_Result eRet = E_HVD_EX_OK;
10159
10160 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10161
10162 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stPreConnectDispPath.bEnable = bEnable;
10163 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stPreConnectDispPath.stDynmcDispPath.bConnect = bConnect;
10164 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stPreConnectDispPath.stDynmcDispPath.eMvopPath = eMvopPath;
10165 _DRV_HVD_EX_RET(u8DrvId, eRet);
10166 }
10167
MDrv_HVD_EX_PreConnectInputTsp(MS_U32 u32Id,MS_BOOL bEnable,HVD_EX_INPUT_TSP eInputTsp)10168 HVD_EX_Result MDrv_HVD_EX_PreConnectInputTsp(MS_U32 u32Id, MS_BOOL bEnable, HVD_EX_INPUT_TSP eInputTsp)
10169 {
10170 HVD_EX_Result eRet = E_HVD_EX_OK;
10171
10172 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10173
10174 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stPreConnectInputTsp.bEnable = bEnable;
10175 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stPreConnectInputTsp.u8InputTsp = eInputTsp;
10176 _DRV_HVD_EX_RET(u8DrvId, eRet);
10177 }
10178
10179 //-----------------------------------------------------------------------------
10180 /// @brief \b Function \b Name: MDrv_HVD_EX_SetPTSUsecMode()
10181 /// @brief \b Function \b Description: enable/disable PTS output by micro second level,
10182 /// @param -bEnable \b IN :enable/disable
10183 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
10184 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetPTSUsecMode(MS_U32 u32Id,MS_BOOL bEnable)10185 HVD_EX_Result MDrv_HVD_EX_SetPTSUsecMode(MS_U32 u32Id, MS_BOOL bEnable)
10186 {
10187 HVD_EX_Result eRet = E_HVD_EX_OK;
10188 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10189
10190 HVD_EX_MSG_TRACE();
10191 _DRV_HVD_Inited(u8DrvId,eRet);
10192 _DRV_HVD_EX_Entry(u8DrvId);
10193
10194 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_PTS_US_MODE, bEnable);
10195
10196 _DRV_HVD_EX_RET(u8DrvId, eRet);
10197 }
10198
10199 //-----------------------------------------------------------------------------
10200 /// @brief \b Function \b Name: MDrv_HVD_EX_PVRTimeShiftSeamlessMode()
10201 /// @brief \b Function \b Description:
10202 /// @param -bEnable \b IN :
10203 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
10204 //-----------------------------------------------------------------------------
MDrv_HVD_EX_PVRTimeShiftSeamlessMode(MS_U32 u32Id,MS_U8 u8Arg)10205 HVD_EX_Result MDrv_HVD_EX_PVRTimeShiftSeamlessMode(MS_U32 u32Id, MS_U8 u8Arg)
10206 {
10207 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
10208 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10209
10210 HVD_EX_MSG_TRACE();
10211 _DRV_HVD_Inited(u8DrvId,eRet);
10212 _DRV_HVD_EX_Entry(u8DrvId);
10213
10214 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PVR_SEAMLESS_TIMESHIFT, u8Arg);
10215
10216 if ((u8Arg == 1) || (u8Arg == 2)) //u8Arg=1 needs about 50ms, u8Arg=2 needs about 30ms
10217 {
10218 MS_U32 u32Status = (u8Arg==1)?(E_HVD_SEAMLESS_PAUSE_DECODE):(E_HVD_SEAMLESS_RESET_HW_DONE);
10219 MS_U32 u32Times = 0;
10220
10221 HVD_EX_MSG_DBG("TS Seamless. Arg=%d, polling status start at %d \n", u8Arg, HVD_GetSysTime_ms());
10222
10223 while (1)
10224 {
10225 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TS_SEAMLESS_STATUS) & u32Status)
10226 {
10227 HVD_EX_MSG_DBG("TS Seamless status change done. Arg=%d. Status=0x%x at %d \n", u8Arg, u32Status, HVD_GetSysTime_ms());
10228 break;
10229 }
10230
10231 u32Times++;
10232 HVD_Delay_ms(1);
10233
10234 if (u32Times > 500)
10235 {
10236 HVD_EX_MSG_ERR("Timeout!!! TS Seamless status change is not finished. Arg=%d. Status=0x%x at %d \n", u8Arg, u32Status, HVD_GetSysTime_ms());
10237 eRet = E_HVD_EX_FAIL;
10238 break;
10239 }
10240 }
10241 }
10242
10243 if (u8Arg > 0)
10244 {
10245 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag = (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & ~HVD_INIT_MAIN_MASK) | HVD_INIT_MAIN_FILE_TS;
10246 }
10247
10248
10249 if (u8Arg == 2)
10250 {
10251 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_VDEAD, TRUE);
10252 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
10253
10254 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVOID_PTS_TBL_OVERFLOW, TRUE);
10255
10256 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, TRUE);
10257 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, TRUE);
10258 }
10259
10260 _DRV_HVD_EX_RET(u8DrvId, eRet);
10261 }
10262
MDrv_HVD_EX_CHIP_Capability(void * pHWCap)10263 MS_U8 MDrv_HVD_EX_CHIP_Capability(void* pHWCap)
10264 {
10265 return HAL_VPU_EX_CHIP_Capability(pHWCap);
10266 }
10267
MDrv_HVD_EX_GetDVSupportProfiles(MS_U32 * pu32DVSupportProfiles)10268 HVD_EX_Result MDrv_HVD_EX_GetDVSupportProfiles(MS_U32 *pu32DVSupportProfiles)
10269 {
10270 HVD_EX_Result eRet = E_HVD_EX_FAIL;
10271
10272 if (pu32DVSupportProfiles == NULL)
10273 {
10274 //E_HVD_EX_FAIL
10275 }
10276 else
10277 {
10278 *pu32DVSupportProfiles = HAL_HVD_EX_GetDVSupportProfiles();
10279 return E_HVD_EX_OK;
10280 }
10281
10282 return eRet;
10283 }
10284
MDrv_HVD_EX_GetDVSupportHighestLevel(MS_U32 u32DVProfile,MS_U32 * pu32DVLevel)10285 HVD_EX_Result MDrv_HVD_EX_GetDVSupportHighestLevel(MS_U32 u32DVProfile, MS_U32 *pu32DVLevel)
10286 {
10287 HVD_EX_Result eRet = E_HVD_EX_FAIL;
10288
10289 if (pu32DVLevel == NULL)
10290 {
10291 //E_HVD_EX_FAIL
10292 }
10293 else
10294 {
10295 *pu32DVLevel = HAL_HVD_EX_GetDVSupportHighestLevel(u32DVProfile);
10296 eRet = E_HVD_EX_OK;
10297 }
10298
10299 return eRet;
10300 }
10301
MDrv_HVD_EX_BBU_Proc(MS_U32 u32Id)10302 void MDrv_HVD_EX_BBU_Proc(MS_U32 u32Id)
10303 {
10304 HAL_HVD_EX_BBU_Proc(u32Id);
10305 }
MDrv_HVD_EX_BBU_StopProc(MS_U32 u32Id)10306 void MDrv_HVD_EX_BBU_StopProc(MS_U32 u32Id)
10307 {
10308 HAL_HVD_EX_BBU_StopProc(u32Id);
10309 }
MDrv_HVD_EX_SetCMAInformation(void * cmaInitParam)10310 void MDrv_HVD_EX_SetCMAInformation(void* cmaInitParam)
10311 {
10312 UNUSED(cmaInitParam);
10313 pHVDDrvContext->bCMAUsed = TRUE;
10314 #if defined(MSOS_TYPE_LINUX) && defined(SUPPORT_CMA)
10315 memcpy((void*)(pHVDDrvContext->cmaInitParam),cmaInitParam,sizeof(struct CMA_Pool_Init_Param)*2);
10316 #endif
10317 }
10318
MDrv_HVD_EX_GetFrameBufferDefaultSize(HVD_EX_CodecType eCodecType)10319 MS_SIZE MDrv_HVD_EX_GetFrameBufferDefaultSize(HVD_EX_CodecType eCodecType)
10320 {
10321 return HAL_VPU_EX_GetFrameBufferDefaultSize((VPU_EX_CodecType)eCodecType);
10322 }
10323
MDrv_HVD_EX_GetCMAMemSize(HVD_EX_CodecType eCodecType,HVD_EX_SrcMode eSrcMode,MS_U64 * offset,MS_SIZE * length,MS_U64 total_length,MS_SIZE unUseSize)10324 MS_BOOL MDrv_HVD_EX_GetCMAMemSize(HVD_EX_CodecType eCodecType, HVD_EX_SrcMode eSrcMode,
10325 MS_U64 *offset, MS_SIZE *length, MS_U64 total_length, MS_SIZE unUseSize)
10326 {
10327 return HAL_VPU_EX_GetCMAMemSize((VPU_EX_CodecType)eCodecType, (VPU_EX_SrcMode)eSrcMode, offset, length, total_length, unUseSize);
10328 }
10329
MDrv_HVD_EX_GetCapability(MS_U8 * pu8CmdNameIn,void * pParamIn,void * pParamOut)10330 MS_BOOL MDrv_HVD_EX_GetCapability(MS_U8 *pu8CmdNameIn, void *pParamIn, void *pParamOut)
10331 {
10332 return HAL_VPU_EX_GetCapability(pu8CmdNameIn, pParamIn, pParamOut);
10333 }
10334
10335 //-----------------------------------------------------------------------------
10336 /// @brief \b Function \b Name: MDrv_HVD_EX_CPBRemovalDelay()
10337 /// @brief \b Function \b Description: enable/disable OneSegment mode for AVC
10338 /// @param -bEnable \b IN :enable/disable
10339 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
10340 //-----------------------------------------------------------------------------
MDrv_HVD_EX_CPBRemovalDelay(MS_U32 u32Id,MS_BOOL bEnable)10341 HVD_EX_Result MDrv_HVD_EX_CPBRemovalDelay(MS_U32 u32Id, MS_BOOL bEnable)
10342 {
10343 HVD_EX_Result eRet = E_HVD_EX_OK;
10344 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
10345
10346 HVD_EX_MSG_TRACE();
10347 _DRV_HVD_Inited(u8DrvId,eRet);
10348 _DRV_HVD_EX_Entry(u8DrvId);
10349
10350 eRet = _HVD_MapRetEx( HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_USE_CPB_REMOVAL_DEALY, bEnable));
10351
10352 _DRV_HVD_EX_RET(u8DrvId, eRet);
10353 }
10354
10355 #else
MDrv_HVD_EX_LoadCodeInSecure(MS_U32 addr)10356 MS_BOOL MDrv_HVD_EX_LoadCodeInSecure(MS_U32 addr)
10357 {
10358 return HAL_VPU_EX_LoadCodeInSecure(addr);
10359 }
10360
MDrv_HVD_EX_SetLockDownRegister(void * param)10361 MS_BOOL MDrv_HVD_EX_SetLockDownRegister(void* param)
10362 {
10363 if(param == NULL)
10364 {
10365 return FALSE;
10366 }
10367 return HAL_VPU_EX_SetLockDownRegister(param);
10368 }
10369
MDrv_HVD_EX_TEE_AllocateEsBufHandle(MS_U8 u8Idx,MS_PHY pVPUCodecAddr,MS_U32 u32ReqSize,MS_U32 u32BuffEnd,MS_U32 * pu32EsHandle)10370 MS_BOOL MDrv_HVD_EX_TEE_AllocateEsBufHandle(MS_U8 u8Idx, MS_PHY pVPUCodecAddr, MS_U32 u32ReqSize, MS_U32 u32BuffEnd, MS_U32 *pu32EsHandle)
10371 {
10372 return _MDrv_HVD_EX_TEE_AllocateEsBufHandle_(u8Idx, pVPUCodecAddr, u32ReqSize, u32BuffEnd, pu32EsHandle);
10373 }
10374
MDrv_HVD_EX_TEE_GetESBufByHandle(MS_U8 u8Idx,MS_PHY pVPUCodecAddr,MS_U32 u32EsHandle,MS_PHY * pPhyAddr)10375 MS_BOOL MDrv_HVD_EX_TEE_GetESBufByHandle(MS_U8 u8Idx, MS_PHY pVPUCodecAddr, MS_U32 u32EsHandle, MS_PHY *pPhyAddr)
10376 {
10377 return _MDrv_HVD_EX_TEE_GetESBufByHandle_(u8Idx, pVPUCodecAddr, u32EsHandle, pPhyAddr);
10378 }
10379
10380 #endif
10381