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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvHVD_EX.c
98 /// @brief HVD Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102
103 //-------------------------------------------------------------------------------------------------
104 // Include Files
105 //-------------------------------------------------------------------------------------------------
106 // Common Definition
107 #ifdef MSOS_TYPE_LINUX_KERNEL
108 #include <linux/string.h>
109 #else
110 #include <string.h>
111 #endif
112 #include "drvHVD_Common.h"
113 #include "drvHVD_EX.h"
114 #include "drvHVD_def.h"
115
116 #include "fwHVD_if.h"
117 #include "halVPU_EX.h"
118 #include "halHVD_EX.h"
119 #include "regHVD_EX.h"
120 #include "drvSYS.h"
121 #include "HVD_EX_Common.h"
122 #if defined(SUPPORT_CMA)
123 #include "drvCMAPool.h"
124 #include "msos/linux/ion_uapi.h"
125 #include "msos/linux/mdrv_cma_pool_st.h"
126 #endif
127
128 #if HVD_ENABLE_AUTO_SET_REG_BASE
129 #include "drvMMIO.h"
130 #endif
131
132 #if (!defined(MSOS_TYPE_NUTTX) && !defined(MSOS_TYPE_OPTEE)) || defined(SUPPORT_X_MODEL_FEATURE)
133
134 #ifdef MSOS_TYPE_LINUX_KERNEL
135 #define VPRINTF printk
136 #elif defined(MSOS_TYPE_ECOS)
137 #define VPRINTF diag_printf
138 #else
139 #ifndef ANDROID
140 #define VPRINTF printf
141 #else
142 #include <sys/mman.h>
143 #include <cutils/ashmem.h>
144 #include <cutils/log.h>
145
146 #define VPRINTF ALOGD
147 #endif
148 #endif
149
150 //-------------------------------------------------------------------------------------------------
151 // Driver Compiler Options
152 //-------------------------------------------------------------------------------------------------
153 //#define SUPPORT_X_MODEL_FEATURE
154 //#define SUPPORT_X_MODEL_HVD_FEATURE //there is a side effect for CB when enable this define.should find the root cause then enable it
155 #define DISABLE_ISR_DETACH
156
157 //-------------------------------------------------------------------------------------------------
158 // Local Defines
159 //-------------------------------------------------------------------------------------------------
160
161 // Drv memory usage
162 #if defined(REDLION_LINUX_KERNEL_ENVI)
163 #define HVD_DTV_VIDEO_DELAY 0 // ms
164 #else
165 #define HVD_DTV_VIDEO_DELAY 0 // ms
166 #endif
167 #define HVD_FW_CMD_TIMEOUT_DEFAULT 100 // ms
168 #define HVD_FW_EXIT_ACTION_TIMEOUT 3500 // ms
169
170 #ifdef VDEC3
171 #define HVD_MAX_STREAMS 16
172 #else
173 #define HVD_MAX_STREAMS 2
174 #endif
175
176 #define HVD_CTRL_INIT_FINISHED BIT(0) // deflaut: 0
177 #define HVD_CTRL_PROCESSING BIT(1) // deflaut: 0
178 #define HVD_CTRL_DATA_END BIT(2) // deflaut: 0
179 #define HVD_CTRL_DISPLAY_CTRL BIT(3) // deflaut: 0
180 #define HVD_CTRL_DISP_INFO_RDY BIT(4) // deflaut: 0
181
182 #define HVD_CTRL_DISP_OUTSIDE BIT(5)//BIT(9) // deflaut: 0
183 typedef enum
184 {
185 E_HVD_CHECK_CMD_NONE = 0, //decode -> decode_finish
186 E_HVD_CHECK_CMD_INIT,
187 E_HVD_CHECK_CMD_TRIGGER_DISP,
188 E_HVD_CHECK_CMD_SEEK2PTS,
189 E_HVD_CHECK_CMD_MAX,
190 } HVD_Check_Cmd;
191
192 #define HVD_MIU_PROTECT_HVD BIT(0)
193 #define HVD_MIU_PROTECT_MVD BIT(1)
194 #define HVD_MIU_PROTECT_VPU BIT(2)
195
196 #define _DRV_HVD_EX_Entry(u8DrvId) \
197 do \
198 { \
199 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_PROCESSING; \
200 } while (0)
201
202 #define _DRV_HVD_EX_RET(u8DrvId, _ret_) \
203 do \
204 { \
205 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= (~HVD_CTRL_PROCESSING); \
206 return (_ret_); \
207 } while (0)
208
209 #define _DRV_HVD_Inited(u8DrvId,_ret_) \
210 do \
211 { \
212 if (!(pHVDDrvContext->bHVDIsInited[u8DrvId])) \
213 { \
214 return _ret_; \
215 } \
216 } while (0)
217
218 #define _DRV_HVD_Rsting(u8DrvId,_ret_) \
219 do \
220 { \
221 if (pHVDDrvContext->bHVDIsIniting[u8DrvId]) \
222 { \
223 return _ret_; \
224 } \
225 } while (0)
226
227 #define _DRV_HVD_Ctrl(u8DrvId, x) ( pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & (x) )
228
229 #define _DRV_HVD_SetCtrl(u8DrvId, x) \
230 do \
231 { \
232 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= (x); \
233 } while (0)
234
235 #ifndef UNUSED
236 #define UNUSED(x) (void)(x)
237 #endif
238
239 #define _MS_TO_90K(x) (x*90) //ms ==> 90k counter
240 #define _90K_TO_MS(x) (x/90) //90k counter ==> ms
241
242 //-------------------------------------------------------------------------------------------------
243 // Local Structures
244 //-------------------------------------------------------------------------------------------------
245
246 //-------------------------------------------------------------------------------------------------
247 // Local Functions Prototype
248 //-------------------------------------------------------------------------------------------------
249 static void _HVD_EX_SetShareInfoAddr(MS_U32 u32Id);
250 static HVD_EX_Result _HVD_EX_InitVariables(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams);
251 static HVD_EX_Result _HVD_EX_Check_Cmd(MS_U32 u32Id, HVD_Check_Cmd eCmd);
252 #ifdef VDEC3
253 static HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id, MS_BOOL bFWdecideFB);
254 #else
255 static HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id);
256 #endif
257 static HVD_EX_Result _HVD_EX_SetSyncMode(MS_U32 u32Id, HVD_Sync_Tbl_Type eMode);
258 static HVD_EX_Result _HVD_EX_InitFW_AVC(MS_U32 u32Id);
259 static HVD_EX_Result _HVD_EX_InitFW_RM(MS_U32 u32Id);
260 static HVD_EX_Result _HVD_EX_CheckFWVersion(MS_U32 u32Id);
261 static HVD_EX_Result _HVD_EX_InitFW(MS_U32 u32Id);
262 static MS_BOOL _HVD_EX_IsAllBufferEmpty(MS_U32 u32Id, MS_BOOL bFlush);
263 #ifndef VDEC3
264 static MS_BOOL _HVD_EX_IsAllBufferEmpty_VP8(MS_U32 u32Id);
265 #endif
266 static MS_U8 _HVD_EX_GetDrvId(MS_U32 u32Id);
267
268 #if defined(REDLION_LINUX_KERNEL_ENVI)
269 static MS_S32 _HVD_EX_ISRHandler(void);
270 #else
271 static void _HVD_EX_ISRHandler(void);
272 #endif
273
274 static MS_U32 _HVD_EX_ReportLow32BitPTS(MS_U32 u32Id, MS_U32 u32PTS);
275 static MS_U32 _HVD_EX_Map2HVDErrCode(MS_U32 u32ErrCode);
276 static MS_U32 _HVD_EX_Map2HVDESBufStatus(MS_U32 u32ESBufStatus);
277 static MS_U32 _HVD_EX_GetMIUBase(MS_U8 u8DrvId, MS_U32 u32MIU);
278
279 #if 0
280 //-------------------------------------------------------------------------------------------------
281 // Global Variables
282 //-------------------------------------------------------------------------------------------------
283 MS_U32 u32UartCtrl = (E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_MUST);
284 MS_U32 u32InitSysTimeBase = 0;
285
286 //-------------------------------------------------------------------------------------------------
287 // Local Variables
288 //-------------------------------------------------------------------------------------------------
289 static MSIF_Version _drv_hvd_version =
290 {
291 .DDI = {HVD_DRV_VERSION,},
292 };
293 static MS_BOOL bHVDIsInited;
294 static MS_BOOL bHVDIsIniting;
295 static HVD_EX_DrvInfo DrvInfo;
296 static HVD_EX_Drv_Ctrl gHVDCtrl_EX[HVD_MAX_STREAMS] =
297 {
298 { .bUsed = FALSE,
299 },
300 { .bUsed = FALSE,
301 },
302 };
303
304 static MS_BOOL bHVDIsrAttached = FALSE;
305 #endif
306 MS_U32 u32UartCtrl = (E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_MUST);
307
308 typedef struct
309 {
310 MS_U32 u32InitSysTimeBase[HVD_MAX_STREAMS];
311 MS_BOOL bHVDIsInited[HVD_MAX_STREAMS];
312 MS_BOOL bHVDIsIniting[HVD_MAX_STREAMS];
313 HVD_EX_Drv_Ctrl gHVDCtrl_EX[HVD_MAX_STREAMS];
314 MS_BOOL bCMAUsed;
315 #if defined(SUPPORT_CMA)
316 struct CMA_Pool_Init_Param cmaInitParam[2]; // support two MIU
317 struct CMA_Pool_Free_Param cmaFreeParam[2][HVD_MAX_STREAMS];
318 MS_BOOL bCMATwoMIU[HVD_MAX_STREAMS];
319 #endif
320 MS_BOOL bVPUIsSecureMode;
321 //pre_set
322 HVD_Pre_Ctrl gHVDPreCtrl[HVD_MAX_STREAMS];
323 #ifdef VDEC3
324 MS_BOOL bFWdecideFB;
325 #endif
326 } HVD_Drv_CTX;
327
328 //global variables
329 HVD_Drv_CTX* pHVDDrvContext = NULL;
330 HVD_Drv_CTX gHVDDrvContext;
331 MSIF_Version _drv_hvd_version =
332 {
333 .DDI = {HVD_DRV_VERSION,},
334 };
335 HVD_EX_DrvInfo DrvInfo;
336
337
338 MS_BOOL bHVDIsIsrAttached = FALSE; //check HVD isr already attached, avoid HVD+HVD re-attached
339 MS_BOOL bEVDIsIsrAttached = FALSE; //check EVD isr already attached, avoid EVD+EVD re-attached
340 MS_BOOL bEVDLITEIsIsrAttached = FALSE; //check EVDLITE isr already attached, avoid EVDLITE+EVDLITE re-attached
341 MS_BOOL bHVDDisableISRFlag = TRUE;
342 MS_BOOL bEVDDisableISRFlag = TRUE;
343 MS_BOOL bEVDLITEDisableISRFlag = TRUE;
344
345 //-------------------------------------------------------------------------------------------------
346 // Debug Functions
347 //-------------------------------------------------------------------------------------------------
348
349
350 //-------------------------------------------------------------------------------------------------
351 // Local Functions
352 //-------------------------------------------------------------------------------------------------
_HVD_MapRetEx(HVD_Return eHvd_Ret)353 static HVD_EX_Result _HVD_MapRetEx(HVD_Return eHvd_Ret)
354 {
355 HVD_EX_Result eRes = E_HVD_EX_FAIL;
356 switch(eHvd_Ret)
357 {
358 case E_HVD_RETURN_FAIL : eRes = E_HVD_EX_FAIL;break;
359 case E_HVD_RETURN_SUCCESS : eRes = E_HVD_EX_OK;break;
360 case E_HVD_RETURN_INVALID_PARAMETER : eRes = E_HVD_EX_RET_INVALID_PARAMETER;break;
361 case E_HVD_RETURN_ILLEGAL_ACCESS : eRes = E_HVD_EX_RET_ILLEGAL_ACCESS;break;
362 case E_HVD_RETURN_HARDWARE_BREAKDOWN: eRes = E_HVD_EX_RET_HARDWARE_BREAKDOWN;break;
363 case E_HVD_RETURN_OUTOF_MEMORY : eRes = E_HVD_EX_RET_OUTOF_MEMORY;break;
364 case E_HVD_RETURN_UNSUPPORTED : eRes = E_HVD_EX_RET_UNSUPPORTED;break;
365 case E_HVD_RETURN_TIMEOUT : eRes = E_HVD_EX_RET_TIMEOUT;break;
366 case E_HVD_RETURN_NOTREADY : eRes = E_HVD_EX_RET_NOTREADY;break;
367 case E_HVD_RETURN_MEMORY_OVERWIRTE : eRes = E_HVD_EX_RET_MEMORY_OVERWIRTE;break;
368 case E_HVD_RETURN_ES_FULL : eRes = E_HVD_EX_RET_QUEUE_FULL;break;
369 case E_HVD_RETURN_RE_INIT : eRes = E_HVD_EX_RET_RE_INIT;break;
370 case E_HVD_RETURN_NOT_RUNNING : eRes = E_HVD_EX_RET_NOT_RUNNING;break;
371 default: break;
372 }
373 return eRes;
374 }
375
_HVD_EX_Context_Init(void)376 static void _HVD_EX_Context_Init(void)
377 {
378 return;
379 }
380
_HVD_EX_SetShareInfoAddr(MS_U32 u32Id)381 static void _HVD_EX_SetShareInfoAddr(MS_U32 u32Id)
382 {
383 MS_U32 u32ShmAddr = HAL_VPU_EX_GetSHMAddr();
384
385 HAL_VPU_EX_SetShareInfoAddr(u32Id, u32ShmAddr);
386
387 return;
388 }
389
_HVD_EX_InitVariables(MS_U32 u32Id,HVD_EX_MemCfg * pStMemCfg,HVD_Init_Params * pStInitParams)390 static HVD_EX_Result _HVD_EX_InitVariables(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams)
391 {
392 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
393 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
394
395 memset((void *) pCtrl, 0, sizeof(HVD_EX_Drv_Ctrl));
396 pCtrl->bFrmRateSupported = TRUE;
397
398 // PreSetControl
399 HAL_HVD_EX_SetPreCtrlVariables(u32Id,(MS_VIRT)(&pHVDDrvContext->gHVDPreCtrl[u8DrvId]));
400
401 if (sizeof(HVD_Init_Params) == sizeof(HVD_EX_InitSettings))
402 {
403 HVD_memcpy((void *) &pCtrl->InitParams, pStInitParams, sizeof(HVD_Init_Params));
404 }
405 else
406 {
407 HVD_EX_MSG_ERR("HVD struct define is diff: HVD_Init_Params(%u) vs HVD_Init_Settings(%u)\n",
408 (MS_U32) sizeof(HVD_Init_Params), (MS_U32) sizeof(HVD_EX_InitSettings));
409 return E_HVD_EX_FAIL;
410 }
411
412 // fill memory
413 if (pStMemCfg->u32MIU1BaseAddr == 0)
414 {
415 // Get physical address from MIU selection= E_CHIP_MIU_2 and offset=0x10000000
416 _miu_offset_to_phy(E_CHIP_MIU_1, 0, pCtrl->MemMap.u32MIU1BaseAddr);
417 _miu_offset_to_phy(E_CHIP_MIU_2, 0, pCtrl->MemMap.u32MIU2BaseAddr);
418
419 }
420 else
421 {
422 pCtrl->MemMap.u32MIU1BaseAddr = pStMemCfg->u32MIU1BaseAddr; /// TODO : pStMemCfg need member u32MIU2BaseAddr
423 }
424
425 pCtrl->MemMap.eFWSourceType = (HVD_FWInputSourceType) pStMemCfg->eFWSourceType;
426 pCtrl->MemMap.u32FWBinaryVAddr = pStMemCfg->u32FWBinaryVAddr;
427 pCtrl->MemMap.u32FWBinaryAddr = (MS_U32) pStMemCfg->u32FWBinaryAddr;
428 pCtrl->MemMap.u32FWBinarySize = pStMemCfg->u32FWBinarySize;
429 pCtrl->MemMap.u32VLCBinaryVAddr = pStMemCfg->u32VLCBinaryVAddr;
430 pCtrl->MemMap.u32VLCBinaryAddr = (MS_U32) pStMemCfg->u32VLCBinaryAddr;
431 pCtrl->MemMap.u32VLCBinarySize = pStMemCfg->u32VLCBinarySize;
432 pCtrl->MemMap.u32CodeBufVAddr = pStMemCfg->u32CodeBufVAddr;
433 pCtrl->MemMap.u32CodeBufAddr = (MS_U32) pStMemCfg->u32CodeBufAddr;
434 pCtrl->MemMap.u32CodeBufSize = pStMemCfg->u32CodeBufSize;
435 pCtrl->MemMap.u32FrameBufVAddr = pStMemCfg->u32FrameBufVAddr;
436 pCtrl->MemMap.u32FrameBufAddr = (MS_U32) pStMemCfg->u32FrameBufAddr;
437 pCtrl->MemMap.u32FrameBufSize = pStMemCfg->u32FrameBufSize;
438 #ifdef VDEC3
439 pCtrl->MemMap.u32TotalBitstreamBufAddr = pStMemCfg->u32TotalBitstreamBufAddr;
440 pCtrl->MemMap.u32TotalBitstreamBufSize = pStMemCfg->u32TotalBitstreamBufSize;
441 #endif
442
443 #if HVD_ENABLE_MVC
444 if (((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC) &&
445 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_DUAL_ES_MASK) == HVD_INIT_DUAL_ES_ENABLE))
446 {
447 HVD_EX_Drv_Ctrl *pDrvCtrl_sub = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]);
448 memset((void *) pDrvCtrl_sub, 0, sizeof(HVD_EX_Drv_Ctrl));
449
450 /// Copy to sub view ctrl
451 HVD_memcpy((void *) &pDrvCtrl_sub->InitParams, pStInitParams, sizeof(HVD_Init_Params));
452
453 // fill memory
454 if (pStMemCfg->u32MIU1BaseAddr == 0)
455 {
456 _miu_offset_to_phy(E_CHIP_MIU_1, 0, pDrvCtrl_sub->MemMap.u32MIU1BaseAddr);
457 _miu_offset_to_phy(E_CHIP_MIU_2, 0, pDrvCtrl_sub->MemMap.u32MIU2BaseAddr);
458 }
459 else
460 {
461 pDrvCtrl_sub->MemMap.u32MIU1BaseAddr = pStMemCfg->u32MIU1BaseAddr; /// TODO : pStMemCfg need member u32MIU2BaseAddr
462 }
463
464 pCtrl->MemMap.u32BitstreamBufVAddr= pStMemCfg->u32BitstreamBufVAddr;
465 pCtrl->MemMap.u32BitstreamBufAddr = (MS_PHY) pStMemCfg->u32BitstreamBufAddr ;
466 #if 1
467 pCtrl->MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize/2 ;
468 pDrvCtrl_sub->MemMap.u32BitstreamBufVAddr = pStMemCfg->u32BitstreamBufVAddr + pStMemCfg->u32BitstreamBufSize/2;
469 pDrvCtrl_sub->MemMap.u32BitstreamBufAddr = (MS_PHY) pStMemCfg->u32BitstreamBufAddr + pStMemCfg->u32BitstreamBufSize/2;
470 pDrvCtrl_sub->MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize/2 ;
471 #else
472 pCtrl->MemMap.u32BitstreamBufSize = (pStMemCfg->u32BitstreamBufSize*57/128) ;
473 pDrvCtrl_sub->MemMap.u32BitstreamBufVAddr = pStMemCfg->u32BitstreamBufVAddr + (pStMemCfg->u32BitstreamBufSize*57/128);
474 pDrvCtrl_sub->MemMap.u32BitstreamBufAddr = (MS_PHY) pStMemCfg->u32BitstreamBufAddr + (pStMemCfg->u32BitstreamBufSize*57/128);
475 pDrvCtrl_sub->MemMap.u32BitstreamBufSize = (pStMemCfg->u32BitstreamBufSize*71/128) ;
476 #endif
477
478 pCtrl->MemMap.u32DrvProcessBufVAddr = pDrvCtrl_sub->MemMap.u32DrvProcessBufVAddr = pStMemCfg->u32DrvProcessBufVAddr;
479 pCtrl->MemMap.u32DrvProcessBufAddr = pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr = (MS_PHY) pStMemCfg->u32DrvProcessBufAddr;
480 pCtrl->MemMap.u32DrvProcessBufSize = pDrvCtrl_sub->MemMap.u32DrvProcessBufSize = pStMemCfg->u32DrvProcessBufSize;
481
482 pDrvCtrl_sub->MemMap.u32CodeBufVAddr = pStMemCfg->u32CodeBufVAddr;
483 pDrvCtrl_sub->MemMap.u32CodeBufAddr = (MS_PHY) pStMemCfg->u32CodeBufAddr;
484 pDrvCtrl_sub->MemMap.u32CodeBufSize = pStMemCfg->u32CodeBufSize;
485
486 HVD_EX_MSG_INF("[MVC] Bitstream buffer: 1st = [0x%lx, 0x%lx, 0x%lx], 2nd = [0x%lx, 0x%lx, 0x%lx].\n",
487 (unsigned long) pCtrl->MemMap.u32BitstreamBufVAddr,
488 (unsigned long)pCtrl->MemMap.u32BitstreamBufAddr,
489 (unsigned long)pCtrl->MemMap.u32BitstreamBufSize,
490 (unsigned long) pDrvCtrl_sub->MemMap.u32BitstreamBufVAddr,
491 (unsigned long)pDrvCtrl_sub->MemMap.u32BitstreamBufAddr,
492 (unsigned long)pDrvCtrl_sub->MemMap.u32BitstreamBufSize);
493 }
494 else
495 #endif
496 {
497 pCtrl->MemMap.u32BitstreamBufVAddr = pStMemCfg->u32BitstreamBufVAddr;
498 pCtrl->MemMap.u32BitstreamBufAddr = (MS_U32) pStMemCfg->u32BitstreamBufAddr;
499 pCtrl->MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize;
500 pCtrl->MemMap.u32DrvProcessBufVAddr = pStMemCfg->u32DrvProcessBufVAddr;
501 pCtrl->MemMap.u32DrvProcessBufAddr = (MS_U32) pStMemCfg->u32DrvProcessBufAddr;
502 pCtrl->MemMap.u32DrvProcessBufSize = pStMemCfg->u32DrvProcessBufSize;
503 }
504
505 HVD_EX_MSG_INF("HVD mmap: MIU1base:0x%lx, MIU2base:0x%lx,FW(type:%d addr=0x%lx size=0x%x), VLC(addr=0x%lx size=0x%x), Code(addr=0x%lx size=0x%x), FB(addr=0x%lx size=0x%x), Bit(addr=0x%lx size=0x%x), Drv(addr=0x%lx size=0x%x)\n",
506 (unsigned long)pCtrl->MemMap.u32MIU1BaseAddr,
507 (unsigned long)pCtrl->MemMap.u32MIU2BaseAddr,
508 pCtrl->MemMap.eFWSourceType, (unsigned long)pCtrl->MemMap.u32FWBinaryAddr, pCtrl->MemMap.u32FWBinarySize,
509 (unsigned long)pCtrl->MemMap.u32VLCBinaryAddr, pCtrl->MemMap.u32VLCBinarySize,
510 (unsigned long)pCtrl->MemMap.u32CodeBufAddr, pCtrl->MemMap.u32CodeBufSize,
511 (unsigned long)pCtrl->MemMap.u32FrameBufAddr, pCtrl->MemMap.u32FrameBufSize,
512 (unsigned long)pCtrl->MemMap.u32BitstreamBufAddr, pCtrl->MemMap.u32BitstreamBufSize,
513 (unsigned long)pCtrl->MemMap.u32DrvProcessBufAddr, pCtrl->MemMap.u32DrvProcessBufSize);
514
515 pCtrl->InitParams.u16DecoderClock = HAL_HVD_EX_GetCorretClock(pStInitParams->u16DecoderClock);
516 pCtrl->InitParams.u16ChipECONum = (MS_U16)MDrv_SYS_GetChipRev();
517
518
519 HVD_EX_MSG_INF("[VDEC]pCtrl->InitParams.u16ChipECONum : %d \n ", pCtrl->InitParams.u16ChipECONum);
520
521 MS_U32 i;
522 pCtrl->CloseCaptionInfo.u8ParsingStatus = 0xff;
523 pCtrl->CloseCaptionInfo.u8BufMiuSel[0] = pCtrl->CloseCaptionInfo.u8BufMiuSel[1] = E_CHIP_MIU_0;
524 pCtrl->CloseCaptionInfo.b708Enable = FALSE;
525 pCtrl->CloseCaptionInfo.u32FWUsrDataRIdx = pCtrl->CloseCaptionInfo.u32FWUsrDataWIdx = 0;
526 pCtrl->CloseCaptionInfo.u32PktLen708 = 0;
527 pCtrl->CloseCaptionInfo.u32PktHdrAddr708 = 0;
528
529
530 for (i=0;i<2;i++)
531 {
532 pCtrl->CloseCaptionInfo.u32RingBufStartPAddr[i] = 0;
533 pCtrl->CloseCaptionInfo.u32RingBufLen[i] = 0;
534 pCtrl->CloseCaptionInfo.u32RingBufVacancy[i] = 0;
535 pCtrl->CloseCaptionInfo.u32RingBufRPAddr[i] = 0;
536 pCtrl->CloseCaptionInfo.u32RingBufWPAddr[i] = 0;
537 pCtrl->CloseCaptionInfo.bOverFlow[i] = FALSE;
538 }
539
540 pCtrl->CloseCaptionInfo.b608InfoEnhance = FALSE;
541
542 #if HVD_ENABLE_STOP_ACCESS_OVER_256
543 pCtrl->bCannotAccessMIU256 = TRUE;
544 #endif
545
546 pCtrl->bAutoRmLastZeroByte = TRUE;
547 pCtrl->u32CmdTimeout = HVD_FW_CMD_TIMEOUT_DEFAULT;
548
549 if (pStInitParams->u8TurboInit & E_HVD_EX_TURBOINIT_FW_RELOAD)
550 {
551 pCtrl->bTurboFWMode = TRUE;
552 }
553
554 HAL_HVD_EX_SetMiuBurstLevel(pCtrl, E_HVD_BURST_CNT_DISABLE);
555
556 pCtrl->u32FlushRstPtr = 0;
557
558 return E_HVD_EX_OK;
559 }
560
_HVD_EX_Check_Cmd(MS_U32 u32Id,HVD_Check_Cmd eCmd)561 static HVD_EX_Result _HVD_EX_Check_Cmd(MS_U32 u32Id, HVD_Check_Cmd eCmd)
562 {
563 MS_U32 u32Tmp0 = 0;
564 MS_U32 u32Tmp1 = 0;
565 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
566
567 switch (eCmd)
568 {
569 case E_HVD_CHECK_CMD_INIT:
570 {
571 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_CHECK))
572 {
573 // Check mode
574 u32Tmp0 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK;
575
576 if (!MDrv_HVD_EX_GetCaps((HVD_EX_Codec) u32Tmp0))
577 {
578 HVD_EX_MSG_ERR("Init: HW not support type:%d\n", eCmd);
579 return E_HVD_EX_RET_UNSUPPORTED;
580 }
581
582 u32Tmp0 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
583
584 if (u32Tmp0 == HVD_INIT_MAIN_LIVE_STREAM)
585 {
586 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_DRV)
587 {
588 HVD_EX_MSG_ERR("Init: Live stream mode can not use Drv input\n");
589 return E_HVD_EX_RET_INVALID_PARAMETER;
590 }
591 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI | HVD_INIT_DBG_FW)))
592 {
593 // need not to check this under debug mode
594 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK) ==
595 HVD_INIT_START_CODE_REMOVED)
596 {
597 HVD_EX_MSG_ERR("Init: Live stream mode must have start code\n");
598 return E_HVD_EX_RET_INVALID_PARAMETER;
599 }
600 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON)
601 {
602 HVD_EX_MSG_ERR("Init: Live stream mode can not use none ATS sync mode\n");
603 return E_HVD_EX_RET_INVALID_PARAMETER;
604 }
605 }
606 }
607 else if ((u32Tmp0 == HVD_INIT_MAIN_FILE_RAW) || (u32Tmp0 == HVD_INIT_MAIN_FILE_TS))
608 {
609 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI | HVD_INIT_DBG_FW)))
610 {
611 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_DTS)
612 && (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_STS)
613 && (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_PTS)
614 && (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON))
615 {
616 HVD_EX_MSG_ERR("Init: sync mode is not set. use default value:%d\n",
617 (MS_U16) E_HVD_SYNC_TBL_TYPE_PTS);
618 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType = E_HVD_SYNC_TBL_TYPE_PTS;
619 }
620 }
621 }
622 else if ((u32Tmp0 != HVD_INIT_MAIN_FILE_RAW) && (u32Tmp0 != HVD_INIT_MAIN_FILE_TS))
623 {
624 HVD_EX_MSG_ERR("Init: main type can not be recognized:%d\n", u32Tmp0);
625 return E_HVD_EX_RET_INVALID_PARAMETER;
626 }
627
628 // check memory map
629 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr == 0)
630 {
631 HVD_EX_MSG_ERR("Init: MIU 1 Base addr should not be zero\n");
632 return E_HVD_EX_RET_INVALID_PARAMETER;
633 }
634
635 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr & 0x7FF) != 0)
636 {
637 HVD_EX_MSG_ERR("Init: Error HVD code address(0x%lx) must 2048 byte alignment\n",
638 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr);
639 return E_HVD_EX_RET_INVALID_PARAMETER;
640 }
641 }
642
643 u32Tmp0 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
644 u32Tmp1 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK;
645
646 if (u32Tmp0 != HVD_INIT_MAIN_LIVE_STREAM)
647 {
648 if (u32Tmp1 == HVD_INIT_INPUT_DRV)
649 {
650 // check if driver process buffer is in bitstream buffer.
651 MS_U32 tmpAddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr;
652
653 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr == 0)
654 {
655 HVD_EX_MSG_ERR("Init: Drv process buffer address should not be zero\n");
656 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
657 //return E_HVD_EX_RET_INVALID_PARAMETER;
658 }
659
660 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr > tmpAddr)
661 || (tmpAddr >
662 (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr +
663 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufSize)))
664 {
665 HVD_EX_MSG_ERR
666 ("Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or MP4) and Drv input.\n");
667 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
668 //return E_HVD_EX_RET_INVALID_PARAMETER;
669 }
670
671 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize
672 <
673 (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) +
674 8))
675 {
676 HVD_EX_MSG_ERR
677 ("Init: File mode(TS or MP4) and Drv input must set the process buffer size and must be larger than %u Bytes:%d\n",
678 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize,
679 (MS_U32) (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF +
680 (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) + 8));
681 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
682 //return E_HVD_EX_RET_OUTOF_MEMORY;
683 }
684
685 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize > 1)
686 {
687 tmpAddr =
688 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr +
689 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize - 1;
690 }
691 else
692 {
693 tmpAddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr;
694 }
695
696 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr > tmpAddr)
697 || (tmpAddr >
698 (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr +
699 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufSize)))
700 {
701 HVD_EX_MSG_ERR
702 ("Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or PS) and Drv input.\n");
703 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
704 //return E_HVD_EX_RET_INVALID_PARAMETER;
705 }
706 }
707 else
708 {
709 // TODO: check if the TSP MIU sel is the same with the MIU lacation of process buffer.
710 }
711 }
712 break;
713 }
714 case E_HVD_CHECK_CMD_SEEK2PTS:
715 case E_HVD_CHECK_CMD_TRIGGER_DISP:
716 {
717 #if 0
718 if (MDrv_HVD_EX_GetPlayMode(E_HVD_EX_GMODE_IS_SYNC_ON))
719 {
720 HVD_EX_MSG_ERR("Cmd type:%d Sync Active: %lx\n", (MS_U16) eCmd,
721 (MS_S32) MDrv_HVD_EX_GetPlayMode(E_HVD_EX_GMODE_IS_SYNC_ON));
722 return E_HVD_EX_RET_ILLEGAL_ACCESS;
723 }
724 #endif
725 break;
726 }
727 default:
728 return E_HVD_EX_OK;
729 }
730
731 return E_HVD_EX_OK;
732 }
733 #ifdef VDEC3
_HVD_EX_InitRegCPU(MS_U32 u32Id,MS_BOOL bFWdecideFB)734 HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id, MS_BOOL bFWdecideFB)
735 #else
736 HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id)
737 #endif
738 {
739 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
740
741 // check MIU select
742 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_CHECK))
743 {
744 HAL_HVD_EX_CheckMIUSel(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_UTOPIA_ENVI);
745 }
746 #ifdef VDEC3
747 return (HVD_EX_Result) HAL_HVD_EX_InitRegCPU(u32Id,bFWdecideFB);
748 #else
749 return (HVD_EX_Result) HAL_HVD_EX_InitRegCPU(u32Id);
750 #endif
751 }
752
_HVD_EX_RstVariables(MS_U32 u32Id)753 static HVD_EX_Result _HVD_EX_RstVariables(MS_U32 u32Id)
754 {
755 //MS_BOOL bBitMIU1 = FALSE;
756 //MS_BOOL bCodeMIU1 = FALSE;
757 MS_U8 u8BitMiuSel;
758 MS_U32 u32BitStartOffset;
759 MS_U8 u8CodeMiuSel;
760 MS_U32 u32CodeStartOffset;
761 MS_U8 u8FrmMiuSel;
762 MS_U32 u32FrmStartOffset;
763 MS_U8 u8DrvProccMiuSel;
764 MS_U32 u32DrvProccStartOffset;
765 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
766 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
767
768 // Init control flg
769 pCtrl->u32CtrlMode = 0;
770
771 #if 1
772 _phy_to_miu_offset(u8CodeMiuSel, u32CodeStartOffset, pCtrl->MemMap.u32CodeBufAddr);
773 pCtrl->u8CodeMiuSel = u8CodeMiuSel;
774 _phy_to_miu_offset(u8BitMiuSel, u32BitStartOffset, pCtrl->MemMap.u32BitstreamBufAddr);
775 pCtrl->u8ESMiuSel = u8BitMiuSel;
776 _phy_to_miu_offset(u8FrmMiuSel, u32FrmStartOffset, pCtrl->MemMap.u32FrameBufAddr);
777 pCtrl->u8FrmMiuSel = u8FrmMiuSel;
778 pCtrl->u8Frm2MiuSel = u8FrmMiuSel;
779 _phy_to_miu_offset(u8DrvProccMiuSel, u32DrvProccStartOffset, pCtrl->MemMap.u32DrvProcessBufAddr);
780 pCtrl->u8DrvProccMiuSel = u8DrvProccMiuSel;
781 #else
782 if (pCtrl->MemMap.u32CodeBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
783 {
784 pCtrl->u32CtrlMode |= HVD_CTRL_CODE_MIU_1;
785 bCodeMIU1 = TRUE;
786 }
787
788 if (pCtrl->MemMap.u32BitstreamBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
789 {
790 pCtrl->u32CtrlMode |= HVD_CTRL_ES_MIU_1;
791 bBitMIU1 = TRUE;
792 }
793
794 if (pCtrl->MemMap.u32FrameBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
795 {
796 pCtrl->u32CtrlMode |= HVD_CTRL_FRM_MIU_1;
797 }
798
799 if (pCtrl->MemMap.u32DrvProcessBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
800 {
801 pCtrl->u32CtrlMode |= HVD_CTRL_DRVPROCC_MIU_1;
802 }
803 #endif
804
805 if (!pCtrl->bNoDrvProccBuf)
806 {
807 // init nal table buffer start address.
808 if ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
809 {
810 if (u8BitMiuSel != u8CodeMiuSel)
811 {
812 #if HVD_ENABLE_MVC
813 if( ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC) &&
814 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_DUAL_ES_MASK) == HVD_INIT_DUAL_ES_ENABLE) &&
815 (pCtrl->MemMap.u32DrvProcessBufSize > (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB)<<1 ) <<3) + 8) ))
816 {
817 pCtrl->u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF;
818 if( (( pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr) % 8) != 0)
819 {
820 pCtrl->u32BBUTblInBitstreamBufAddr = pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr + 7;
821 pCtrl->u32BBUTblInBitstreamBufAddr -= (pCtrl->u32BBUTblInBitstreamBufAddr ) % 8;
822 pCtrl->u32BBUTblInBitstreamBufAddr -= pCtrl->MemMap.u32DrvProcessBufAddr;
823 HVD_EX_MSG_ERR("Nal table in bitstream buffer start address is not aligned. old:%lx new:%lx" , (unsigned long) HVD_BBU_ST_ADDR_IN_BITSTREAMBUF, (unsigned long) pCtrl->u32BBUTblInBitstreamBufAddr );
824 }
825
826 /// Setting BBU for MVC dual bbu input
827 HVD_EX_Drv_Ctrl *pDrvCtrl_sub = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]);
828 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3); //// need to check
829 if( (( pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr + pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr) % 8) != 0)
830 {
831 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr = pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr + pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr + 7;
832 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr -= (pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr ) % 8;
833 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr -= pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr;
834 HVD_EX_MSG_ERR("[MVC]: Nal table in bitstream buffer start address is not aligned. old:%lx new:%lx" , (unsigned long) HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) , (unsigned long) pCtrl->u32BBUTblInBitstreamBufAddr);
835 }
836
837 }
838 else
839 #endif
840 if (pCtrl->MemMap.u32DrvProcessBufSize >
841 (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) + 8)))
842 {
843 pCtrl->u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF;
844
845 if (((pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr) % 8) != 0)
846 {
847 pCtrl->u32BBUTblInBitstreamBufAddr =
848 pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr + 7;
849 pCtrl->u32BBUTblInBitstreamBufAddr -= (pCtrl->u32BBUTblInBitstreamBufAddr) % 8;
850 pCtrl->u32BBUTblInBitstreamBufAddr -= pCtrl->MemMap.u32DrvProcessBufAddr;
851 HVD_EX_MSG_ERR
852 ("Nal table in bitstream buffer start address is not aligned. old:%x new:%x",
853 (MS_U32) HVD_BBU_ST_ADDR_IN_BITSTREAMBUF, pCtrl->u32BBUTblInBitstreamBufAddr);
854 }
855 }
856 else
857 {
858 HVD_EX_MSG_ERR
859 ("Driver process buffer size is not enough for driver input path. input:%x required:%lx",
860 (MS_U32) pCtrl->MemMap.u32DrvProcessBufSize,
861 (unsigned long)(HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) +
862 8));
863 return E_HVD_EX_RET_OUTOF_MEMORY;
864 }
865 }
866 }
867
868 // init AVI NULL packet pattern && RM flush pattern
869 if ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
870 {
871 MS_U8 *pNULLPattern = NULL;
872 pCtrl->u32NULLPacketAddr = pCtrl->MemMap.u32DrvProcessBufAddr;
873 // TODO: use other non-cachable VA addr
874 //Use shared memory instead of f/w code buffer.
875 pNULLPattern = (MS_U8 *) HAL_HVD_EX_GetShmAddr(u32Id);
876 if(pNULLPattern == NULL)
877 {
878 HVD_EX_MSG_ERR("########## VDEC patch for Debug %s %d###########\n", __FUNCTION__, __LINE__);
879 return E_HVD_EX_FAIL;
880 }
881 memset((void *) pNULLPattern, 0, 12);
882
883 switch ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
884 {
885 case HVD_INIT_HW_AVC:
886 case HVD_INIT_HW_AVS:
887 case HVD_INIT_HW_MVC:
888 #if SUPPORT_EVD
889 case HVD_INIT_HW_VP9: // MStar VP9 or G2 VP9
890 case HVD_INIT_HW_HEVC:
891 #endif
892 {
893 if (pCtrl->InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK)
894 {
895 // start code removed
896 pCtrl->u32NULLPacketSize = 8;
897
898 if (pCtrl->MemMap.u32DrvProcessBufSize < pCtrl->u32NULLPacketSize)
899 {
900 return E_HVD_EX_RET_OUTOF_MEMORY;
901 }
902
903 memset((void *) pNULLPattern, 0xAA, pCtrl->u32NULLPacketSize);
904 pNULLPattern[4] = 0X55;
905 }
906 else // start code remained
907 {
908 pCtrl->u32NULLPacketSize = 12;
909
910 if (pCtrl->MemMap.u32DrvProcessBufSize < pCtrl->u32NULLPacketSize)
911 {
912 return E_HVD_EX_RET_OUTOF_MEMORY;
913 }
914
915 memset((void *) pNULLPattern, 0xAA, pCtrl->u32NULLPacketSize);
916
917 pNULLPattern[0] = 0;
918 pNULLPattern[1] = 0;
919 pNULLPattern[2] = 1;
920 pNULLPattern[3] = 0xFF;
921 pNULLPattern[8] = 0X55;
922 }
923
924 //if (bBitMIU1 != bCodeMIU1)
925 if(u8BitMiuSel != u8CodeMiuSel)
926 {
927 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
928 HAL_HVD_EX_FlushMemory();
929 HVD_dmacpy(pCtrl->MemMap.u32DrvProcessBufAddr, pCtrl->MemMap.u32CodeBufAddr,
930 pCtrl->u32NULLPacketSize);
931 #else
932 HVD_memcpy((void *) (pCtrl->MemMap.u32DrvProcessBufVAddr), pNULLPattern,
933 pCtrl->u32NULLPacketSize);
934 HAL_HVD_EX_FlushMemory();
935 #endif
936 }
937 else
938 {
939 HVD_memcpy((void *) (pCtrl->MemMap.u32DrvProcessBufVAddr), pNULLPattern,
940 pCtrl->u32NULLPacketSize);
941 HAL_HVD_EX_FlushMemory();
942 }
943
944 break;
945 }
946 case HVD_INIT_HW_RM:
947 {
948 // RM has no NULL packet
949 pCtrl->u32NULLPacketSize = 0;
950 pCtrl->u32NULLPacketAddr = 0;
951 #if HVD_ENABLE_RV_FEATURE
952 pCtrl->u32RV_FlushPacketAddr = pCtrl->MemMap.u32DrvProcessBufAddr;
953 pCtrl->u32RV_FlushPacketSize = 8;
954
955 if (pCtrl->MemMap.u32DrvProcessBufSize < pCtrl->u32RV_FlushPacketSize)
956 {
957 return E_HVD_EX_RET_OUTOF_MEMORY;
958 }
959 memset((void *) pNULLPattern, 0xFF, pCtrl->u32RV_FlushPacketSize);
960 {
961 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
962 HAL_HVD_EX_FlushMemory();
963 HVD_dmacpy(pCtrl->MemMap.u32DrvProcessBufAddr, pCtrl->MemMap.u32CodeBufAddr,
964 pCtrl->u32RV_FlushPacketSize);
965 #else
966 HVD_memcpy((void *) (pCtrl->MemMap.u32DrvProcessBufVAddr), pNULLPattern,
967 pCtrl->u32RV_FlushPacketSize);
968 HAL_HVD_EX_FlushMemory();
969 #endif
970 }
971 #endif
972 break;
973 }
974 default:
975 pCtrl->u32NULLPacketSize = 0;
976 pCtrl->u32NULLPacketAddr = 0;
977 break;
978 }
979 }
980 else
981 {
982 pCtrl->u32NULLPacketSize = 0;
983 pCtrl->u32NULLPacketAddr = 0;
984 }
985 }
986
987 // reset other driver control variables
988 pCtrl->u32StepDecodeCnt = 0;
989 pCtrl->u32LastESRptr = 0;
990 pCtrl->u32BBUPacketCnt = 0;
991 pCtrl->u32BBUWptr_Fired = 0;
992 pCtrl->u32LastErrCode = 0;
993 pCtrl->bIsDispInfoChg = 0;
994
995 memset((void *) &(pCtrl->LastNal), 0, sizeof(HVD_Nal_Entry));
996 memset((void *) &(pCtrl->LivingStatus), 0, sizeof(HVD_Alive_Status));
997
998 #if HVD_ENABLE_MVC
999 if((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
1000 {
1001 /// TODO: MVC want to used 2nd HVDCtrl data.
1002 //u8DrvId = _HVD_EX_GetDrvId(u32Id);
1003 //pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId + 1]);
1004 HVD_EX_Drv_Ctrl *pDrvCtrl_sub = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]);
1005
1006 pDrvCtrl_sub->u32StepDecodeCnt = 0;
1007 pDrvCtrl_sub->u32LastESRptr = 0;
1008 pDrvCtrl_sub->u32BBUPacketCnt = 0;
1009 pDrvCtrl_sub->u32BBUWptr_Fired = 0;
1010 pDrvCtrl_sub->u32LastErrCode = 0;
1011 pDrvCtrl_sub->bIsDispInfoChg = 0;
1012
1013 memset((void *) &(pDrvCtrl_sub->LastNal), 0, sizeof(HVD_Nal_Entry));
1014
1015 pDrvCtrl_sub->bNoDrvProccBuf = pCtrl->bNoDrvProccBuf;
1016 pDrvCtrl_sub->bAutoRmLastZeroByte = pCtrl->bAutoRmLastZeroByte;
1017 pDrvCtrl_sub->bCannotAccessMIU256 = pCtrl->bCannotAccessMIU256;
1018 pDrvCtrl_sub->u32CmdTimeout = pCtrl->u32CmdTimeout;
1019 pDrvCtrl_sub->u32CtrlMode = pCtrl->u32CtrlMode;
1020 pDrvCtrl_sub->u32DummyWriteBuf = pCtrl->u32DummyWriteBuf;
1021 pDrvCtrl_sub->u32NULLPacketSize = pCtrl->u32NULLPacketSize;
1022 pDrvCtrl_sub->u32NULLPacketAddr = pCtrl->u32NULLPacketAddr;
1023 }
1024 #endif
1025 // Init HAL variables
1026 return (HVD_EX_Result) HAL_HVD_EX_InitVariables(u32Id);
1027 }
1028
1029 //-----------------------------------------------------------------------------
1030 /// @brief \b Function \b Name: _HVD_EX_SetSyncMode()
1031 /// @brief \b Function \b Description: specify the way to sync video time stamp and STC.
1032 /// @param -eMode \b IN : sync type
1033 /// @param -u32Arg \b IN : only work under (eMode == E_HVD_EX_SYNC_ATS) , video delay toward Audio time stamp. It's minimun value is 0, and maximun value is 4500 ( unit:ms)
1034 /// @return -The result of command set sync type
1035 //-----------------------------------------------------------------------------
_HVD_EX_SetSyncMode(MS_U32 u32Id,HVD_Sync_Tbl_Type eMode)1036 static HVD_EX_Result _HVD_EX_SetSyncMode(MS_U32 u32Id, HVD_Sync_Tbl_Type eMode)
1037 {
1038 HVD_EX_Result eRet = E_HVD_EX_OK;
1039 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1040
1041 _DRV_HVD_EX_Entry(u8DrvId);
1042
1043 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_TYPE, eMode);
1044
1045 _DRV_HVD_EX_RET(u8DrvId, eRet);
1046 }
1047
_HVD_EX_InitFW_AVC(MS_U32 u32Id)1048 static HVD_EX_Result _HVD_EX_InitFW_AVC(MS_U32 u32Id)
1049 {
1050 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1051 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1052 MS_U32 u32InitMode = pCtrl->InitParams.u32ModeFlag;
1053
1054 // common settings
1055 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1056 {
1057 _HVD_EX_SetSyncMode(u32Id, (HVD_Sync_Tbl_Type) pCtrl->InitParams.u8SyncType);
1058
1059 if (pCtrl->InitParams.u8MinFrmGap)
1060 {
1061 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_MIN_FRAME_GAP, pCtrl->InitParams.u8MinFrmGap);
1062 }
1063
1064 if (pCtrl->InitParams.u32MaxDecTick)
1065 {
1066 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_MAX_DEC_TICK, pCtrl->InitParams.u32MaxDecTick);
1067 }
1068
1069 if (pCtrl->InitParams.u16Pitch)
1070 {
1071 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PITCH, pCtrl->InitParams.u16Pitch);
1072 }
1073
1074 if (pCtrl->InitParams.bSyncEachFrm)
1075 {
1076 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_EACH_FRM, TRUE);
1077 }
1078
1079 if (pCtrl->InitParams.bFastDisplay)
1080 {
1081 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FAST_DISP, TRUE);
1082 }
1083
1084 if (pCtrl->InitParams.bDynamicScaling)
1085 {
1086 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE, TRUE);
1087 }
1088
1089 if (pCtrl->InitParams.bUserData)
1090 {
1091 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DPO_CC, TRUE);
1092 }
1093 }
1094
1095 if (pCtrl->InitParams.u8TimeUnit)
1096 {
1097 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_TIME_UNIT_TYPE, pCtrl->InitParams.u8TimeUnit);
1098 }
1099
1100 // specific settings
1101 switch (u32InitMode & HVD_INIT_MAIN_MASK)
1102 {
1103 case HVD_INIT_MAIN_FILE_RAW:
1104 {
1105 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_VDEAD, TRUE);
1106 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, TRUE);
1107 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1108
1109 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1110 {
1111 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
1112 }
1113
1114 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PARSER_BYPASS, TRUE);
1115 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_GET_MORE_FRM_BUF, TRUE);
1116
1117 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, TRUE);
1118 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, TRUE);
1119 break;
1120 }
1121 case HVD_INIT_MAIN_FILE_TS:
1122 {
1123 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_VDEAD, TRUE);
1124 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, TRUE);
1125 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1126
1127 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1128 {
1129 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
1130 }
1131
1132 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, TRUE);
1133 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVOID_PTS_TBL_OVERFLOW, TRUE);
1134
1135 if((u32InitMode & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
1136 {
1137 HAL_HVD_EX_SpareBandwidth(u32Id); //// For MVC
1138 }
1139 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, TRUE);
1140 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, TRUE);
1141 break;
1142 }
1143 case HVD_INIT_MAIN_LIVE_STREAM:
1144 {
1145 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, TRUE);
1146 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1147
1148 if (pCtrl->InitParams.u8TimeUnit)
1149 {
1150 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32) HVD_DTV_VIDEO_DELAY);
1151 }
1152 else
1153 {
1154 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32) HVD_DTV_VIDEO_DELAY * 90);
1155 }
1156
1157 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, TRUE);
1158
1159 break;
1160 }
1161 default:
1162 break;
1163 }
1164
1165 return E_HVD_EX_OK;
1166 }
1167
_HVD_EX_InitFW_RM(MS_U32 u32Id)1168 static HVD_EX_Result _HVD_EX_InitFW_RM(MS_U32 u32Id)
1169 {
1170 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1171 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1172 MS_U32 u32InitMode = pCtrl->InitParams.u32ModeFlag;
1173
1174 // common settings
1175 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1176 {
1177 _HVD_EX_SetSyncMode(u32Id, (HVD_Sync_Tbl_Type) pCtrl->InitParams.u8SyncType);
1178
1179 if (pCtrl->InitParams.u16Pitch)
1180 {
1181 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PITCH, pCtrl->InitParams.u16Pitch);
1182 }
1183
1184 if (pCtrl->InitParams.bSyncEachFrm)
1185 {
1186 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_EACH_FRM, TRUE);
1187 }
1188
1189 if (pCtrl->InitParams.bFastDisplay)
1190 {
1191 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FAST_DISP, TRUE);
1192 }
1193
1194 if (pCtrl->InitParams.bDynamicScaling)
1195 {
1196 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE, TRUE);
1197 }
1198 }
1199
1200 if (pCtrl->InitParams.u8TimeUnit)
1201 {
1202 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_TIME_UNIT_TYPE, pCtrl->InitParams.u8TimeUnit);
1203 }
1204
1205 // specific settings
1206 switch (u32InitMode & HVD_INIT_MAIN_MASK)
1207 {
1208 case HVD_INIT_MAIN_FILE_RAW:
1209 break;
1210 case HVD_INIT_MAIN_FILE_TS:
1211 case HVD_INIT_MAIN_LIVE_STREAM:
1212 default:
1213 break;
1214 }
1215
1216 // fix FFx4 display error
1217 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1218
1219 return E_HVD_EX_OK;
1220 }
1221
_HVD_EX_CheckFWVersion(MS_U32 u32Id)1222 static HVD_EX_Result _HVD_EX_CheckFWVersion(MS_U32 u32Id)
1223 {
1224 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1225 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1226
1227 // check FW version ID
1228 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_CHECK))
1229 {
1230 if ((HVD_FW_IF_VERSION >> 16) != (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_IF_VERSION_ID) >> 16))
1231 {
1232 HVD_EX_MSG_ERR("fw interface and binary is not the same. fw ID: interface:%x binary:%lx\n",
1233 (MS_U32) HVD_FW_IF_VERSION, (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_IF_VERSION_ID));
1234 return E_HVD_EX_FAIL;
1235 }
1236 }
1237
1238 return E_HVD_EX_OK;
1239 }
1240
_HVD_EX_InitFW(MS_U32 u32Id)1241 static HVD_EX_Result _HVD_EX_InitFW(MS_U32 u32Id)
1242 {
1243 HVD_EX_Result eRet = E_HVD_EX_OK;
1244 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1245
1246 eRet = _HVD_EX_CheckFWVersion(u32Id);
1247
1248 if (eRet != E_HVD_EX_OK)
1249 {
1250 return eRet;
1251 }
1252
1253 switch (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK)
1254 {
1255 case HVD_INIT_HW_AVC:
1256 case HVD_INIT_HW_AVS:
1257 case HVD_INIT_HW_MVC:
1258 #if SUPPORT_EVD
1259 case HVD_INIT_HW_VP9: // MStar VP9 or G2 VP9
1260 case HVD_INIT_HW_HEVC:
1261 #endif
1262 eRet = _HVD_EX_InitFW_AVC(u32Id);
1263 break;
1264 case HVD_INIT_HW_RM:
1265 eRet = _HVD_EX_InitFW_RM(u32Id);
1266 break;
1267 default:
1268 break;
1269 }
1270
1271 HAL_HVD_EX_PowerSaving(u32Id);
1272
1273 return eRet;
1274 }
1275
_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id,MS_BOOL bFlush)1276 static MS_BOOL _HVD_EX_IsAllBufferEmpty(MS_U32 u32Id, MS_BOOL bFlush)
1277 {
1278 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1279 MS_U32 u32PlaybackType = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
1280 MS_BOOL bCondition;
1281 #ifndef VDEC3
1282 MS_U32 u32FwIdleThreshold = 5000;
1283 #endif
1284 //MS_U32 u8DispCntThreshold = 0;
1285 if (u32PlaybackType == HVD_INIT_MAIN_FILE_RAW)
1286 {
1287 #ifdef VDEC3
1288 MS_VIRT u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
1289 if (!HAL_VPU_EX_IsVBBUEmpty(u32Id, u32VBBUAddr))
1290 #else
1291 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) != 0)
1292 #endif
1293 {
1294 return FALSE;
1295 }
1296 }
1297 else //if( u32PlaybackType == HVD_INIT_MAIN_FILE_TS ) TSP input
1298 {
1299 #if 0
1300 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR) != HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR))
1301 {
1302 return FALSE;
1303 }
1304 #endif
1305 }
1306 #ifndef VDEC3
1307 if(_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE))
1308 #endif
1309 {
1310 #ifdef VDEC3
1311 //if ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0) && HAL_HVD_EX_DispFrameAllViewed(u32Id) && (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE || HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_PLAYBACK_FINISH)))
1312 bCondition = (bFlush)? (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE):
1313 (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE || HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_PLAYBACK_FINISH));
1314
1315 if (bCondition && (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0) && HAL_HVD_EX_DispFrameAllViewed(u32Id))
1316 #else
1317 if ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0 && HAL_HVD_EX_DispFrameAllViewed(u32Id)) &&
1318 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold)||((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) )))
1319 #endif
1320 {
1321 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1322
1323 return TRUE;
1324 }
1325
1326 return FALSE;
1327 }
1328 #ifndef VDEC3
1329 //other Queues
1330 //LOGD("R: %d %d %d", HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT));
1331 if (((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0) && (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB) == u8DispCntThreshold)) &&
1332 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold)||((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) )))
1333 {
1334 //HVD_PRINT("Flush success, flush_status: %d !!!\n",HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS));
1335 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1336
1337 return TRUE;
1338 }
1339 else
1340 {
1341 return FALSE;
1342 }
1343 #endif
1344 }
1345
1346 #ifndef VDEC3
_HVD_EX_IsAllBufferEmpty_VP8(MS_U32 u32Id)1347 static MS_BOOL _HVD_EX_IsAllBufferEmpty_VP8(MS_U32 u32Id)
1348 {
1349 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1350 MS_U32 u32PlaybackType = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
1351 MS_U32 u32FwIdleThreshold = 5000;
1352 MS_U32 u8DispCntThreshold = 0;
1353
1354 if (u32PlaybackType == HVD_INIT_MAIN_FILE_RAW)
1355 {
1356 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) != 0)
1357 {
1358 return FALSE;
1359 }
1360 }
1361
1362 #if 0
1363 if(_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE))
1364 {
1365 u32FwIdleThreshold = 5;
1366 }
1367 #endif
1368 if(_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE))
1369 {
1370 if ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR) == HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR) && HAL_HVD_EX_DispFrameAllViewed(u32Id)) &&
1371 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold)||((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) )))
1372 {
1373 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1374
1375 return TRUE;
1376 }
1377
1378 return FALSE;
1379 }
1380 // other Queues
1381 if (((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0) && (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB) == u8DispCntThreshold)) &&
1382 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold) || (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) ))
1383 {
1384 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1385 return TRUE;
1386 }
1387 else
1388 {
1389 return FALSE;
1390 }
1391 }
1392 #endif
1393
1394 #if defined(REDLION_LINUX_KERNEL_ENVI)
_HVD_EX_ISRHandler(void)1395 static MS_S32 _HVD_EX_ISRHandler(void)
1396 {
1397 if (gHVDISRCtrl.pfnISRCallBack != NULL)
1398 {
1399 gHVDISRCtrl.bInISR = TRUE;
1400 gHVDISRCtrl.u32ISRInfo = HAL_HVD_EX_GetData(E_HVD_GDATA_HVD_ISR_STATUS);
1401
1402 if (gHVDISRCtrl.u32ISRInfo)
1403 {
1404 HAL_HVD_EX_EnableISR(FALSE);
1405 gHVDISRCtrl.pfnISRCallBack();
1406 HAL_HVD_EX_EnableISR(TRUE);
1407 }
1408 }
1409 else
1410 {
1411 HVD_EX_MSG_DBG("ISR callback is NULL.\n");
1412 }
1413
1414 gHVDISRCtrl.bInISR = FALSE;
1415 HAL_HVD_EX_SetClearISR();
1416 if (TRUE == OSAL_HVD_ISR_Enable())//enable cpu interrupt mask
1417 {
1418 _bHVDDisableISRFlag = FALSE;
1419 }
1420 return 1;
1421 }
1422 #else
_HVD_EX_ISRHandler(void)1423 static void _HVD_EX_ISRHandler(void)
1424 {
1425 MS_U8 u8Idx;
1426 HVD_ISRCallBack pfnCb = NULL;
1427 //we can attach only one ISR, so we need to check the INT is from which decoder.
1428 for (u8Idx = 0; u8Idx < HVD_MAX_STREAMS; u8Idx++)
1429 {
1430 if (pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_HVD)
1431 {
1432 pfnCb = pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.pfnISRCallBack;
1433
1434 if (pfnCb)
1435 {
1436 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = TRUE;
1437 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo = HAL_HVD_EX_GetData(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, E_HVD_GDATA_HVD_ISR_STATUS);
1438
1439 if (pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo)
1440 {
1441 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
1442 //make fake stream id to disable/enable ISR.(only for calling HAL_HVD_EX_EnableISR)
1443
1444 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, FALSE);
1445 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1446 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, TRUE);
1447 #else
1448 HAL_HVD_EX_EnableISR(FALSE);
1449 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1450 HAL_HVD_EX_EnableISR(TRUE);
1451 #endif
1452 }
1453 }
1454 else
1455 {
1456 HVD_EX_MSG_DBG("ISR callback is NULL.\n");
1457 }
1458
1459 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = FALSE;
1460 }
1461 }
1462
1463 HAL_HVD_EX_SetClearISR(REG_HVD_BASE);
1464
1465 if (TRUE == OSAL_HVD_ISR_Enable(HVD_ISR_VECTOR))//enable cpu interrupt mask
1466 {
1467 bHVDDisableISRFlag = FALSE;
1468 }
1469 }
1470
_EVD_EX_ISRHandler(void)1471 static void _EVD_EX_ISRHandler(void)
1472 {
1473 MS_U8 u8Idx;
1474 HVD_ISRCallBack pfnCb = NULL;
1475
1476 //we can attach only one ISR, so we need to check the INT is from which decoder.
1477 for (u8Idx = 0; u8Idx < HVD_MAX_STREAMS; u8Idx++)
1478 {
1479 if (pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_EVD)
1480 {
1481 pfnCb = pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.pfnISRCallBack;
1482
1483 if (pfnCb)
1484 {
1485 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = TRUE;
1486 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo = HAL_HVD_EX_GetData(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, E_HVD_GDATA_HVD_ISR_STATUS);
1487
1488 if (pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo)
1489 {
1490 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
1491 //make fake stream id to disable/enable ISR.(only for calling HAL_HVD_EX_EnableISR)
1492
1493 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, FALSE);
1494 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1495 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, TRUE);
1496 #else
1497 HAL_HVD_EX_EnableISR(FALSE);
1498 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1499 HAL_HVD_EX_EnableISR(TRUE);
1500 #endif
1501 }
1502 }
1503 else
1504 {
1505 HVD_EX_MSG_DBG("ISR callback is NULL.\n");
1506 }
1507
1508 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = FALSE;
1509 }
1510 }
1511
1512 HAL_HVD_EX_SetClearISR(REG_EVD_BASE);
1513
1514 if (TRUE == OSAL_HVD_ISR_Enable(EVD_ISR_VECTOR))//enable cpu interrupt mask
1515 {
1516 bEVDDisableISRFlag = FALSE;
1517 }
1518 }
1519
_EVDLITE_EX_ISRHandler(void)1520 static void _EVDLITE_EX_ISRHandler(void)
1521 {
1522 MS_U8 u8Idx;
1523 HVD_ISRCallBack pfnCb = NULL;
1524
1525 //we can attach only one ISR, so we need to check the INT is from which decoder.
1526 for (u8Idx = 0; u8Idx < HVD_MAX_STREAMS; u8Idx++)
1527 {
1528 if (pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_EVDLITE)
1529 {
1530 pfnCb = pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.pfnISRCallBack;
1531
1532 if (pfnCb)
1533 {
1534 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = TRUE;
1535 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo = HAL_HVD_EX_GetData(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, E_HVD_GDATA_HVD_ISR_STATUS);
1536
1537 if (pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo)
1538 {
1539 #if defined(CHIP_KANO) || defined(CHIP_KASTOR) || defined(CHIP_CURRY)
1540 //make fake stream id to disable/enable ISR.(only for calling HAL_HVD_EX_EnableISR)
1541
1542 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, FALSE);
1543 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1544 HAL_HVD_EX_EnableISR(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, TRUE);
1545 #else
1546 HAL_HVD_EX_EnableISR(FALSE);
1547 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1548 HAL_HVD_EX_EnableISR(TRUE);
1549 #endif
1550 }
1551 }
1552 else
1553 {
1554 HVD_EX_MSG_DBG("ISR callback is NULL.\n");
1555 }
1556
1557 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = FALSE;
1558 }
1559 }
1560
1561 HAL_HVD_EX_SetClearISR(REG_EVD_LITE_BASE);
1562
1563 if (TRUE == OSAL_HVD_ISR_Enable(EVD_LITE_ISR_VECTOR))//enable cpu interrupt mask
1564 {
1565 bEVDLITEDisableISRFlag = FALSE;
1566 }
1567 }
1568 #endif
1569
_HVD_EX_RecoverySettings(MS_U32 u32Id)1570 HVD_EX_Result _HVD_EX_RecoverySettings(MS_U32 u32Id)
1571 {
1572 // TODO: complete this function. and consider more cases. step decoder, display?
1573 HVD_EX_Result eRst = E_HVD_EX_OK;
1574 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1575 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1576
1577 switch (pCtrl->InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK)
1578 {
1579 case HVD_INIT_MAIN_LIVE_STREAM:
1580 {
1581 // temp solution
1582 // must before play().
1583 if ((pCtrl->Settings.DispInfoTH.u32FrmrateLowBound != 0) ||
1584 (pCtrl->Settings.DispInfoTH.u32FrmrateUpBound != 0) ||
1585 (pCtrl->Settings.DispInfoTH.u32MvopLowBound != 0) || (pCtrl->Settings.DispInfoTH.u32MvopUpBound != 0))
1586 {
1587 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISP_INFO_TH, (MS_VIRT) (&pCtrl->Settings.DispInfoTH));
1588 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
1589 }
1590
1591 if (pCtrl->Settings.u32IsrEvent)
1592 {
1593 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, pCtrl->Settings.u32IsrEvent);
1594 }
1595
1596 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
1597 HAL_HVD_EX_EnableISR(u32Id, pCtrl->Settings.bEnISR);
1598 #else
1599 HAL_HVD_EX_EnableISR(pCtrl->Settings.bEnISR);
1600 #endif
1601 // play()
1602 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
1603
1604 if (pCtrl->Settings.u8SkipMode)
1605 {
1606 if (E_HVD_EX_OK != (eRst = MDrv_HVD_EX_SetSkipDecMode(u32Id, (HVD_EX_SkipDecode) (pCtrl->Settings.u8SkipMode))))
1607 {
1608 HVD_EX_MSG_ERR("Set Skip Mode fail!!.\n");
1609 return eRst;
1610 }
1611 }
1612
1613 if (pCtrl->Settings.bIsShowErrFrm)
1614 {
1615 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ERR_FRM, TRUE);
1616 }
1617
1618 if (pCtrl->Settings.u8FrcMode)
1619 {
1620 if (E_HVD_EX_OK != (eRst = MDrv_HVD_EX_SetFrcMode(u8DrvId, (HVD_EX_FrmRateConvMode) (pCtrl->Settings.u8FrcMode))))
1621 {
1622 HVD_EX_MSG_ERR("Set Frc Mode fail!!.\n");
1623 return eRst;
1624 }
1625 }
1626
1627 if (pCtrl->Settings.bIsErrConceal)
1628 {
1629 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ERR_CONCEAL, TRUE);
1630 }
1631
1632 if (pCtrl->Settings.bAutoFreeES)
1633 {
1634 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AUTO_FREE_ES, TRUE);
1635 }
1636
1637 if (pCtrl->Settings.bDisDeblocking)
1638 {
1639 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_DBF, TRUE);
1640 }
1641
1642 if (pCtrl->Settings.bDisQuarterPixel)
1643 {
1644 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_QUART_PIXEL, TRUE);
1645 }
1646
1647 if (pCtrl->Settings.bIsSyncOn)
1648 {
1649 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_ACTIVE, TRUE);
1650 }
1651
1652 if (pCtrl->Settings.u32SyncTolerance)
1653 {
1654 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_TOLERANCE, pCtrl->Settings.u32SyncTolerance);
1655 }
1656
1657 if (pCtrl->Settings.u32SyncRepeatTH)
1658 {
1659 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_THRESHOLD, pCtrl->Settings.u32SyncRepeatTH);
1660 }
1661
1662 if (pCtrl->Settings.u32SyncVideoDelay)
1663 {
1664 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, pCtrl->Settings.u32SyncVideoDelay);
1665 }
1666
1667 if (pCtrl->Settings.u32SyncFreeRunTH)
1668 {
1669 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FREERUN_THRESHOLD, pCtrl->Settings.u32SyncFreeRunTH);
1670 }
1671
1672 if (E_HVD_BURST_CNT_DISABLE != (HVD_MIU_Burst_Cnt_Ctrl) pCtrl->Settings.u32MiuBurstLevel)
1673 {
1674 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_MIU_BURST_CNT, pCtrl->Settings.u32MiuBurstLevel);
1675 }
1676
1677 //HAL_HVD_EX_SetCmd(E_HVD_CMD_BLUE_SCREEN, FALSE);
1678 pCtrl->bStepDecoding = 0;
1679
1680 break;
1681 }
1682 case HVD_INIT_MAIN_FILE_RAW:
1683 default:
1684 pCtrl->bStepDecoding = 0;
1685 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
1686 break;
1687 }
1688
1689 return eRst;
1690 }
1691
MDrv_HVD_checkISR(MS_U32 u32Id,MS_U8 u8DrvId,HWDEC_ISR_TYPE hwdec_Isr_type)1692 MS_BOOL MDrv_HVD_checkISR(MS_U32 u32Id, MS_U8 u8DrvId, HWDEC_ISR_TYPE hwdec_Isr_type)
1693 {
1694 MS_U8 i = 0;
1695 MS_BOOL bUsed = FALSE;
1696 for(i = 0; i < HVD_MAX_STREAMS; i++)
1697 {
1698 if(i != u8DrvId)
1699 {
1700 if((hwdec_Isr_type == pHVDDrvContext->gHVDCtrl_EX[i].HVDISRCtrl.eHWDecIsr)
1701 && (TRUE == pHVDDrvContext->gHVDCtrl_EX[i].bUsed))
1702 {
1703 bUsed = TRUE;
1704 break;
1705 }
1706 }
1707 }
1708
1709 return bUsed;
1710 }
1711
_HVD_EX_Rst(MS_U32 u32Id,MS_BOOL bErrHandle)1712 HVD_EX_Result _HVD_EX_Rst(MS_U32 u32Id, MS_BOOL bErrHandle)
1713 {
1714 HVD_EX_Result eRst = E_HVD_EX_RET_ILLEGAL_ACCESS;
1715 MS_U8 u8Cidx = HAL_HVD_EX_GetCidx(u32Id);
1716 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1717 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1718
1719 if (bErrHandle == TRUE)
1720 {
1721 HVD_EX_MSG_ERR("HVD Not supported reset(TRUE) yet\n");
1722 return E_HVD_EX_RET_INVALID_PARAMETER;
1723 }
1724
1725 pHVDDrvContext->bHVDIsIniting[u8DrvId] = TRUE;
1726
1727 #if (defined(CHIP_NAPOLI))
1728 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM)
1729 {
1730 if(!HAL_HVD_EX_Is_RM_Supported(u32Id))
1731 return E_HVD_EX_RET_UNSUPPORTED;
1732 }
1733 #endif
1734
1735 // disable ISR when there is no one using ISR
1736 #if defined(HIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
1737 MS_BOOL bUsed;
1738 #if defined(CHIP_KANO) || defined(CHIP_CURRY)
1739 if (u8Cidx == HWDEC_EVD_LITE)
1740 {
1741 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_EVDLITE);
1742 }
1743 else
1744 #endif
1745 if (((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC) || ((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_VP9))
1746 {
1747 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_EVD);
1748 }
1749 else
1750 {
1751 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_HVD);
1752 }
1753
1754 if (bUsed == FALSE)
1755 HAL_HVD_EX_EnableISR(u32Id, FALSE);
1756 #else
1757 HAL_HVD_EX_EnableISR(FALSE);
1758 #endif
1759
1760 #if HVD_ENABLE_TIME_MEASURE
1761 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1762 #endif
1763
1764 eRst = _HVD_EX_RstVariables(u32Id);
1765
1766 if (eRst != E_HVD_EX_OK)
1767 {
1768 goto DRV_HVD_Rst_Failed;
1769 }
1770
1771 #if HVD_ENABLE_TIME_MEASURE
1772 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1773 #endif
1774
1775 #ifdef VDEC3
1776 eRst = (HVD_EX_Result) HAL_HVD_EX_InitShareMem(u32Id, pHVDDrvContext->bFWdecideFB, pHVDDrvContext->bCMAUsed);
1777 #else
1778 eRst = (HVD_EX_Result) HAL_HVD_EX_InitShareMem(u32Id);
1779 #endif
1780
1781 if (E_HVD_EX_OK != eRst)
1782 {
1783 goto DRV_HVD_Rst_Failed;
1784 }
1785
1786 #if HVD_ENABLE_TIME_MEASURE
1787 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1788 #endif
1789 #ifdef VDEC3
1790 eRst = _HVD_EX_InitRegCPU(u32Id,pHVDDrvContext->bFWdecideFB);
1791 #else
1792 eRst = _HVD_EX_InitRegCPU(u32Id);
1793 #endif
1794 if (eRst != E_HVD_EX_OK)
1795 {
1796 goto DRV_HVD_Rst_Failed;
1797 }
1798
1799 #if HVD_ENABLE_TIME_MEASURE
1800 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1801 #endif
1802
1803 eRst = _HVD_EX_InitFW(u32Id);
1804
1805 if (eRst != E_HVD_EX_OK)
1806 {
1807 goto DRV_HVD_Rst_Failed;
1808 }
1809
1810 eRst = E_HVD_EX_OK;
1811
1812 DRV_HVD_Rst_Failed:
1813 // disable ISR when there is no one using ISR
1814 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
1815 bUsed = FALSE;
1816 #if defined(CHIP_KANO) || defined(CHIP_CURRY)
1817 if (u8Cidx == HWDEC_EVD_LITE)
1818 {
1819 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_EVDLITE);
1820 }
1821 else
1822 #endif
1823 if (((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC) || ((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_VP9))
1824 {
1825 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_EVD);
1826 }
1827 else
1828 {
1829 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_HVD);
1830 }
1831
1832 if (bUsed == FALSE)
1833 HAL_HVD_EX_EnableISR(u32Id, FALSE);
1834 #else
1835 HAL_HVD_EX_EnableISR(pCtrl->Settings.bEnISR);
1836 #endif
1837 pHVDDrvContext->bHVDIsIniting[u8DrvId] = FALSE;
1838
1839 #if defined(SUPPORT_CMA)
1840 if (pHVDDrvContext->bCMAUsed)
1841 {
1842 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_CMA_USED, 1);
1843 /*if (((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_HEVC) ||
1844 ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP9))
1845 {
1846 pHVDDrvContext->bCMATwoMIU[u8DrvId] = 1;
1847 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_CMA_TWO_MIU, 1);
1848
1849 HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FB2ADDR, pHVDDrvContext->cmaInitParam[1].heap_miu_start_offset);
1850 HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FB2SIZE, pHVDDrvContext->cmaInitParam[1].heap_length);
1851 }
1852 else
1853 {
1854 pHVDDrvContext->bCMATwoMIU[u8DrvId] = 0;
1855 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_CMA_TWO_MIU, 0);
1856 }*/
1857
1858 HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FBADDR, pHVDDrvContext->cmaInitParam[0].heap_miu_start_offset);
1859 HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FBSIZE, pHVDDrvContext->cmaInitParam[0].heap_length);
1860 }
1861 #endif
1862 return eRst;
1863 }
1864
_HVD_EX_GetDrvId(MS_U32 u32Id)1865 static MS_U8 _HVD_EX_GetDrvId(MS_U32 u32Id)
1866 {
1867 return (0xFF & (u32Id >> 16));
1868 }
1869
_HVD_EX_GetDispInfo(MS_U32 u32Id,HVD_EX_DispInfo * pInfo,MS_BOOL bClearSeqChg)1870 static HVD_EX_Result _HVD_EX_GetDispInfo(MS_U32 u32Id, HVD_EX_DispInfo *pInfo, MS_BOOL bClearSeqChg)
1871 {
1872 MS_U32 u32Seqtimes = 10;
1873 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
1874 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1875 MS_VIRT u32DispInfoAddr = 0;
1876
1877 HVD_EX_MSG_TRACE();
1878 _DRV_HVD_Inited(u8DrvId,eRet);
1879
1880 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
1881 {
1882 if (MDrv_HVD_EX_CheckDispInfoRdy(u32Id) == E_HVD_EX_RET_NOTREADY)
1883 {
1884 return E_HVD_EX_RET_NOTREADY;
1885 }
1886 }
1887
1888 if (pInfo == NULL)
1889 {
1890 return E_HVD_EX_RET_INVALID_PARAMETER;
1891 }
1892
1893 _DRV_HVD_EX_Entry(u8DrvId);
1894
1895 if (TRUE == bClearSeqChg)
1896 {
1897 HVD_GETDISPINFO_START:
1898 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_GET_DISP_INFO_START, 0);
1899 u32DispInfoAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_INFO_ADDR);
1900 if(u32DispInfoAddr == 0)
1901 {
1902 return E_HVD_EX_RET_NOTREADY;
1903 }
1904 HVD_memcpy((void *) pInfo, (void *) u32DispInfoAddr, sizeof(HVD_Display_Info));
1905 //Check if another SeqChg occurs
1906 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_UNCOPYED))
1907 {
1908 u32Seqtimes--;
1909 if (u32Seqtimes > 0)
1910 {
1911 goto HVD_GETDISPINFO_START;
1912 }
1913 else
1914 {
1915 HVD_EX_MSG_ERR("GetDispInfo Timeout:%d\n",
1916 (MS_S16) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_UNCOPYED));
1917 _DRV_HVD_EX_RET(u8DrvId, E_HVD_EX_RET_TIMEOUT);
1918 }
1919 }
1920 }
1921 else
1922 {
1923 u32DispInfoAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_INFO_ADDR);
1924 if(u32DispInfoAddr == 0)
1925 {
1926 return E_HVD_EX_RET_NOTREADY;
1927 }
1928 HVD_memcpy((void *) pInfo, (void *)u32DispInfoAddr, sizeof(HVD_Display_Info));
1929 }
1930
1931 eRet = E_HVD_EX_OK;
1932
1933 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg)
1934 {
1935 HVD_EX_MSG_DBG("u32FrameRate=%u, u8Interlace=%x, u16HorSize=%u, u16VerSize=%u, \
1936 u16Crop R/L=%u/%u, u16Crop B/T=%u/%u, u8AspectRate=%u, u16SarWidth=%u \
1937 u16SarHeight=%u, u16Pitch=%u, u8ColourPrimaries=%u\n",
1938 pInfo->u32FrameRate,
1939 pInfo->u8Interlace,
1940 pInfo->u16HorSize,
1941 pInfo->u16VerSize,
1942 pInfo->u16CropRight, pInfo->u16CropLeft,
1943 pInfo->u16CropBottom, pInfo->u16CropTop,
1944 pInfo->u8AspectRate,
1945 pInfo->u16SarWidth,
1946 pInfo->u16SarHeight,
1947 pInfo->u16Pitch,
1948 pInfo->u8ColourPrimaries);
1949 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = FALSE;
1950 }
1951
1952 _DRV_HVD_EX_RET(u8DrvId, eRet);
1953 }
1954
_HVD_EX_ReportLow32BitPTS(MS_U32 u32Id,MS_U32 u32PTS)1955 static MS_U32 _HVD_EX_ReportLow32BitPTS(MS_U32 u32Id, MS_U32 u32PTS)
1956 {
1957 MS_U32 u32RetPTS = u32PTS;
1958 MS_U32 u32UpperInMs = (HVD_U32_MAX/90);
1959 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1960 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1961
1962 if(u32RetPTS != HVD_U32_MAX)
1963 {
1964 if (pCtrl->InitParams.u8TimeUnit)
1965 {
1966 //unit: ms
1967 if (u32RetPTS > u32UpperInMs)
1968 {
1969 u32RetPTS = u32RetPTS - u32UpperInMs;
1970 }
1971 }
1972 else
1973 {
1974 //unit: 90KHz, bit 33 is not included in u32PTS, no need to handle
1975 }
1976 }
1977 return u32RetPTS;
1978 }
1979
_HVD_EX_Map2HVDErrCode(MS_U32 u32ErrCode)1980 static MS_U32 _HVD_EX_Map2HVDErrCode(MS_U32 u32ErrCode)
1981 {
1982
1983 MS_U32 u32Ret=E_HVD_EX_ERRCODE_GENERAL_BASE;
1984
1985
1986 switch (u32ErrCode)
1987 {
1988 case E_HVD_ERR_OUT_OF_SPEC:
1989 u32Ret = E_HVD_EX_ERRCODE_OUT_OF_SPEC;
1990 break;
1991 case E_HVD_ERR_UNKNOW_ERR:
1992 u32Ret = E_HVD_EX_ERRCODE_UNKNOW_ERR;
1993 break;
1994 case E_HVD_ERR_HW_BREAK_DOWN:
1995 u32Ret = E_HVD_EX_ERRCODE_HW_BREAK_DOWN;
1996 break;
1997 case E_HVD_ERR_HW_DEC_TIMEOUT:
1998 u32Ret = E_HVD_EX_ERRCODE_HW_DEC_TIMEOUT;
1999 break;
2000 case E_HVD_ERR_OUT_OF_MEMORY:
2001 u32Ret = E_HVD_EX_ERRCODE_OUT_OF_MEMORY;
2002 break;
2003 case E_HVD_ERR_UNKNOWN_CODEC:
2004 u32Ret = E_HVD_EX_ERRCODE_UNKNOWN_CODEC;
2005 break;
2006 case E_HVD_ERR_RES_NOT_SUPPORT:
2007 u32Ret = E_HVD_EX_ERRCODE_RES_NOT_SUPPORT;
2008 break;
2009 case E_HVD_ERR_AVC_SPS_BROKEN:
2010 u32Ret = E_HVD_EX_ERRCODE_AVC_SPS_BROKEN;
2011 break;
2012 case E_HVD_ERR_AVC_SPS_NOT_IN_SPEC:
2013 u32Ret = E_HVD_EX_ERRCODE_AVC_SPS_NOT_IN_SPEC;
2014 break;
2015 case E_HVD_ERR_AVC_SPS_NOT_ENOUGH_FRM:
2016 u32Ret = E_HVD_EX_ERRCODE_AVC_SPS_NOT_ENOUGH_FRM;
2017 break;
2018 case E_HVD_ERR_AVC_PPS_BROKEN:
2019 u32Ret = E_HVD_EX_ERRCODE_AVC_PPS_BROKEN;
2020 break;
2021 case E_HVD_ERR_AVC_REF_LIST:
2022 u32Ret = E_HVD_EX_ERRCODE_AVC_REF_LIST;
2023 break;
2024 case E_HVD_ERR_AVC_NO_REF:
2025 u32Ret = E_HVD_EX_ERRCODE_AVC_NO_REF;
2026 break;
2027 case E_HVD_ERR_AVC_RES:
2028 u32Ret = E_HVD_EX_ERRCODE_AVC_RES;
2029 break;
2030 case E_HVD_ERR_AVS_RES:
2031 u32Ret = E_HVD_EX_ERRCODE_AVS_RES;
2032 break;
2033 case E_HVD_ERR_RM_PACKET_HEADER:
2034 u32Ret = E_HVD_EX_ERRCODE_RM_PACKET_HEADER;
2035 break;
2036 case E_HVD_ERR_RM_FRAME_HEADER:
2037 u32Ret = E_HVD_EX_ERRCODE_RM_FRAME_HEADER;
2038 break;
2039 case E_HVD_ERR_RM_SLICE_HEADER:
2040 u32Ret = E_HVD_EX_ERRCODE_RM_SLICE_HEADER;
2041 break;
2042 case E_HVD_ERR_RM_BYTE_CNT:
2043 u32Ret = E_HVD_EX_ERRCODE_RM_BYTE_CNT;
2044 break;
2045 case E_HVD_ERR_RM_DISP_TIMEOUT:
2046 u32Ret = E_HVD_EX_ERRCODE_RM_DISP_TIMEOUT;
2047 break;
2048 case E_HVD_ERR_RM_NO_REF:
2049 u32Ret = E_HVD_EX_ERRCODE_RM_NO_REF;
2050 break;
2051 case E_HVD_ERR_RM_RES:
2052 u32Ret = E_HVD_EX_ERRCODE_RM_RES;
2053 break;
2054 case E_HVD_ERR_RM_VLC:
2055 u32Ret = E_HVD_EX_ERRCODE_RM_VLC;
2056 break;
2057 case E_HVD_ERR_RM_SIZE_OUT_FB_LAYOUT:
2058 u32Ret = E_HVD_EX_ERRCODE_RM_SIZE_OUT_FB_LAYOUT;
2059 break;
2060 default:
2061 break;
2062 }
2063 return u32Ret;
2064 }
2065
_HVD_EX_Map2HVDESBufStatus(MS_U32 u32ESBufStatus)2066 static MS_U32 _HVD_EX_Map2HVDESBufStatus(MS_U32 u32ESBufStatus)
2067 {
2068
2069 MS_U32 u32Ret = E_HVD_EX_ES_BUF_STATUS_UNKNOWN;
2070
2071
2072 switch (u32ESBufStatus)
2073 {
2074 case E_HVD_ES_BUF_STATUS_UNDERFLOW:
2075 u32Ret = E_HVD_EX_ES_BUF_STATUS_UNDERFLOW;
2076 break;
2077 case E_HVD_ES_BUF_STATUS_OVERFLOW:
2078 u32Ret = E_HVD_EX_ES_BUF_STATUS_OVERFLOW;
2079 break;
2080 case E_HVD_ES_BUF_STATUS_NORMAL:
2081 u32Ret = E_HVD_EX_ES_BUF_STATUS_NORMAL;
2082 break;
2083 default:
2084 break;
2085 }
2086 return u32Ret;
2087 }
2088
_HVD_EX_GetMIUBase(MS_U8 u8DrvId,MS_U32 u32MIU)2089 static MS_U32 _HVD_EX_GetMIUBase(MS_U8 u8DrvId, MS_U32 u32MIU)
2090 {
2091 if (u32MIU == 1)
2092 return pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr;
2093 else if (u32MIU == 2)
2094 return pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU2BaseAddr;
2095 else
2096 return 0;
2097 }
2098
2099 //-------------------------------------------------------------------------------------------------
2100 // Global Functions
2101 //-------------------------------------------------------------------------------------------------
2102
2103 //-----------------------------------------------------------------------------
2104 /// @brief \b Function \b Name: MDrv_HVD_SetOSRegBase()
2105 /// @brief \b Function \b Description: Set system register base
2106 /// @param -u32RegBaseAddr \b IN : system register base
2107 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetOSRegBase(MS_VIRT u32RegBaseAddr)2108 void MDrv_HVD_EX_SetOSRegBase(MS_VIRT u32RegBaseAddr)
2109 {
2110 #if defined (__aarch64__)
2111 HVD_EX_MSG_DBG("u32RiuBaseAddr=%lx\n", u32RegBaseAddr);
2112 #else
2113 HVD_EX_MSG_DBG("u32RiuBaseAddr=%x\n", u32RegBaseAddr);
2114 #endif
2115 HAL_HVD_EX_InitRegBase(u32RegBaseAddr);
2116 }
2117
MDrv_HVD_EX_SetCtrlsBase(MS_U32 u32Id)2118 void MDrv_HVD_EX_SetCtrlsBase(MS_U32 u32Id)
2119 {
2120 // for MJPEG, need to be modified later
2121 MS_U8 u8Offset = HAL_VPU_EX_GetTaskId(u32Id);
2122 UNUSED(u8Offset);
2123 // The Driver Ctrl base should be set with parameter [0]
2124 HAL_HVD_EX_SetDrvCtrlsBase(&(pHVDDrvContext->gHVDCtrl_EX[0]));
2125
2126 }
2127
MDrv_HVD_EX_MJPEG_InitSharemem(MS_U32 u32Id,MS_U32 u32CodeBufVAddr)2128 void MDrv_HVD_EX_MJPEG_InitSharemem(MS_U32 u32Id, MS_U32 u32CodeBufVAddr)
2129 {
2130 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2131 HVD_EX_Drv_Ctrl *pCtrl1 = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2132 memset((void *) pCtrl1, 0, sizeof(HVD_EX_Drv_Ctrl));
2133 pCtrl1->InitParams.u32ModeFlag |=HVD_INIT_HW_MJPEG;
2134 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufVAddr = u32CodeBufVAddr;
2135 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr = MS_VA2PA(u32CodeBufVAddr);
2136 pHVDDrvContext->bHVDIsInited[u8DrvId] = TRUE;
2137 HVD_Pre_Ctrl *pCtrl = &(pHVDDrvContext->gHVDPreCtrl[u8DrvId]);
2138
2139 memset((void *) pCtrl, 0, sizeof(HVD_Pre_Ctrl));
2140
2141 // PreSetControl
2142 HAL_HVD_EX_SetPreCtrlVariables(u32Id,(MS_VIRT)(&pHVDDrvContext->gHVDPreCtrl[u8DrvId]));
2143
2144 HVD_EX_MSG_INF("u8DrvId=%d, PA:[0x%lx, 0x%lx], VA:[0x%lx, 0x%lx], [0x%lx]\n", u8DrvId,
2145 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[0].MemMap.u32CodeBufAddr,
2146 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[1].MemMap.u32CodeBufAddr,
2147 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[0].MemMap.u32CodeBufVAddr,
2148 (unsigned long)pHVDDrvContext->gHVDCtrl_EX[1].MemMap.u32CodeBufVAddr,
2149 (unsigned long)HAL_HVD_EX_GetShmAddr(u32Id));
2150
2151 #ifdef VDEC3
2152 HAL_HVD_EX_InitShareMem(u32Id, FALSE, pHVDDrvContext->bCMAUsed); // FIXME
2153 #else
2154 HAL_HVD_EX_InitShareMem(u32Id);
2155 #endif
2156
2157 }
2158
MDrv_HVD_EX_MJPEG_Exit(MS_U32 u32Id)2159 void MDrv_HVD_EX_MJPEG_Exit(MS_U32 u32Id)
2160 {
2161 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2162 MS_U8 u8HalIdx = _HVD_EX_GetStreamIdx(u32Id);
2163 pHVDDrvContext->bHVDIsInited[u8DrvId] = FALSE;
2164 HAL_VPU_EX_ReleaseFreeStream(u8HalIdx);
2165 }
2166
MDrv_HVD_Init_Share_Mem(void)2167 HVD_EX_Result MDrv_HVD_Init_Share_Mem(void)
2168 {
2169 #if ((defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_LINUX_KERNEL) || defined(MSOS_TYPE_ECOS)) && (!defined(SUPPORT_X_MODEL_FEATURE)))
2170 MS_U32 u32ShmId;
2171 MS_VIRT u32Addr;
2172 MS_U32 u32BufSize;
2173
2174
2175 if (FALSE == MsOS_SHM_GetId( (MS_U8*)"Linux HVD driver",
2176 sizeof(HVD_Drv_CTX),
2177 &u32ShmId,
2178 &u32Addr,
2179 &u32BufSize,
2180 MSOS_SHM_QUERY))
2181 {
2182 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux HVD driver",
2183 sizeof(HVD_Drv_CTX),
2184 &u32ShmId,
2185 &u32Addr,
2186 &u32BufSize,
2187 MSOS_SHM_CREATE))
2188 {
2189 HVD_EX_MSG_ERR("[%s]SHM allocation failed!!!use global structure instead!!!\n",__FUNCTION__);
2190 if(pHVDDrvContext == NULL)
2191 {
2192 pHVDDrvContext = &gHVDDrvContext;
2193 memset(pHVDDrvContext,0,sizeof(HVD_Drv_CTX));
2194 _HVD_EX_Context_Init();
2195 HVD_PRINT("[%s]Global structure init Success!!!\n",__FUNCTION__);
2196 }
2197 else
2198 {
2199 HVD_PRINT("[%s]Global structure exists!!!\n",__FUNCTION__);
2200 }
2201 //return E_HVD_EX_FAIL;
2202 }
2203 else
2204 {
2205 memset((MS_U8*)u32Addr,0,sizeof(HVD_Drv_CTX));
2206 pHVDDrvContext = (HVD_Drv_CTX*)u32Addr; // for one process
2207 _HVD_EX_Context_Init();
2208 }
2209 }
2210 else
2211 {
2212 pHVDDrvContext = (HVD_Drv_CTX*)u32Addr; // for another process
2213 }
2214 #else
2215 if(pHVDDrvContext == NULL)
2216 {
2217 pHVDDrvContext = &gHVDDrvContext;
2218 memset(pHVDDrvContext,0,sizeof(HVD_Drv_CTX));
2219 _HVD_EX_Context_Init();
2220 }
2221 #endif
2222
2223 if(HAL_HVD_EX_Init_Share_Mem() != TRUE)
2224 {
2225 return E_HVD_EX_FAIL;
2226 }
2227
2228 HAL_HVD_EX_SetDrvCtrlsBase(&(pHVDDrvContext->gHVDCtrl_EX[0]));
2229
2230 if(HAL_VPU_EX_Init_Share_Mem() != TRUE)
2231 {
2232 return E_HVD_EX_FAIL;
2233 }
2234
2235 return E_HVD_EX_OK;
2236 }
2237
2238 // Action
2239 #ifdef VDEC3
MDrv_HVD_EX_GetFreeStream(MS_U32 * pu32Id,HVD_EX_DRV_StreamType eStreamType,MS_BOOL bIsEVD,MS_BOOL bIsNStreamMode)2240 HVD_EX_Result MDrv_HVD_EX_GetFreeStream(MS_U32 *pu32Id, HVD_EX_DRV_StreamType eStreamType, MS_BOOL bIsEVD, MS_BOOL bIsNStreamMode)
2241 #else
2242 HVD_EX_Result MDrv_HVD_EX_GetFreeStream(MS_U32 *pu32Id, HVD_EX_DRV_StreamType eStreamType, MS_BOOL bIsEVD)
2243 #endif
2244 {
2245 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2246 MS_U32 i = 0;
2247 MS_U32 u32VPUStreamId = 0;
2248 MS_U32 u32HVDStreamId = 0;
2249
2250 HVD_EX_MSG_TRACE();
2251 #ifndef VDEC3
2252 //Get drvIdx
2253 switch (eStreamType)
2254 {
2255 case E_HVD_EX_DRV_MAIN_STREAM:
2256 i = 0;
2257 break;
2258 case E_HVD_EX_DRV_SUB_STREAM:
2259 i = 1;
2260 break;
2261 case E_HVD_EX_DRV_MVC_STREAM:
2262 i = 0;
2263 break;
2264 case E_HVD_EX_DRV_STREAM_NONE:
2265 default:
2266 i = HVD_MAX_STREAMS;
2267 break;
2268 }
2269
2270 if (i == HVD_MAX_STREAMS)
2271 {
2272 return E_HVD_EX_FAIL;
2273 }
2274 #endif
2275 if (E_HVD_EX_DRV_MAIN_STREAM == eStreamType)
2276 {
2277 #ifdef VDEC3
2278 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_MAIN_STREAM, bIsEVD, bIsNStreamMode);
2279 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_MAIN_STREAM, bIsEVD, bIsNStreamMode);
2280 #else
2281 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_MAIN_STREAM, bIsEVD);
2282 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_MAIN_STREAM, bIsEVD);
2283 #endif
2284
2285 if(u32HVDStreamId == E_HAL_HVD_STREAM_NONE)
2286 {
2287 HAL_VPU_EX_ReleaseFreeStream(0);
2288 }
2289
2290 if (u32VPUStreamId && u32HVDStreamId)
2291 {
2292 *pu32Id = (i << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2293 eRet = E_HVD_EX_OK;
2294 }
2295 }
2296 else if (E_HVD_EX_DRV_SUB_STREAM == eStreamType)
2297 {
2298 #ifdef VDEC3
2299 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_SUB_STREAM, bIsEVD, bIsNStreamMode);
2300 #else
2301 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_SUB_STREAM, bIsEVD);
2302 #endif
2303 if(u32VPUStreamId == E_HAL_VPU_STREAM_NONE)
2304 {
2305 return E_HVD_EX_FAIL;
2306 }
2307 #ifdef VDEC3
2308 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_SUB_STREAM, bIsEVD, bIsNStreamMode);
2309 #else
2310 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_SUB_STREAM, bIsEVD);
2311 #endif
2312
2313 if(u32HVDStreamId == E_HAL_HVD_STREAM_NONE)
2314 {
2315 HAL_VPU_EX_ReleaseFreeStream(1);
2316 }
2317
2318 if (u32VPUStreamId && u32HVDStreamId)
2319 {
2320 *pu32Id = (i << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2321 eRet = E_HVD_EX_OK;
2322 }
2323 }
2324 #if HVD_ENABLE_MVC
2325 else if (E_HVD_EX_DRV_MVC_STREAM == eStreamType)
2326 {
2327 #ifdef VDEC3
2328 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_MVC_STREAM, bIsEVD, bIsNStreamMode);
2329 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_MVC_STREAM, bIsEVD, bIsNStreamMode);
2330 #else
2331 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_MVC_STREAM, bIsEVD);
2332 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_MVC_STREAM, bIsEVD);
2333 #endif
2334
2335 if(u32HVDStreamId == E_HAL_HVD_STREAM_NONE)
2336 {
2337 HAL_VPU_EX_ReleaseFreeStream(0);
2338 }
2339
2340 if (u32VPUStreamId && u32HVDStreamId)
2341 {
2342 *pu32Id = (i << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2343 eRet = E_HVD_EX_OK;
2344 }
2345 }
2346 #endif
2347 #ifdef VDEC3
2348 else if ((eStreamType >= E_HVD_EX_DRV_N_STREAM) && (eStreamType < E_HVD_EX_DRV_N_STREAM + HVD_MAX_STREAMS))
2349 {
2350 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_N_STREAM + (eStreamType - E_HVD_EX_DRV_N_STREAM), bIsEVD, bIsNStreamMode);
2351 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_N_STREAM + (eStreamType - E_HVD_EX_DRV_N_STREAM), bIsEVD, bIsNStreamMode);
2352
2353 if(u32HVDStreamId == E_HAL_HVD_STREAM_NONE)
2354 {
2355 HAL_VPU_EX_ReleaseFreeStream(eStreamType - E_HVD_EX_DRV_N_STREAM);
2356 }
2357
2358 if (u32VPUStreamId && u32HVDStreamId)
2359 {
2360 *pu32Id = ((u32HVDStreamId & 0x0F) << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2361 eRet = E_HVD_EX_OK;
2362 }
2363 }
2364 #endif
2365 else
2366 {
2367 HVD_PRINT("%s:%s:Stream type=%d is unexpected\n", __FILE__, __FUNCTION__, eStreamType);
2368 }
2369
2370 return eRet;
2371 }
2372
2373 //-----------------------------------------------------------------------------
2374 /// @brief \b Function \b Name: MDrv_HVD_EX_Init()
2375 /// @brief \b Function \b Description: HVD driver initialization
2376 /// @param -pStMemCfg \b IN : pointer to the memory config of HVD driver
2377 /// @param -pStInitSettings \b IN : Initialization of HVD driver
2378 /// @return -The result of initialization process
2379 //-----------------------------------------------------------------------------
2380 #ifdef VDEC3
MDrv_HVD_EX_Init(MS_U32 u32Id,HVD_EX_MemCfg * pStMemCfg,HVD_EX_InitSettings * pStInitSettings,MS_BOOL bFWdecideFB,MS_BOOL bDRVdecideBS)2381 HVD_EX_Result MDrv_HVD_EX_Init(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_EX_InitSettings *pStInitSettings, MS_BOOL bFWdecideFB, MS_BOOL bDRVdecideBS)
2382 #else
2383 HVD_EX_Result MDrv_HVD_EX_Init(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_EX_InitSettings *pStInitSettings)
2384 #endif
2385 {
2386 HVD_EX_Result eRet = E_HVD_EX_FAIL;
2387 MS_U8 u8Cidx = HAL_HVD_EX_GetCidx(u32Id);
2388 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2389 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2390
2391 HVD_EX_MSG_TRACE();
2392
2393 #ifdef VDEC3
2394 pHVDDrvContext->bFWdecideFB = bFWdecideFB;
2395 #endif
2396
2397 #if HVD_ENABLE_TIME_MEASURE
2398 pHVDDrvContext->u32InitSysTimeBase[u8DrvId] = HVD_GetSysTime_ms();
2399 #endif
2400
2401 if ((pStMemCfg == NULL) || (pStInitSettings == NULL))
2402 {
2403 HVD_EX_MSG_ERR("Init params are invalid\n");
2404 return E_HVD_EX_RET_INVALID_PARAMETER;
2405 }
2406 #ifndef CONFIG_MBOOT //Add For GPL (content protection)
2407 if(_MDrv_HVD_AUTH_IPCheck(pStInitSettings->u32ModeFlag) == FALSE)
2408 {
2409 HVD_EX_MSG_ERR("[%s]User using invaild key !!!\n",__FUNCTION__);
2410 return E_HVD_EX_RET_INVALID_PARAMETER;
2411 }
2412 #endif
2413 HAL_HVD_EX_SetDrvCtrlsBase(&(pHVDDrvContext->gHVDCtrl_EX[0]));
2414
2415 #if HVD_ENABLE_AUTO_SET_REG_BASE
2416 {
2417 MS_PHY u32NonPMBankSize = 0;
2418 MS_VIRT u32RiuBaseAdd = 0;
2419
2420 if (!MDrv_MMIO_GetBASE(&u32RiuBaseAdd, &u32NonPMBankSize, MS_MODULE_HW))
2421 {
2422 HVD_EX_MSG_ERR("MMIO_GetBASE failure\n");
2423 return eRet;
2424 }
2425 else
2426 {
2427 HVD_EX_MSG_DBG("u32RiuBaseAdd=0x%lx\n", (unsigned long)u32RiuBaseAdd);
2428 HAL_HVD_EX_InitRegBase(u32RiuBaseAdd);
2429 }
2430
2431 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
2432 HAL_HVD_EX_SetHwRegBase(u32Id, pStInitSettings->u32ModeFlag); //HVD or EVD
2433 #endif
2434 }
2435 #endif
2436
2437 HVD_EX_MSG_DBG("system call type: Mutex:%d clock:%d delay:%d asm_sync:%d\n",
2438 HVD_ENABLE_MUTEX_PROTECT, HVD_SYSTEM_CLOCK_TYPE, HVD_SYSTEM_DELAY_MS_TYPE, HVD_MEMORY_BARRIER_TYPE);
2439
2440 if (u32UartCtrl & E_HVD_UART_CTRL_INFO)
2441 {
2442 MS_U32 u32delaytime = 5;
2443 MS_U32 u32FirstTime = HVD_GetSysTime_ms();
2444 MS_U32 u32SecondTime = 0;
2445
2446 HVD_Delay_ms(u32delaytime);
2447 u32SecondTime = HVD_GetSysTime_ms();
2448
2449 HVD_EX_MSG_DBG("MSOS API check: 1st:%u 2nd:%u delay:%u dif:%u\n",
2450 u32FirstTime, u32SecondTime, u32delaytime, u32SecondTime - u32FirstTime);
2451 }
2452
2453 #if HVD_ENABLE_TIME_MEASURE
2454 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2455 #endif
2456
2457 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bUsed)
2458 {
2459 HVD_EX_MSG_ERR("re-init HVD Driver\n");
2460
2461 #if HVD_ENABLE_REINIT_FAILED
2462 eRet = E_HVD_EX_RET_RE_INIT;
2463 return eRet;
2464 #endif
2465 }
2466
2467 // disable ISR when there is no one using ISR
2468 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
2469 MS_BOOL bUsed;
2470 #if defined(CHIP_KANO) || defined(CHIP_CURRY)
2471 if (u8Cidx == HWDEC_EVD_LITE)
2472 {
2473 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_EVDLITE);
2474 }
2475 else
2476 #endif
2477 if (((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC) || ((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_VP9))
2478 {
2479 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_EVD);
2480 }
2481 else
2482 {
2483 bUsed = MDrv_HVD_checkISR(u32Id, u8DrvId, E_HWDEC_ISR_HVD);
2484 }
2485
2486 if (bUsed == FALSE)
2487 HAL_HVD_EX_EnableISR(u32Id, FALSE);
2488 #else
2489 HAL_HVD_EX_EnableISR(FALSE);
2490 #endif
2491 // For TEE
2492 _HVD_EX_SetShareInfoAddr(u32Id);
2493
2494 eRet = _HVD_EX_InitVariables(u32Id, pStMemCfg, (HVD_Init_Params *) pStInitSettings);
2495
2496 if (eRet != E_HVD_EX_OK)
2497 {
2498 return eRet;
2499 }
2500
2501 #ifdef VDEC3
2502 pCtrl->bNStreamMode = bDRVdecideBS;
2503 #endif
2504
2505 #if SUPPORT_EVD
2506 #if defined(CHIP_KANO) || defined(CHIP_CURRY)
2507 if (u8Cidx == HWDEC_EVD_LITE)
2508 {
2509 pCtrl->HVDISRCtrl.eHWDecIsr = E_HWDEC_ISR_EVDLITE;
2510 }
2511 else
2512 #endif
2513 if ((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC)
2514 {
2515 pCtrl->HVDISRCtrl.eHWDecIsr = E_HWDEC_ISR_EVD;
2516 }
2517 #if SUPPORT_G2VP9
2518 else if((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_VP9)
2519 {
2520 pCtrl->HVDISRCtrl.eHWDecIsr = E_HWDEC_ISR_G2VP9;
2521 }
2522 #endif
2523 #if SUPPORT_MSVP9
2524 else if((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_VP9)
2525 {
2526 pCtrl->HVDISRCtrl.eHWDecIsr = E_HWDEC_ISR_EVD;
2527 }
2528 #endif
2529 else
2530 #endif
2531 {
2532 pCtrl->HVDISRCtrl.eHWDecIsr = E_HWDEC_ISR_HVD;
2533 }
2534
2535
2536 #if HVD_ENABLE_TIME_MEASURE
2537 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2538 #endif
2539
2540 _DRV_HVD_EX_Entry(u8DrvId);
2541
2542 eRet = _HVD_EX_Check_Cmd(u32Id, E_HVD_CHECK_CMD_INIT);
2543
2544 if (eRet != E_HVD_EX_OK)
2545 {
2546 _DRV_HVD_EX_RET(u8DrvId, eRet);
2547 }
2548
2549 #if HVD_ENABLE_TIME_MEASURE
2550 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2551 #endif
2552
2553 #ifdef VDEC3
2554 #if SUPPORT_G2VP9
2555 HAL_VPU_EX_SetBitstreamBufAddress(u32Id, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32TotalBitstreamBufAddr);
2556 #endif
2557
2558 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32BBUId = HAL_HVD_EX_GetBBUId(u32Id);
2559
2560 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32BBUId == HAL_HVD_INVALID_BBU_ID)
2561 {
2562 eRet = E_HVD_EX_FAIL;
2563
2564 HVD_EX_MSG_ERR("driver init failed due to no valid bbu id.\n");
2565
2566 _DRV_HVD_EX_RET(u8DrvId, eRet);
2567 }
2568 #endif
2569
2570 eRet = _HVD_EX_Init_(u32Id,pStInitSettings->u32ModeFlag);
2571
2572 if (eRet != E_HVD_EX_OK)
2573 {
2574 _DRV_HVD_EX_RET(u8DrvId, eRet);
2575 }
2576
2577 #if HVD_ENABLE_TIME_MEASURE
2578 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2579 #endif
2580
2581 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32DummyWriteBuf = MsOS_PA2KSEG1(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DUMMY_WRITE_ADDR));
2582 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
2583 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bUsed = TRUE;
2584 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32Sid = u32Id;
2585 #if HVD_ENABLE_MVC
2586 if((pStInitSettings->u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
2587 {
2588 pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1].u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
2589 pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1].bUsed = TRUE;
2590 pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1].u32Sid = u32Id+0x00011000;
2591 pHVDDrvContext->bHVDIsInited[u8DrvId+1] = TRUE;
2592 }
2593 #endif /// HVD_ENABLE_MVC
2594 pHVDDrvContext->bHVDIsInited[u8DrvId] = TRUE;
2595 eRet = E_HVD_EX_OK;
2596
2597 HVD_EX_MSG_INF("driver Init successfully.\n");
2598
2599 _DRV_HVD_EX_RET(u8DrvId, eRet);
2600 }
2601
2602 //-----------------------------------------------------------------------------
2603 /// @brief \b Function \b Name: MDrv_HVD_EX_Rst()
2604 /// @brief \b Function \b Description: Reset HVD driver
2605 /// @param -bErrHandle \b IN : reset option HVD driver
2606 /// -FALSE(0): Reset HVD to clear mode.( do not recovery SPS)
2607 /// -TRUE(1): Reset HVD to clear mode, and recovery SPS.
2608 /// @return -The result of reset process
2609 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Rst(MS_U32 u32Id,MS_BOOL bErrHandle)2610 HVD_EX_Result MDrv_HVD_EX_Rst(MS_U32 u32Id, MS_BOOL bErrHandle)
2611 {
2612 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2613 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2614
2615 HVD_EX_MSG_TRACE();
2616 _DRV_HVD_Inited(u8DrvId,eRet);
2617
2618 if (bErrHandle == TRUE)
2619 {
2620 HVD_EX_MSG_ERR("HVD Not supported reset(TRUE) yet\n");
2621 return E_HVD_EX_RET_INVALID_PARAMETER;
2622 }
2623
2624 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) != HVD_INIT_MAIN_LIVE_STREAM)
2625 {
2626 HVD_EX_MSG_ERR("HVD rst() only support live stream mode\n");
2627 return E_HVD_EX_RET_INVALID_PARAMETER;
2628 }
2629
2630 //In this function we should delete task and then create task.
2631 HVD_EX_SetRstFlag(u32Id, TRUE);
2632
2633 eRet = _HVD_EX_Rst(u32Id, bErrHandle);
2634
2635 if (eRet != E_HVD_EX_OK)
2636 {
2637 return (eRet);
2638 }
2639
2640 eRet = _HVD_EX_RecoverySettings(u32Id);
2641
2642 if (eRet != E_HVD_EX_OK)
2643 {
2644 return (eRet);
2645 }
2646
2647 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
2648 pHVDDrvContext->bHVDIsInited[u8DrvId] = TRUE;
2649
2650 return eRet;
2651 }
2652
2653 //-----------------------------------------------------------------------------
2654 /// @brief \b Function \b Name: MDrv_HVD_EX_Play()
2655 /// @brief \b Function \b Description: Play HVD
2656 /// @return -The result of command play
2657 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Play(MS_U32 u32Id)2658 HVD_EX_Result MDrv_HVD_EX_Play(MS_U32 u32Id)
2659 {
2660 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2661 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2662
2663 HVD_EX_MSG_TRACE();
2664 _DRV_HVD_Inited(u8DrvId,eRet);
2665 _DRV_HVD_EX_Entry(u8DrvId);
2666
2667 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
2668 if (MDrv_HVD_EX_GetPlayState(u32Id) != E_HVD_EX_GSTATE_PLAY || pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding)
2669 #endif
2670 {
2671 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
2672
2673 if (eRet != E_HVD_EX_OK)
2674 {
2675 _DRV_HVD_EX_RET(u8DrvId, eRet);
2676 }
2677 }
2678
2679 // step display off
2680 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 0);
2681
2682 if (eRet == E_HVD_EX_OK)
2683 {
2684 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
2685 }
2686
2687 _DRV_HVD_EX_RET(u8DrvId, eRet);
2688 }
2689
2690 //-----------------------------------------------------------------------------
2691 /// @brief \b Function \b Name: MDrv_HVD_EX_Exit()
2692 /// @brief \b Function \b Description: Stop HVD and release resource.
2693 /// @return -The result of command stop
2694 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Exit(MS_U32 u32Id)2695 HVD_EX_Result MDrv_HVD_EX_Exit(MS_U32 u32Id)
2696 {
2697 MS_U32 u32Timer = 0;
2698 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2699 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2700 MS_U8 u8HalIdx = _HVD_EX_GetStreamIdx(u32Id);
2701
2702 HVD_EX_MSG_TRACE();
2703 HAL_VPU_EX_ReleaseFreeStream(u8HalIdx);
2704 _DRV_HVD_Inited(u8DrvId,eRet);
2705 _DRV_HVD_Rsting(u8DrvId,eRet);
2706
2707 #if 0
2708 #if defined(SUPPORT_CMA)
2709 if (pHVDDrvContext->bCMAUsed)
2710 {
2711 if (MApi_CMA_Pool_PutMem(&pHVDDrvContext->cmaFreeParam[0][u8DrvId]) == FALSE)
2712 return E_HVD_EX_RET_CMA_ERROR;
2713 HVD_EX_MSG_DBG("[0x%lx]MApi_CMA_Pool_PutMem: offset=0x%lx, len=0x%lx\n", u32Id, pHVDDrvContext->cmaFreeParam[0][u8DrvId].offset_in_pool, pHVDDrvContext->cmaFreeParam[0][u8DrvId].length);
2714 if (pHVDDrvContext->bCMATwoMIU[u8DrvId])
2715 {
2716 if (MApi_CMA_Pool_PutMem(&pHVDDrvContext->cmaFreeParam[1][u8DrvId]) == FALSE)
2717 return E_HVD_EX_RET_CMA_ERROR;
2718 HVD_EX_MSG_DBG("[0x%lx]MApi_CMA_Pool_PutMem: offset=0x%lx, len=0x%lx\n", u32Id, pHVDDrvContext->cmaFreeParam[1][u8DrvId].offset_in_pool, pHVDDrvContext->cmaFreeParam[1][u8DrvId].length);
2719 }
2720 }
2721 #endif
2722 #endif
2723
2724 #ifdef VDEC3
2725 if (!HAL_HVD_EX_FreeBBUId(u32Id, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32BBUId))
2726 {
2727 HVD_EX_MSG_ERR("free bbu id (%d) failed\n", pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32BBUId);
2728 }
2729 #endif
2730
2731 #if HVD_ENABLE_MVC
2732 if((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
2733 {
2734 pHVDDrvContext->bHVDIsInited[u8DrvId+1] = FALSE;
2735 }
2736 #endif /// HVD_ENABLE_MVC
2737
2738 do
2739 {
2740 u32Timer++;
2741
2742 if (u32Timer >= HVD_FW_EXIT_ACTION_TIMEOUT)
2743 {
2744 eRet = E_HVD_EX_RET_TIMEOUT;
2745 HVD_EX_MSG_ERR("exit time out~~~`\n");
2746 //return eRet;
2747 break;
2748 }
2749 else
2750 {
2751 HVD_Delay_ms(1);
2752 }
2753 } while (_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_PROCESSING));
2754
2755 // release ISR callback
2756 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.bRegISR)
2757 {
2758 if (E_HVD_EX_OK != MDrv_HVD_EX_SetISREvent(u32Id, E_HVD_EX_ISR_NONE, NULL))
2759 {
2760 HVD_EX_MSG_ERR("MDrv_HVD_EX_Exit: dettach isr fail\n");
2761 }
2762 }
2763 pHVDDrvContext->bHVDIsInited[u8DrvId] = FALSE;
2764 // close HVD FW
2765 eRet = (HVD_EX_Result) HAL_HVD_EX_DeInit(u32Id);
2766
2767 if(eRet == E_HVD_EX_RET_TIMEOUT)
2768 {
2769 HVD_EX_MSG_ERR("force delete task ,cause cmd timeout \n");
2770 eRet = E_HVD_EX_OK;
2771 }
2772
2773 #if HVD_ENABLE_MVC
2774 if((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
2775 {
2776 memset((void *) &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]), 0, sizeof(HVD_EX_Drv_Ctrl));
2777 }
2778 #endif /// HVD_ENABLE_MVC
2779
2780 // reset internal control variables
2781 memset((void *) &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]), 0, sizeof(HVD_EX_Drv_Ctrl));
2782 memset((void *) &(pHVDDrvContext->gHVDPreCtrl[u8DrvId]), 0, sizeof(HVD_Pre_Ctrl));
2783
2784 return eRet;
2785 }
2786
2787 //-----------------------------------------------------------------------------
2788 /// @brief \b Function \b Name: MDrv_HVD_EX_Pause()
2789 /// @brief \b Function \b Description: Pause HVD
2790 /// @return -The result of command pause
2791 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Pause(MS_U32 u32Id)2792 HVD_EX_Result MDrv_HVD_EX_Pause(MS_U32 u32Id)
2793 {
2794 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2795 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2796
2797 HVD_EX_MSG_TRACE();
2798 _DRV_HVD_Inited(u8DrvId,eRet);
2799 _DRV_HVD_EX_Entry(u8DrvId);
2800
2801 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PAUSE, 0);
2802
2803 if (eRet != E_HVD_EX_OK)
2804 {
2805 _DRV_HVD_EX_RET(u8DrvId, eRet);
2806 }
2807
2808 // step display off
2809 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 0);
2810
2811 if (eRet == E_HVD_EX_OK)
2812 {
2813 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
2814 }
2815
2816 _DRV_HVD_EX_RET(u8DrvId, eRet);
2817 }
2818
2819 //-----------------------------------------------------------------------------
2820 /// @brief \b Function \b Name: MDrv_HVD_EX_Flush()
2821 /// @brief \b Function \b Description: Flush queue and buffer
2822 /// @param -bShowLast \b IN : TRUE / FALSE
2823 /// -FALSE(0): show current displayed frame
2824 /// -TRUE(1): show last decoded frame
2825 /// @return -The result of command flush
2826 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Flush(MS_U32 u32Id,MS_BOOL bShowLast)2827 HVD_EX_Result MDrv_HVD_EX_Flush(MS_U32 u32Id, MS_BOOL bShowLast)
2828 {
2829 MS_U32 u32Times = 0;
2830 MS_U32 u32FlushTime = 0;
2831 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2832 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2833 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2834
2835 HVD_EX_MSG_TRACE();
2836 _DRV_HVD_Inited(u8DrvId,eRet);
2837 _DRV_HVD_EX_Entry(u8DrvId);
2838
2839 // pause first
2840 if (MDrv_HVD_EX_GetPlayState(u32Id) != E_HVD_EX_GSTATE_PAUSE)
2841 {
2842 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PAUSE, 0);
2843
2844 if (eRet != E_HVD_EX_OK)
2845 {
2846 _DRV_HVD_EX_RET(u8DrvId, eRet);
2847 }
2848
2849 // check flush done
2850 while (1)
2851 {
2852 if (MDrv_HVD_EX_GetPlayState(u32Id) == E_HVD_EX_GSTATE_PAUSE)
2853 {
2854 break;
2855 }
2856
2857 u32Times++;
2858 HVD_Delay_ms(1);
2859
2860 if (u32Times > 100)
2861 {
2862 HVD_EX_MSG_INF("pause in flush() not finished.\n");
2863 break;
2864 }
2865 }
2866 }
2867
2868 // step display off
2869 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 0);
2870
2871 if (eRet == E_HVD_EX_OK)
2872 {
2873 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
2874 }
2875
2876 #ifndef VDEC3
2877 #if HVD_ENABLE_RV_FEATURE
2878 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM)
2879 {
2880 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LastNal.bRVBrokenPacket)
2881 {
2882 HVD_BBU_Info bbuInfo = {0,0,0,0,0,0,0,0,0,0} ;
2883
2884 HVD_EX_MSG_INF("push dummy packet for broken by us packet\n");
2885
2886 bbuInfo.u32Length = bbuInfo.u32AllocLength = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32RV_FlushPacketSize;
2887 bbuInfo.u32Staddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32RV_FlushPacketAddr - pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr;
2888 bbuInfo.u32OriPktAddr = bbuInfo.u32Staddr;
2889 bbuInfo.bRVBrokenPacket = FALSE;
2890
2891 eRet = (HVD_EX_Result) HAL_HVD_EX_PushPacket(u32Id, (HVD_BBU_Info *) &bbuInfo);
2892 }
2893 }
2894 #endif
2895
2896 // fire all packet to FW
2897 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR_FIRED) != HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR))
2898 {
2899 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
2900 }
2901 #endif
2902
2903 // send command
2904 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_RUNNING);
2905 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FLUSH, (MS_U32) bShowLast);
2906
2907 u32FlushTime = 0;
2908
2909 if (eRet != E_HVD_EX_OK)
2910 {
2911 _DRV_HVD_EX_RET(u8DrvId, eRet);
2912 }
2913
2914 // check flush done only for raw file mode
2915 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
2916 {
2917 while (1)
2918 {
2919 #ifndef VDEC3
2920 //_DRV_HVD_PushDummy();
2921 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP8)
2922 {
2923 if (_HVD_EX_IsAllBufferEmpty_VP8(u32Id))
2924 {
2925 eRet = E_HVD_EX_OK;
2926 HVD_EX_MSG_INF("[Check Flush Done] flush queue empty\n");
2927 break;
2928 }
2929 }
2930 else
2931 #endif
2932 {
2933 #ifdef VDEC3
2934 if (_HVD_EX_IsAllBufferEmpty(u32Id, TRUE))
2935 #else
2936 if (_HVD_EX_IsAllBufferEmpty(u32Id) && (u32FlushTime >= 50))
2937 #endif
2938 {
2939 eRet = E_HVD_EX_OK;
2940 break;
2941 }
2942 }
2943 u32Times++;
2944 u32FlushTime++;
2945 HVD_Delay_ms(1);
2946 if (u32Times > 1000)
2947 {
2948 HVD_EX_MSG_ERR("Flush() timeout failed: BBU:%lu Dec:%lu Disp:%lu Idle:%lu ESr:%lx ESw:%lx\n",
2949 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB),
2950 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB),
2951 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB),
2952 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT),
2953 (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR), (unsigned long)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR));
2954 eRet = E_HVD_EX_FAIL;
2955 break;
2956 }
2957 }
2958 // reset byte_cnt
2959 HAL_HVD_EX_RstPTSCtrlVariable(u32Id);
2960 }
2961 #ifndef VDEC3
2962 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
2963 {
2964 case HVD_INIT_HW_VP8:
2965 //HVD_PRINT("[DRV1] BBU WRp = %x, RDp = %x\n",HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR),HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR));
2966 //HAL_HVD_EX_SetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR, HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR));
2967 //HVD_PRINT("[DRV2] BBU WRp = %x, RDp = %x\n",HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR),HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR));
2968 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
2969 break;
2970 default:
2971 break;
2972 }
2973 #endif
2974
2975 HAL_HVD_EX_FlushRstShareMem(u32Id);
2976 pCtrl->u32FlushRstPtr = 1;
2977
2978 // MediaCodec need this to let scan mode to be normal.
2979 if (0) //bPlayback)
2980 {
2981 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
2982
2983 if (eRet != E_HVD_EX_OK)
2984 {
2985 _DRV_HVD_EX_RET(u8DrvId, eRet);
2986 }
2987 }
2988
2989 _DRV_HVD_EX_RET(u8DrvId, eRet);
2990 }
2991
2992 //-----------------------------------------------------------------------------
2993 /// @brief \b Function \b Name: MDrv_HVD_EX_StepDisp()
2994 /// @brief \b Function \b Description: Trigger HVD to show one frame
2995 /// @return -The result of command trigger display
2996 //-----------------------------------------------------------------------------
MDrv_HVD_EX_StepDisp(MS_U32 u32Id)2997 HVD_EX_Result MDrv_HVD_EX_StepDisp(MS_U32 u32Id)
2998 {
2999 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3000 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3001
3002 HVD_EX_MSG_TRACE();
3003 _DRV_HVD_Inited(u8DrvId,eRet);
3004 _DRV_HVD_EX_Entry(u8DrvId);
3005
3006 // check command
3007 eRet = _HVD_EX_Check_Cmd(u8DrvId, E_HVD_CHECK_CMD_TRIGGER_DISP);
3008
3009 if (eRet != E_HVD_EX_OK)
3010 {
3011 _DRV_HVD_EX_RET(u8DrvId, eRet);
3012 }
3013
3014 // step display on
3015 if (_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL))
3016 {
3017 if (MDrv_HVD_EX_IsFrameShowed(u32Id))
3018 {
3019 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 1);
3020 }
3021 else
3022 {
3023 HVD_EX_MSG_INF("Previous Step Display command is not finished\n");
3024 eRet = E_HVD_EX_OK;
3025 }
3026 }
3027 else
3028 {
3029 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 1);
3030
3031 if (eRet == E_HVD_EX_OK)
3032 {
3033 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL);
3034 }
3035 }
3036 // enter play mode
3037 if (1) //HAL_HVD_EX_GetData(E_HVD_GDATA_FW_STATE) == E_HVD_FW_PAUSE )
3038 {
3039 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
3040
3041 if (eRet != E_HVD_EX_OK)
3042 {
3043 _DRV_HVD_EX_RET(u8DrvId, eRet);
3044 }
3045 }
3046 _DRV_HVD_EX_RET(u8DrvId, eRet);
3047 }
3048
3049 //-----------------------------------------------------------------------------
3050 /// @brief \b Function \b Name: MDrv_HVD_EX_StepDecode()
3051 /// @brief \b Function \b Description: Step decode one frame
3052 //-----------------------------------------------------------------------------
MDrv_HVD_EX_StepDecode(MS_U32 u32Id)3053 HVD_EX_Result MDrv_HVD_EX_StepDecode(MS_U32 u32Id)
3054 {
3055 MS_U32 u32Times = 0;
3056 MS_U32 FWState = 0;
3057 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3058 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3059
3060 HVD_EX_MSG_TRACE();
3061 _DRV_HVD_Inited(u8DrvId,eRet);
3062 _DRV_HVD_EX_Entry(u8DrvId);
3063
3064 // check if step decoding
3065 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding)
3066 {
3067 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt == HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT))
3068 {
3069 eRet = E_HVD_EX_RET_NOTREADY;
3070 _DRV_HVD_EX_RET(u8DrvId, eRet);
3071 }
3072 }
3073
3074 // Pause first
3075 FWState = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE);
3076
3077 if (FWState != (MS_U32) E_HVD_FW_PAUSE)
3078 {
3079 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PAUSE, 0);
3080
3081 if (eRet != E_HVD_EX_OK)
3082 {
3083 _DRV_HVD_EX_RET(u8DrvId, eRet);
3084 }
3085 while (FWState != ((MS_U32) E_HVD_FW_PAUSE) && u32Times <= 10000)
3086 {
3087 FWState = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE);
3088 u32Times++;
3089 HVD_Delay_ms(1);
3090 }
3091 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE) != E_HVD_FW_PAUSE)
3092 {
3093 eRet = E_HVD_EX_FAIL;
3094 _DRV_HVD_EX_RET(u8DrvId, eRet);
3095 }
3096 }
3097
3098 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding = TRUE;
3099 // get decode cnt
3100 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT);
3101 // step decode
3102 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_STEP_DECODE, 0);
3103
3104 _DRV_HVD_EX_RET(u8DrvId, eRet);
3105 }
3106
3107 // set command, action, status, input
3108 //-----------------------------------------------------------------------------
3109 /// @brief \b Function \b Name: MDrv_HVD_EX_PushQueue()
3110 /// @brief \b Function \b Description: push one entry into the decoding table(BBU table).
3111 /// @param -pInfo \b IN : Pointer to the information of input packet.
3112 /// @return -The result of command push queue
3113 //-----------------------------------------------------------------------------
MDrv_HVD_EX_PushQueue(MS_U32 u32Id,HVD_EX_PacketInfo * pInfo)3114 HVD_EX_Result MDrv_HVD_EX_PushQueue(MS_U32 u32Id, HVD_EX_PacketInfo *pInfo)
3115 {
3116 #ifdef VDEC3
3117 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3118 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
3119 HAL_VPU_EX_PacketInfo stVpuPkt;
3120
3121 if (pCtrl->bNStreamMode)
3122 stVpuPkt.u32Offset = pInfo->u32Staddr + (pCtrl->MemMap.u32BitstreamBufAddr - pCtrl->MemMap.u32TotalBitstreamBufAddr); // NStream will share the same ES buffer
3123 else
3124 stVpuPkt.u32Offset = pInfo->u32Staddr;
3125
3126 stVpuPkt.u32Length = pInfo->u32Length;
3127 stVpuPkt.u64TimeStamp = (MS_U64)pInfo->u32TimeStamp;
3128 //If in display queue mode
3129 stVpuPkt.u64TimeStamp |= ((MS_U64)pInfo->u32ID_H << 32);
3130 stVpuPkt.u32ID_H = pInfo->u32ID_H;
3131 stVpuPkt.u32ID_L = pInfo->u32ID_L;
3132
3133 MS_VIRT u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
3134
3135 return (HVD_EX_Result)HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt, u32VBBUAddr);
3136 #else
3137 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3138 MS_BOOL bNULLPacket = FALSE;
3139 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3140 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
3141 HVD_BBU_Info bbuInfo;
3142
3143 //******** for 4kx2k stream ********//
3144 MS_U8 u8Part = 0;
3145 MS_BOOL bPartToBeSend[QUANTITY_AFTER_BROKEN_BY_US]={0};
3146 MS_U32 u32PartLen[QUANTITY_AFTER_BROKEN_BY_US]={0};
3147 MS_U32 u32PartAllocLen[QUANTITY_AFTER_BROKEN_BY_US]={0};
3148
3149 HVD_EX_MSG_TRACE();
3150 _DRV_HVD_Inited(u8DrvId,eRet);
3151 _DRV_HVD_EX_Entry(u8DrvId);
3152
3153 if (pInfo == NULL)
3154 {
3155 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3156 _DRV_HVD_EX_RET(u8DrvId, eRet);
3157 }
3158 else if ((pInfo->u32Length >= HVD_BBU_TAG_LIMITATION) && (pInfo->u32Length < MAX_QUANTITY))
3159 {
3160 HVD_EX_MSG_DBG("input packet size(0x%lx) larger than HW_bbu_tag_limit max packet size(0x%x), AllocLength(0x%lx); to play 4kx2k stream, break it by us \n",
3161 pInfo->u32Length, HVD_BBU_TAG_LIMITATION, pInfo->u32AllocLength);
3162
3163 bPartToBeSend[1] = TRUE;
3164 u32PartLen[1] = pInfo->u32Length - QUANTITY_LENGTH;
3165 u32PartAllocLen[1] = pInfo->u32AllocLength - QUANTITY_LENGTH;
3166
3167 pInfo->u32Length = QUANTITY_LENGTH;
3168 pInfo->u32AllocLength = QUANTITY_LENGTH;
3169 pInfo->u32Staddr |= HVD_RV_BROKEN_BY_US_MASK;
3170
3171 MS_U32 i;
3172 for(i=2; i< QUANTITY_AFTER_BROKEN_BY_US; i++)
3173 {
3174 if (u32PartLen[i-1] >= QUANTITY_LENGTH)
3175 {
3176 bPartToBeSend[i] = TRUE;
3177 u32PartLen[i] = u32PartLen[i-1] - QUANTITY_LENGTH;
3178 u32PartAllocLen[i] = u32PartAllocLen[i-1] - QUANTITY_LENGTH;
3179 u32PartLen[i-1] = QUANTITY_LENGTH;
3180 u32PartAllocLen[i-1] = QUANTITY_LENGTH;
3181 }
3182 else
3183 {
3184 break;
3185 }
3186 }
3187
3188 }
3189 else if (pInfo->u32Length >= MAX_QUANTITY)
3190 {
3191 HVD_EX_MSG_ERR("input packet size(0x%lx) larger than SW_defined_4kx2k max packet size(0x%x), AllocLength(0x%lx) \n",
3192 pInfo->u32Length, MAX_QUANTITY, pInfo->u32AllocLength);
3193 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3194 _DRV_HVD_EX_RET(u8DrvId, eRet);
3195 }
3196 else if ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_TSP)
3197 {
3198 HVD_EX_MSG_ERR("Init mode is TSP input and PushQueue() is not supported in TSP input\n");
3199 eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3200 _DRV_HVD_EX_RET(u8DrvId, eRet);
3201 }
3202 /*
3203 else if (((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
3204 (pInfo->u32Staddr >= pCtrl->MemMap.u32BitstreamBufSize))
3205 {
3206 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3207 _DRV_HVD_EX_RET(u8DrvId, eRet);
3208 }*/
3209
3210 bbuInfo.u32ID_H = pInfo->u32ID_H;
3211 bbuInfo.u32ID_L = pInfo->u32ID_L;
3212 bbuInfo.u32Length = pInfo->u32Length;
3213 bbuInfo.u32TimeStamp = pInfo->u32TimeStamp;
3214 bbuInfo.u32AllocLength = pInfo->u32AllocLength;
3215
3216 if (pInfo->u32Staddr & HVD_RV_BROKEN_BY_US_MASK)
3217 {
3218 bbuInfo.bRVBrokenPacket = TRUE;
3219 bbuInfo.u32OriPktAddr = pInfo->u32Staddr & (~HVD_RV_BROKEN_BY_US_MASK);
3220 bbuInfo.u32Staddr = pInfo->u32Staddr & (~HVD_RV_BROKEN_BY_US_MASK);
3221 }
3222 else
3223 {
3224 bbuInfo.bRVBrokenPacket = FALSE;
3225 bbuInfo.u32OriPktAddr = pInfo->u32Staddr;
3226 bbuInfo.u32Staddr = pInfo->u32Staddr;
3227 }
3228
3229
3230 if ( !bbuInfo.bRVBrokenPacket &&
3231 (pInfo->u32Staddr >= pCtrl->MemMap.u32BitstreamBufSize))
3232 {
3233 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3234 _DRV_HVD_EX_RET(u8DrvId, eRet);
3235 }
3236
3237
3238 bbuInfo.u32Staddr2 = pInfo->u32Staddr2;
3239 bbuInfo.u32Length2 = pInfo->u32Length2;
3240
3241 // invalid packet
3242 if ((bbuInfo.u32TimeStamp != HVD_U32_MAX) && (bbuInfo.u32Length == 0))
3243 {
3244 HVD_EX_MSG_INF("Invalid Packet(size:0x%lx PTS:0x%lx)\n ", bbuInfo.u32Length, bbuInfo.u32TimeStamp);
3245 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3246 _DRV_HVD_EX_RET(u8DrvId, eRet);
3247 }
3248 // AVI NULL packet
3249 #if HVD_ENABLE_AUTO_AVI_NULL_PACKET
3250 else if ((bbuInfo.u32TimeStamp == HVD_U32_MAX) && (bbuInfo.u32Length == 0))
3251 {
3252 if (pCtrl->bNoDrvProccBuf)
3253 {
3254 HVD_EX_MSG_INF
3255 ("AVI Null Packet(size:0x%lx PTS:0x%lx), but do not have enough driver process buffer(0x%lx)\n ",
3256 pInfo->u32Length, bbuInfo.u32TimeStamp, pCtrl->MemMap.u32DrvProcessBufSize);
3257 eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3258 _DRV_HVD_EX_RET(u8DrvId, eRet);
3259 }
3260 else
3261 {
3262 bNULLPacket = TRUE;
3263 bbuInfo.u32Length = pCtrl->u32NULLPacketSize;
3264 bbuInfo.u32Staddr = pCtrl->u32NULLPacketAddr - pCtrl->MemMap.u32BitstreamBufAddr;
3265 }
3266 }
3267 #endif
3268
3269 // the else are all normal cases.
3270 if (MDrv_HVD_EX_GetBBUVacancy(u32Id) != 0)
3271 {
3272 MS_U32 u32ESRptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR);
3273 MS_U32 u32ESWptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR);
3274
3275 if ((u32ESRptr <= u32ESWptr) &&
3276 (pCtrl->MemMap.u32BitstreamBufSize < bbuInfo.u32Staddr + bbuInfo.u32Length))
3277 {
3278 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) may cause bitstream buffer overflow (0x%lx 0x%lx) 0x%lx\n ",
3279 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3280 u32ESRptr, u32ESWptr, pCtrl->MemMap.u32BitstreamBufSize);
3281 }
3282
3283 if ((u32ESWptr < u32ESRptr) &&
3284 (u32ESWptr < bbuInfo.u32Staddr) &&
3285 (bbuInfo.u32Staddr < u32ESRptr) &&
3286 (u32ESRptr <= bbuInfo.u32Staddr + bbuInfo.u32Length))
3287 {
3288 HVD_EX_MSG_ERR("input packet (staddr=0x%lx, len=0x%lx) may overwrite undecoded data (rptr=0x%lx wptr=0x%lx)\n ",
3289 bbuInfo.u32Staddr, bbuInfo.u32Length, u32ESRptr, u32ESWptr);
3290 }
3291
3292 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) &&
3293 (!bNULLPacket) &&
3294 (pCtrl->MemMap.u32DrvProcessBufSize != 0) &&
3295 (pCtrl->MemMap.u32BitstreamBufAddr <= pCtrl->MemMap.u32DrvProcessBufAddr) &&
3296 (pCtrl->MemMap.u32DrvProcessBufAddr < (pCtrl->MemMap.u32BitstreamBufAddr + pCtrl->MemMap.u32BitstreamBufSize)))
3297 {
3298 MS_U32 u32Lower = pCtrl->MemMap.u32DrvProcessBufAddr - pCtrl->MemMap.u32BitstreamBufAddr;
3299 MS_U32 u32Upper = u32Lower + pCtrl->MemMap.u32DrvProcessBufSize;
3300
3301 if (((u32Lower <= bbuInfo.u32Staddr) && (bbuInfo.u32Staddr < u32Upper)) ||
3302 ((u32Lower <= (bbuInfo.u32Staddr + bbuInfo.u32Length)) && ((bbuInfo.u32Staddr + bbuInfo.u32Length) < u32Upper)) ||
3303 ((bbuInfo.u32Staddr < u32Lower) && (u32Upper <= (bbuInfo.u32Staddr + bbuInfo.u32Length))))
3304 {
3305 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) is located in HVD driver process buffer(0x%lx 0x%lx)\n ",
3306 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3307 u32Lower, u32Upper);
3308 }
3309 }
3310
3311 //for debug
3312 #if 0
3313 {
3314 HVD_EX_MSG_INF("HVD : %u (%u %u) ID:%x input packet (%x %x %x) (%x %x %x) (%u %u %u)\n ",
3315 pCtrl->u32BBUPacketCnt, MDrv_HVD_EX_GetDataErrCnt(u32Id), MDrv_HVD_EX_GetDecErrCnt(u32Id),
3316 bbuInfo.u32ID_L, bbuInfo.u32Staddr + bbuInfo.u32Length, bbuInfo.u32Length,
3317 bbuInfo.u32Staddr, u32ESRptr, pCtrl->MemMap.u32BitstreamBufSize, u32ESWptr,
3318 MDrv_HVD_EX_GetBBUVacancy(u32Id), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR),
3319 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR));
3320 }
3321 #endif
3322
3323 if ( (!bbuInfo.bRVBrokenPacket)&&
3324 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
3325 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_VP8) &&
3326 (pCtrl->bAutoRmLastZeroByte) &&
3327 ((!pCtrl->bCannotAccessMIU256) || ((pCtrl->bCannotAccessMIU256) && (pCtrl->MemMap.u32BitstreamBufAddr < pCtrl->MemMap.u32MIU1BaseAddr))))
3328 {
3329 if ((pCtrl->u8SecureMode == E_HVD_SECURE_MODE_NONE) && (!(pHVDDrvContext->bVPUIsSecureMode)))
3330 {
3331 MS_U32 ModifyCnt = 0;
3332 MS_U32 u32tmp = 0;
3333 MS_U8 *pByte = NULL;
3334 u32tmp = (bbuInfo.u32Staddr + bbuInfo.u32Length - 1);
3335 if (u32tmp >= pCtrl->MemMap.u32BitstreamBufSize)
3336 {
3337 u32tmp -= pCtrl->MemMap.u32BitstreamBufSize;
3338 }
3339 u32tmp += pCtrl->MemMap.u32BitstreamBufVAddr;
3340 pByte = (MS_U8 *) u32tmp;
3341
3342 if((bbuInfo.u32Length > 2)
3343 && ((*pByte == 0) && (*(pByte-1) == 0) && (*(pByte-2) == 0)))
3344 {
3345 //301385:
3346 //more then 2 zero bytes after valid bytes.
3347 //no need to remove pending zero bytes to prevent system busy
3348 //HVD_PRINT("no need to remove pending zero~~\n");
3349 }
3350 else
3351 {
3352 #if 1 //use if-condition instead of while-loop
3353 if(*pByte == 0)
3354 {
3355 ModifyCnt++;
3356 bbuInfo.u32Length--;
3357 pByte--;
3358
3359 if(bbuInfo.u32Length && (*pByte == 0))
3360 {
3361 ModifyCnt++;
3362 bbuInfo.u32Length--;
3363 }
3364 }
3365 #else
3366 while (1) //for( ModifyCnt=0 ; ModifyCnt<3;ModifyCnt++ )
3367 {
3368 if (bbuInfo.u32Length)
3369 {
3370 if (*pByte == 0)
3371 {
3372 /*
3373 if( ModifyCnt == 2 )
3374 {
3375 gHVDPacket.u32Length+=ModifyCnt;
3376 }
3377 else
3378 */
3379 {
3380 ModifyCnt++;
3381 bbuInfo.u32Length--;
3382 pByte--;
3383 }
3384 }
3385 else
3386 {
3387 break;
3388 }
3389 }
3390 else
3391 {
3392 break;
3393 }
3394 }
3395 #endif
3396 }
3397
3398 if (ModifyCnt != 0)
3399 {
3400 //HVD_MSG_INFO("HVD remove last zero byte:%u\n" , ModifyCnt);
3401 }
3402
3403 if (bbuInfo.u32Length == 0)
3404 {
3405 HVD_EX_MSG_ERR("Packet with all zero bytes(staddr:0x%x remove zero bytes:%u)\n ",
3406 bbuInfo.u32Staddr, ModifyCnt);
3407 eRet = E_HVD_EX_OK;
3408 _DRV_HVD_EX_RET(u8DrvId, eRet);
3409 }
3410 }
3411 }
3412 /*
3413 {
3414 MS_U8 *pByte=NULL;
3415 pByte = (MS_U8 *)((gHVDCtrl.MemMap.u32BitstreamBufVAddr) + gHVDPacket.u32Staddr );
3416 HVD_MSG_INFO("HVD remove last zero byte:%02x%02x%02x%02x\n" ,
3417 *pByte , *(pByte+1) , *(pByte+2) , *(pByte+3) );
3418 }
3419 */
3420 eRet = (HVD_EX_Result) HAL_HVD_EX_PushPacket(u32Id, (HVD_BBU_Info *) &bbuInfo);
3421 pCtrl->u32FlushRstPtr = 0;
3422 }
3423 else
3424 {
3425 HVD_EX_MSG_DBG("Push queue full\n");
3426 eRet = E_HVD_EX_RET_QUEUE_FULL;
3427 }
3428
3429 for ( u8Part = 1; u8Part < QUANTITY_AFTER_BROKEN_BY_US; u8Part++)
3430 {
3431 if (bPartToBeSend[u8Part])
3432 {
3433 pInfo->u32Staddr &= (~HVD_RV_BROKEN_BY_US_MASK);
3434 pInfo->u32Staddr += QUANTITY_LENGTH;
3435
3436 bbuInfo.u32ID_H = pInfo->u32ID_H;
3437 bbuInfo.u32ID_L = pInfo->u32ID_L;
3438 bbuInfo.u32Length = u32PartLen[u8Part];
3439 bbuInfo.u32TimeStamp = pInfo->u32TimeStamp;
3440 bbuInfo.u32AllocLength = u32PartAllocLen[u8Part];
3441
3442 if (u8Part != (QUANTITY_AFTER_BROKEN_BY_US - 1))
3443 {
3444 if (bPartToBeSend[u8Part+1])
3445 {
3446 bbuInfo.bRVBrokenPacket = TRUE;
3447 }
3448 else
3449 {
3450 bbuInfo.bRVBrokenPacket = FALSE;
3451 }
3452 }
3453 else
3454 {
3455 bbuInfo.bRVBrokenPacket = FALSE;
3456 }
3457
3458 bbuInfo.u32OriPktAddr = pInfo->u32Staddr;
3459 bbuInfo.u32Staddr = pInfo->u32Staddr;
3460
3461 bbuInfo.u32Staddr2 = pInfo->u32Staddr2;
3462 bbuInfo.u32Length2 = pInfo->u32Length2;
3463
3464 //if (MDrv_HVD_EX_GetBBUVacancy(u32Id) != 0)
3465 {
3466 MS_U32 u32ESRptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR);
3467 MS_U32 u32ESWptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR);
3468
3469 if ((u32ESRptr <= u32ESWptr) &&
3470 (pCtrl->MemMap.u32BitstreamBufSize < bbuInfo.u32Staddr + bbuInfo.u32Length))
3471 {
3472 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) may cause bitstream buffer overflow (0x%lx 0x%lx) 0x%lx\n ",
3473 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3474 u32ESRptr, u32ESWptr, pCtrl->MemMap.u32BitstreamBufSize);
3475 }
3476
3477 if ((u32ESWptr < u32ESRptr) &&
3478 (u32ESWptr < bbuInfo.u32Staddr) &&
3479 (bbuInfo.u32Staddr < u32ESRptr) &&
3480 (u32ESRptr <= bbuInfo.u32Staddr + bbuInfo.u32Length))
3481 {
3482 HVD_EX_MSG_ERR("input packet (staddr=0x%lx, len=0x%lx) may overwrite undecoded data (rptr=0x%lx wptr=0x%lx)\n ",
3483 bbuInfo.u32Staddr, bbuInfo.u32Length, u32ESRptr, u32ESWptr);
3484 }
3485
3486 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) &&
3487 (!bNULLPacket) &&
3488 (pCtrl->MemMap.u32DrvProcessBufSize != 0) &&
3489 (pCtrl->MemMap.u32BitstreamBufAddr <= pCtrl->MemMap.u32DrvProcessBufAddr) &&
3490 (pCtrl->MemMap.u32DrvProcessBufAddr < (pCtrl->MemMap.u32BitstreamBufAddr + pCtrl->MemMap.u32BitstreamBufSize)))
3491 {
3492 MS_U32 u32Lower = pCtrl->MemMap.u32DrvProcessBufAddr - pCtrl->MemMap.u32BitstreamBufAddr;
3493 MS_U32 u32Upper = u32Lower + pCtrl->MemMap.u32DrvProcessBufSize;
3494
3495 if (((u32Lower <= bbuInfo.u32Staddr) && (bbuInfo.u32Staddr < u32Upper)) ||
3496 ((u32Lower <= (bbuInfo.u32Staddr + bbuInfo.u32Length)) && ((bbuInfo.u32Staddr + bbuInfo.u32Length) < u32Upper)) ||
3497 ((bbuInfo.u32Staddr < u32Lower) && (u32Upper <= (bbuInfo.u32Staddr + bbuInfo.u32Length))))
3498 {
3499 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) is located in HVD driver process buffer(0x%lx 0x%lx)\n ",
3500 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3501 u32Lower, u32Upper);
3502 }
3503 }
3504
3505 //for debug
3506 #if 0
3507 {
3508 HVD_EX_MSG_INF("HVD : %u (%u %u) ID:%x input packet (%x %x %x) (%x %x %x) (%u %u %u)\n ",
3509 pCtrl->u32BBUPacketCnt, MDrv_HVD_EX_GetDataErrCnt(u32Id), MDrv_HVD_EX_GetDecErrCnt(u32Id),
3510 bbuInfo.u32ID_L, bbuInfo.u32Staddr + bbuInfo.u32Length, bbuInfo.u32Length,
3511 bbuInfo.u32Staddr, u32ESRptr, pCtrl->MemMap.u32BitstreamBufSize, u32ESWptr,
3512 MDrv_HVD_EX_GetBBUVacancy(u32Id), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR),
3513 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR));
3514 }
3515 #endif
3516
3517 if (((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
3518 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_VP8) &&
3519 (pCtrl->bAutoRmLastZeroByte) &&
3520 ((!pCtrl->bCannotAccessMIU256) || ((pCtrl->bCannotAccessMIU256) && (pCtrl->MemMap.u32BitstreamBufAddr < pCtrl->MemMap.u32MIU1BaseAddr))))
3521 {
3522 MS_U32 ModifyCnt = 0;
3523 while (1) //for( ModifyCnt=0 ; ModifyCnt<3;ModifyCnt++ )
3524 {
3525 if (bbuInfo.u32Length)
3526 {
3527 MS_U8 *pByte = NULL;
3528 MS_U32 u32tmp = 0;
3529 u32tmp = (bbuInfo.u32Staddr + bbuInfo.u32Length - 1);
3530 if (u32tmp >= pCtrl->MemMap.u32BitstreamBufSize)
3531 {
3532 u32tmp -= pCtrl->MemMap.u32BitstreamBufSize;
3533 }
3534 u32tmp += pCtrl->MemMap.u32BitstreamBufVAddr;
3535 pByte = (MS_U8 *) u32tmp;
3536 if (*pByte == 0)
3537 {
3538 /*
3539 if( ModifyCnt == 2 )
3540 {
3541 gHVDPacket.u32Length+=ModifyCnt;
3542 }
3543 else
3544 */
3545 {
3546 ModifyCnt++;
3547 bbuInfo.u32Length--;
3548 }
3549 }
3550 else
3551 {
3552 break;
3553 }
3554 }
3555 else
3556 {
3557 break;
3558 }
3559 }
3560 if (ModifyCnt != 0)
3561 {
3562 //HVD_MSG_INFO("HVD remove last zero byte:%u\n" , ModifyCnt);
3563 }
3564 if (bbuInfo.u32Length == 0)
3565 {
3566 HVD_EX_MSG_ERR("Packet with all zero bytes(staddr:0x%x remove zero bytes:%u)\n ",
3567 bbuInfo.u32Staddr, ModifyCnt);
3568 eRet = E_HVD_EX_OK;
3569 _DRV_HVD_EX_RET(u8DrvId, eRet);
3570 }
3571 }
3572 /*
3573 {
3574 MS_U8 *pByte=NULL;
3575 pByte = (MS_U8 *)((gHVDCtrl.MemMap.u32BitstreamBufVAddr) + gHVDPacket.u32Staddr );
3576 HVD_MSG_INFO("HVD remove last zero byte:%02x%02x%02x%02x\n" ,
3577 *pByte , *(pByte+1) , *(pByte+2) , *(pByte+3) );
3578 }
3579 */
3580 eRet = (HVD_EX_Result) HAL_HVD_EX_PushPacket(u32Id, (HVD_BBU_Info *) &bbuInfo);
3581 }
3582 }
3583 }
3584
3585 _DRV_HVD_EX_RET(u8DrvId, eRet);
3586 #endif
3587 }
3588
3589 //-----------------------------------------------------------------------------
3590 /// @brief \b Function \b Name: MDrv_HVD_EX_PushQueue_Fire()
3591 /// @brief \b Function \b Description: fire all waiting entry into the decoding table(BBU table).
3592 /// @return -The result of command push queue fire
3593 //-----------------------------------------------------------------------------
MDrv_HVD_EX_PushQueue_Fire(MS_U32 u32Id)3594 HVD_EX_Result MDrv_HVD_EX_PushQueue_Fire(MS_U32 u32Id)
3595 {
3596 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3597 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3598
3599 HVD_EX_MSG_TRACE();
3600 _DRV_HVD_Inited(u8DrvId,eRet);
3601 _DRV_HVD_EX_Entry(u8DrvId);
3602
3603 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
3604
3605 eRet = E_HVD_EX_OK;
3606 _DRV_HVD_EX_RET(u8DrvId, eRet);
3607 }
3608
3609 //-----------------------------------------------------------------------------
3610 /// @brief \b Function \b Name: MDrv_HVD_EX_DecodeIFrame()
3611 /// @brief \b Function \b Description: Decode I frame only under driver input path.
3612 /// @param -u32SrcSt \b IN : The physical address if user has input packet.
3613 /// @param -u32SrcSize \b IN : The packet size if user has input packet.
3614 /// @return -The result of command decode I frame.
3615 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DecodeIFrame(MS_U32 u32Id,MS_PHY u32SrcSt,MS_U32 u32SrcSize)3616 HVD_EX_Result MDrv_HVD_EX_DecodeIFrame(MS_U32 u32Id, MS_PHY u32SrcSt, MS_U32 u32SrcSize)
3617 {
3618 MS_U32 timer = 300;
3619 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3620 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3621
3622 HVD_EX_MSG_TRACE();
3623 _DRV_HVD_Inited(u8DrvId,eRet);
3624 _DRV_HVD_EX_Entry(u8DrvId);
3625
3626 eRet = MDrv_HVD_EX_Pause(u32Id);
3627
3628 if (eRet != E_HVD_EX_OK)
3629 {
3630 _DRV_HVD_EX_RET(u8DrvId, eRet);
3631 }
3632
3633 // skip decode I
3634 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_DEC, E_HVD_EX_SKIP_DECODE_I);
3635
3636 if (eRet != E_HVD_EX_OK)
3637 {
3638 _DRV_HVD_EX_RET(u8DrvId, eRet);
3639 }
3640
3641 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_I_DIRECT, TRUE);
3642
3643 if (eRet != E_HVD_EX_OK)
3644 {
3645 _DRV_HVD_EX_RET(u8DrvId, eRet);
3646 }
3647 eRet = MDrv_HVD_EX_StepDecode(u32Id);
3648 if (eRet != E_HVD_EX_OK)
3649 {
3650 _DRV_HVD_EX_RET(u8DrvId, eRet);
3651 }
3652
3653 if (E_HVD_INIT_INPUT_DRV == (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & E_HVD_INIT_INPUT_MASK))
3654 {
3655 HVD_EX_PacketInfo packet = {0,0,0,0,0,0,0,0};
3656
3657 if (u32SrcSize == 0)
3658 {
3659 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3660 HVD_EX_MSG_ERR("decode I frame input packet size is zero\n");
3661 _DRV_HVD_EX_RET(u8DrvId, eRet);
3662 }
3663
3664 packet.u32Staddr = u32SrcSt - pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr;
3665 packet.u32Length = u32SrcSize;
3666
3667 if ((packet.u32Staddr + packet.u32Length) > pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufSize)
3668 {
3669 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3670 HVD_EX_MSG_ERR
3671 ("decode I frame memory overflow, the packet end address is over ES buffer end address\n");
3672 _DRV_HVD_EX_RET(u8DrvId, eRet);
3673 }
3674 packet.u32TimeStamp = 0xFFFFFFFF;
3675 packet.u32ID_L = 0;
3676 packet.u32ID_H = 0;
3677 eRet = MDrv_HVD_EX_PushQueue(u32Id, &packet);
3678 if (E_HVD_EX_OK != eRet)
3679 {
3680 HVD_EX_MSG_ERR("decode I frame push queue fail %x\n", eRet);
3681 _DRV_HVD_EX_RET(u8DrvId, eRet);
3682 }
3683
3684 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
3685 }
3686 while (timer)
3687 {
3688 HVD_Delay_ms(1);
3689 if (MDrv_HVD_EX_IsStepDecodeDone(u32Id))
3690 {
3691 break;
3692 }
3693 timer--;
3694 }
3695 if (timer == 0)
3696 {
3697 eRet = E_HVD_EX_FAIL;
3698 HVD_EX_MSG_ERR("decode I frame time out, not enough data\n");
3699 _DRV_HVD_EX_RET(u8DrvId, eRet);
3700 }
3701 eRet = E_HVD_EX_OK;
3702 _DRV_HVD_EX_RET(u8DrvId, eRet);
3703 }
3704
3705 //-----------------------------------------------------------------------------
3706 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDataEnd()
3707 /// @brief \b Function \b Description: Upper layer set this to inform driver that there are no more data will be pushed.
3708 /// @param -bEnd \b IN : Enable/ Disable
3709 /// -FALSE(0): normal status( default )
3710 /// -TRUE(1): ending status
3711 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDataEnd(MS_U32 u32Id,MS_BOOL bEnd)3712 HVD_EX_Result MDrv_HVD_EX_SetDataEnd(MS_U32 u32Id, MS_BOOL bEnd)
3713 {
3714 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3715 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3716
3717 HVD_EX_MSG_TRACE();
3718 _DRV_HVD_Inited(u8DrvId,eRet);
3719 _DRV_HVD_EX_Entry(u8DrvId);
3720
3721 if (bEnd)
3722 {
3723 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_DATA_END;
3724 }
3725 else
3726 {
3727 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DATA_END;
3728 }
3729
3730 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAYBACK_FINISH, bEnd);
3731
3732 _DRV_HVD_EX_RET(u8DrvId, eRet);
3733 }
3734
MDrv_HVD_EX_SetCalFrameRate(MS_U32 u32Id,MS_BOOL bEnable)3735 HVD_EX_Result MDrv_HVD_EX_SetCalFrameRate(MS_U32 u32Id,MS_BOOL bEnable)
3736 {
3737 HVD_EX_Result eRet = E_HVD_EX_OK;
3738 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3739
3740 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bCalFrameRate = bEnable;
3741
3742 _DRV_HVD_EX_RET(u8DrvId, eRet);
3743 }
3744
3745 //-----------------------------------------------------------------------------
3746 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispErrFrm()
3747 /// @brief \b Function \b Description: Enable/ Disable to decode and show error(broken) frames
3748 /// @param -bEnable \b IN : Enable/ Disable
3749 /// -FALSE(0): hide error frames
3750 /// -TRUE(1): show error frames
3751 /// @return -The result of command set display error frames
3752 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispErrFrm(MS_U32 u32Id,MS_BOOL bEnable)3753 HVD_EX_Result MDrv_HVD_EX_SetDispErrFrm(MS_U32 u32Id, MS_BOOL bEnable)
3754 {
3755 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3756 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3757
3758 HVD_EX_MSG_TRACE();
3759 _DRV_HVD_Inited(u8DrvId,eRet);
3760 _DRV_HVD_EX_Entry(u8DrvId);
3761
3762 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ERR_FRM, bEnable);
3763 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bIsShowErrFrm = bEnable;
3764
3765 _DRV_HVD_EX_RET(u8DrvId, eRet);
3766 }
3767
3768 //-----------------------------------------------------------------------------
3769 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispRepeatField()
3770 /// @brief \b Function \b Description: Enable/ Disable to show last field when FW needs to show repeated field
3771 /// @param -bEnable \b IN : Enable/ Disable
3772 /// -FALSE(0): disable this mode
3773 /// -TRUE(1): enable this mode
3774 /// @return -The result of command set display repeated field
3775 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispRepeatField(MS_U32 u32Id,MS_BOOL bEnable)3776 HVD_EX_Result MDrv_HVD_EX_SetDispRepeatField(MS_U32 u32Id, MS_BOOL bEnable)
3777 {
3778 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3779 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3780
3781 HVD_EX_MSG_TRACE();
3782 _DRV_HVD_Inited(u8DrvId,eRet);
3783 _DRV_HVD_EX_Entry(u8DrvId);
3784
3785 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, bEnable);
3786
3787 _DRV_HVD_EX_RET(u8DrvId, eRet);
3788 }
3789
3790 //-----------------------------------------------------------------------------
3791 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSkipDecMode()
3792 /// @brief \b Function \b Description: set the decoding frame type.
3793 /// @param -eDecType \b IN : decoding frame type
3794 /// @return -The result of command set skip decode mode
3795 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSkipDecMode(MS_U32 u32Id,HVD_EX_SkipDecode eDecType)3796 HVD_EX_Result MDrv_HVD_EX_SetSkipDecMode(MS_U32 u32Id, HVD_EX_SkipDecode eDecType)
3797 {
3798 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3799 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3800
3801 HVD_EX_MSG_TRACE();
3802 _DRV_HVD_Inited(u8DrvId,eRet);
3803 _DRV_HVD_EX_Entry(u8DrvId);
3804
3805 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
3806 if ((HVD_EX_SkipDecode) HAL_HVD_EX_GetData(E_HVD_GDATA_SKIP_MODE) != eDecType)
3807 #endif
3808 {
3809 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_DEC, eDecType);
3810
3811 if (eRet != E_HVD_EX_OK)
3812 {
3813 _DRV_HVD_EX_RET(u8DrvId, eRet);
3814 }
3815
3816 if (eDecType == E_HVD_EX_SKIP_DECODE_I)
3817 {
3818 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_I_DIRECT, TRUE);
3819 }
3820 else
3821 {
3822 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_I_DIRECT, FALSE);
3823 }
3824 }
3825
3826 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u8SkipMode = (MS_U8) eDecType;
3827
3828 _DRV_HVD_EX_RET(u8DrvId, eRet);
3829 }
3830 #ifdef VDEC3_FB
3831 //-----------------------------------------------------------------------------
3832 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFrmBuffAddr()
3833 /// @brief \b Function \b Description: specify the frame buffer address.
3834 /// @param -u32FrmBuffAddr \b IN : frame buffer address.
3835 /// @return -The result of command set frame buffer address.
3836 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFrmBuffAddr(MS_U32 u32Id,MS_PHY u32FrmBuffAddr)3837 HVD_EX_Result MDrv_HVD_EX_SetFrmBuffAddr(MS_U32 u32Id, MS_PHY u32FrmBuffAddr)
3838 {
3839 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3840 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3841
3842 HVD_EX_MSG_TRACE();
3843 // _DRV_HVD_Inited(u8DrvId,eRet);
3844 _DRV_HVD_EX_Entry(u8DrvId);
3845
3846 HVD_EX_MSG_DBG("Drv: set u32FrmBuffAddr = 0x%X\n", (MS_U32) u32FrmBuffAddr);
3847
3848 //#if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
3849 // if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) != u32FrmBuffAddr)
3850 //#endif
3851 {
3852 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FBADDR, u32FrmBuffAddr);
3853 }
3854 /*#if HVD_ENABLE_WAIT_CMD_FINISHED
3855 if (eRet == E_HVD_EX_OK)
3856 {
3857 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
3858 while (timer)
3859 {
3860 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) == u32FrmBuffAddr)
3861 {
3862 break;
3863 }
3864 HVD_Delay_ms(1);
3865 timer--;
3866 }
3867 }
3868 #endif*/
3869 _DRV_HVD_EX_RET(u8DrvId, eRet);
3870 }
3871
3872 //-----------------------------------------------------------------------------
3873 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFrmBuffSize()
3874 /// @brief \b Function \b Description: specify the frame buffer size.
3875 /// @param -u32FrmBuffSize \b IN : frame buffer size.
3876 /// @return -The result of command set frame buffer size.
3877 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFrmBuffSize(MS_U32 u32Id,MS_U32 u32FrmBuffSize)3878 HVD_EX_Result MDrv_HVD_EX_SetFrmBuffSize(MS_U32 u32Id, MS_U32 u32FrmBuffSize)
3879 {
3880 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3881 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3882
3883 HVD_EX_MSG_TRACE();
3884 // _DRV_HVD_Inited(u8DrvId,eRet);
3885 _DRV_HVD_EX_Entry(u8DrvId);
3886
3887 HVD_EX_MSG_DBG("Drv: set FrmBuffSize = 0x%X\n", (MS_U32) u32FrmBuffSize);
3888
3889 //#if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
3890 // if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) != u32FrmBuffSize)
3891 //#endif
3892 {
3893 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_DUAL_R2_CMD_FBSIZE, u32FrmBuffSize);
3894 }
3895 /*#if HVD_ENABLE_WAIT_CMD_FINISHED
3896 if (eRet == E_HVD_EX_OK)
3897 {
3898 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
3899 while (timer)
3900 {
3901 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) == u32FrmBuffSize)
3902 {
3903 break;
3904 }
3905 HVD_Delay_ms(1);
3906 timer--;
3907 }
3908 }
3909 #endif*/
3910 _DRV_HVD_EX_RET(u8DrvId, eRet);
3911 }
3912 #endif
3913
3914 //-----------------------------------------------------------------------------
3915 /// @brief \b Function \b Name: MDrv_HVD_EX_SetMaxCMASize()
3916 /// @brief \b Function \b Description: specify the max cma frame buffer size.
3917 /// @param -u32MaxCMASize \b IN : max CMA frame buffer size.
3918 /// @param -u32MaxCMASize2 \b IN : max CMA frame buffer2 size.
3919 /// @return -The result of command set frame buffer address.
3920 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetCodecCapInfo(int eCodecType,void * pCodecCapInfo)3921 HVD_EX_Result MDrv_HVD_EX_GetCodecCapInfo( int eCodecType, void *pCodecCapInfo)
3922 {
3923 if(HAL_VPU_EX_GetCodecCapInfo( eCodecType, pCodecCapInfo))
3924 return E_HVD_RETURN_SUCCESS;
3925 else
3926 return E_HVD_RETURN_FAIL;
3927 }
3928
MDrv_HVD_EX_SetDVXCShmBuff(MS_U32 u32Id,MS_PHY u32FWBaseAddr,MS_PHY u32DVXCShmAddr,MS_SIZE u32DVXCShmSize)3929 HVD_EX_Result MDrv_HVD_EX_SetDVXCShmBuff(MS_U32 u32Id, MS_PHY u32FWBaseAddr, MS_PHY u32DVXCShmAddr, MS_SIZE u32DVXCShmSize)
3930 {
3931 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3932
3933 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3934
3935 MS_U8 u8XCShmMiuSel;
3936 MS_U32 u32XCShmStartOffset;
3937
3938 MS_U8 u8FWBaseMiuSel;
3939 MS_U32 u32FWBaseOffset;
3940
3941 MS_U32 u32MIUSel;
3942
3943 HVD_EX_MSG_TRACE();
3944 _DRV_HVD_Inited(u8DrvId,eRet);
3945 _DRV_HVD_EX_Entry(u8DrvId);
3946
3947 HVD_PRINT("Drv: SetDVXCShmAddr=0x%llx FWBaseAddr=0x%llx SetDVXCShmSize=0x%x\n",
3948 (unsigned long long int) u32DVXCShmAddr, (unsigned long long int)u32FWBaseAddr, u32DVXCShmSize);
3949
3950 _phy_to_miu_offset(u8FWBaseMiuSel, u32FWBaseOffset, u32FWBaseAddr);
3951 _phy_to_miu_offset(u8XCShmMiuSel, u32XCShmStartOffset, u32DVXCShmAddr);
3952
3953 if (u8FWBaseMiuSel != u8XCShmMiuSel)
3954 HVD_EX_MSG_ERR("[ERROR] XC share memory and VDEC Code base MIU selections are different\n");
3955 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_DV_XC_SHM_ADDR, (unsigned long)(u32XCShmStartOffset - u32FWBaseOffset));
3956
3957 if (eRet == E_HVD_EX_OK)
3958 {
3959 eRet = (HVD_EX_Result)HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DV_XC_SHM_SIZE, u32DVXCShmSize);
3960 u32MIUSel = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MIU_SEL);
3961
3962 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_XCSHM_MIUSEL));
3963 u32MIUSel |= (u8XCShmMiuSel << VDEC_XCSHM_MIUSEL);
3964
3965 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_MIU_SEL, u32MIUSel);
3966 }
3967
3968 _DRV_HVD_EX_RET(u8DrvId, eRet);
3969
3970 }
3971
3972 //-----------------------------------------------------------------------------
3973 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFrmBuffAddr()
3974 /// @brief \b Function \b Description: specify the frame buffer address.
3975 /// @param -u32FrmBuffAddr \b IN : frame buffer address.
3976 /// @return -The result of command set frame buffer address.
3977 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFrmBuff2(MS_U32 u32Id,MS_PHY u32FrmBuffAddr,MS_U32 u32FrmBuffSize)3978 HVD_EX_Result MDrv_HVD_EX_SetFrmBuff2(MS_U32 u32Id, MS_PHY u32FrmBuffAddr, MS_U32 u32FrmBuffSize)
3979 {
3980 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3981 MS_U8 u8Frm2MiuSel;
3982 MS_U32 u32FrmStartOffset;
3983 MS_U32 u32MIUSel;
3984
3985 HVD_EX_MSG_TRACE();
3986 _DRV_HVD_EX_Entry(u8DrvId);
3987
3988 HVD_EX_MSG_DBG("Drv: set u32FrmBuff2Addr = 0x%lX\n", (unsigned long)u32FrmBuffAddr);
3989
3990 _phy_to_miu_offset(u8Frm2MiuSel, u32FrmStartOffset, u32FrmBuffAddr);
3991 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8Frm2MiuSel = u8Frm2MiuSel;
3992
3993 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FRAMEBUF2_ADDR, u32FrmStartOffset);
3994
3995 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FRAMEBUF2_SIZE, u32FrmBuffSize);
3996
3997 u32MIUSel = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MIU_SEL);
3998 #if defined(CHIP_MONET) || defined(CHIP_KANO) || defined(CHIP_CURRY)
3999 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA8_MIUSEL));
4000 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA2_MIUSEL));
4001 u32MIUSel |= (u8Frm2MiuSel << VDEC_CHROMA8_MIUSEL);
4002 u32MIUSel |= (u8Frm2MiuSel << VDEC_CHROMA2_MIUSEL);
4003 #else
4004 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_LUMA2_MIUSEL));
4005 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA2_MIUSEL));
4006 u32MIUSel |= (u8Frm2MiuSel << VDEC_LUMA2_MIUSEL);
4007 u32MIUSel |= (u8Frm2MiuSel << VDEC_CHROMA2_MIUSEL);
4008 #endif
4009 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_BUF2_MIUSEL));
4010 u32MIUSel |= (u8Frm2MiuSel << VDEC_BUF2_MIUSEL);
4011
4012 #if SUPPORT_G2VP9
4013 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP9)
4014 {
4015 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_LUMA8_MIUSEL));
4016 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA8_MIUSEL));
4017 u32MIUSel |= (u8Frm2MiuSel << VDEC_LUMA8_MIUSEL);
4018 u32MIUSel |= (u8Frm2MiuSel << VDEC_CHROMA8_MIUSEL);
4019 }
4020 #endif
4021
4022 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_MIU_SEL, u32MIUSel);
4023
4024 return E_HVD_RETURN_SUCCESS;
4025 }
4026
4027 //-----------------------------------------------------------------------------
4028 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispSpeed()
4029 /// @brief \b Function \b Description: specify the display speed type.
4030 /// @param -eSpeed \b IN : display speed type
4031 /// @return -The result of command set display speed type
4032 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispSpeed(MS_U32 u32Id,HVD_EX_DispSpeed eSpeed)4033 HVD_EX_Result MDrv_HVD_EX_SetDispSpeed(MS_U32 u32Id, HVD_EX_DispSpeed eSpeed)
4034 {
4035 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4036 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4037
4038 HVD_EX_MSG_TRACE();
4039 _DRV_HVD_Inited(u8DrvId,eRet);
4040 _DRV_HVD_EX_Entry(u8DrvId);
4041
4042 HVD_EX_MSG_DBG("%d\n", (MS_S16) eSpeed);
4043
4044 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
4045 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) != eSpeed)
4046 #endif
4047 {
4048 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_SPEED, eSpeed);
4049 }
4050 #if HVD_ENABLE_WAIT_CMD_FINISHED
4051 if (eRet == E_HVD_EX_OK)
4052 {
4053 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
4054 while (timer)
4055 {
4056 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) == eSpeed)
4057 {
4058 break;
4059 }
4060 HVD_Delay_ms(1);
4061 timer--;
4062 }
4063 }
4064 #endif
4065 _DRV_HVD_EX_RET(u8DrvId, eRet);
4066 }
4067
4068 //-----------------------------------------------------------------------------
4069 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncActive()
4070 /// @brief \b Function \b Description: Enable/disable the sync of video time stamp and STC.
4071 /// @param -bEnable \b IN : Enable/ Disable
4072 /// -FALSE(0): Disable sync mode
4073 /// -TRUE(1): Enable sync mode
4074 /// @return -The result of command set sync active
4075 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncActive(MS_U32 u32Id,MS_BOOL bEnable)4076 HVD_EX_Result MDrv_HVD_EX_SetSyncActive(MS_U32 u32Id, MS_BOOL bEnable)
4077 {
4078 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4079 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4080
4081 HVD_EX_MSG_TRACE();
4082 _DRV_HVD_Inited(u8DrvId,eRet);
4083 _DRV_HVD_EX_Entry(u8DrvId);
4084
4085 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
4086 if (HAL_HVD_EX_GetData(E_HVD_GDATA_IS_SYNC_ON) != bEnable)
4087 #endif
4088 {
4089 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_ACTIVE, bEnable);
4090 }
4091 #if HVD_ENABLE_WAIT_CMD_FINISHED
4092 if (eRet == E_HVD_EX_OK)
4093 {
4094 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
4095 while (timer)
4096 {
4097 if (HAL_HVD_EX_GetData(E_HVD_GDATA_IS_SYNC_ON) == bEnable)
4098 {
4099 break;
4100 }
4101 HVD_Delay_ms(1);
4102 timer--;
4103 }
4104 }
4105 #endif
4106 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bIsSyncOn = bEnable;
4107
4108 _DRV_HVD_EX_RET(u8DrvId, eRet);
4109 }
4110
4111 //-----------------------------------------------------------------------------
4112 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDropMode()
4113 /// @brief \b Function \b Description: specify the way to drop decoded frames.
4114 /// @param -eMode \b IN : Drop display type.
4115 /// @param -u32Arg \b IN : The argument of eMode
4116 /// -( eMode == E_HVD_DROP_DISPLAY_AUTO) , Enable: (u32Arg = TRUE); Disable: (u32Arg = FALSE)
4117 /// -( eMode == E_HVD_EX_DROP_DISPLAY_ONCE) , u32Arg = not zero
4118 /// @return -The result of command set display speed type
4119 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDropMode(MS_U32 u32Id,HVD_EX_DropDisp eMode,MS_U32 u32Arg)4120 HVD_EX_Result MDrv_HVD_EX_SetDropMode(MS_U32 u32Id, HVD_EX_DropDisp eMode, MS_U32 u32Arg)
4121 {
4122 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4123 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4124
4125 HVD_EX_MSG_TRACE();
4126 _DRV_HVD_Inited(u8DrvId,eRet);
4127 _DRV_HVD_EX_Entry(u8DrvId);
4128
4129 if (eMode == E_HVD_EX_DROP_DISPLAY_AUTO)
4130 {
4131 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DROP_DISP_AUTO, u32Arg);
4132 }
4133 else if (eMode == E_HVD_EX_DROP_DISPLAY_ONCE)
4134 {
4135 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DROP_DISP_ONCE, u32Arg);
4136 }
4137 else
4138 {
4139 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
4140 }
4141
4142 _DRV_HVD_EX_RET(u8DrvId, eRet);
4143 }
4144
4145 //-----------------------------------------------------------------------------
4146 /// @brief \b Function \b Name: MDrv_HVD_EX_RstPTS()
4147 /// @brief \b Function \b Description: Reset HVD sync table
4148 /// @param -u32PTS \b IN : PTS base
4149 /// @return -The result of command reset PTS
4150 //-----------------------------------------------------------------------------
MDrv_HVD_EX_RstPTS(MS_U32 u32Id,MS_U32 u32PTS)4151 HVD_EX_Result MDrv_HVD_EX_RstPTS(MS_U32 u32Id, MS_U32 u32PTS)
4152 {
4153 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4154 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4155
4156 HVD_EX_MSG_TRACE();
4157 _DRV_HVD_Inited(u8DrvId,eRet);
4158 _DRV_HVD_EX_Entry(u8DrvId);
4159
4160 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RESET_PTS, u32PTS);
4161
4162 _DRV_HVD_EX_RET(u8DrvId, eRet);
4163 }
4164
4165 //-----------------------------------------------------------------------------
4166 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFrcMode()
4167 /// @brief \b Function \b Description: set the frame rate convert mode.
4168 /// @param -eMode \b IN : mode type
4169 /// @return -The result of command set frame rate convert mode
4170 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFrcMode(MS_U32 u32Id,HVD_EX_FrmRateConvMode eMode)4171 HVD_EX_Result MDrv_HVD_EX_SetFrcMode(MS_U32 u32Id, HVD_EX_FrmRateConvMode eMode)
4172 {
4173 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4174 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4175
4176 HVD_EX_MSG_TRACE();
4177 _DRV_HVD_Inited(u8DrvId,eRet);
4178 _DRV_HVD_EX_Entry(u8DrvId);
4179
4180 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_MODE, eMode);
4181
4182 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u8FrcMode = (MS_U8) eMode;
4183
4184 _DRV_HVD_EX_RET(u8DrvId, eRet);
4185 }
4186
4187 //-----------------------------------------------------------------------------
4188 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncTolerance()
4189 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
4190 /// @param -u32Arg \b IN : tolerance.
4191 /// @return -The result of command set sync tolerance
4192 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncTolerance(MS_U32 u32Id,MS_U32 u32Arg)4193 HVD_EX_Result MDrv_HVD_EX_SetSyncTolerance(MS_U32 u32Id, MS_U32 u32Arg)
4194 {
4195 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4196 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4197
4198 HVD_EX_MSG_TRACE();
4199 _DRV_HVD_Inited(u8DrvId,eRet);
4200 _DRV_HVD_EX_Entry(u8DrvId);
4201
4202 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_TOLERANCE, u32Arg);
4203
4204 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncTolerance = u32Arg;
4205
4206 _DRV_HVD_EX_RET(u8DrvId, eRet);
4207 }
4208
4209 //-----------------------------------------------------------------------------
4210 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncVideoDelay()
4211 /// @brief \b Function \b Description: Set the video delay from STC when sync mode active.
4212 /// @param -u32Arg \b IN : The video delay. unit:ms
4213 /// @return -The result of command set sync video delay
4214 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncVideoDelay(MS_U32 u32Id,MS_U32 u32Arg)4215 HVD_EX_Result MDrv_HVD_EX_SetSyncVideoDelay(MS_U32 u32Id, MS_U32 u32Arg)
4216 {
4217 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4218 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4219
4220 HVD_EX_MSG_TRACE();
4221 _DRV_HVD_Inited(u8DrvId,eRet);
4222 _DRV_HVD_EX_Entry(u8DrvId);
4223
4224 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_LIVE_STREAM)
4225 {
4226 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8TimeUnit)
4227 {
4228 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32) (u32Arg + HVD_DTV_VIDEO_DELAY));
4229 }
4230 else
4231 {
4232 eRet =
4233 (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg + ((MS_U32) HVD_DTV_VIDEO_DELAY * 90));
4234 }
4235 }
4236 else
4237 {
4238 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg);
4239 }
4240
4241 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncVideoDelay = u32Arg;
4242
4243 _DRV_HVD_EX_RET(u8DrvId, eRet);
4244 }
4245
4246 //-----------------------------------------------------------------------------
4247 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncFreeRunTH()
4248 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
4249 /// @param -u32Arg \b IN : theashold.
4250 /// - 0 : use FW default value
4251 /// - 0xFFFFFFFF : never free run, FW always do sync action.
4252 /// @return -The result of command set sync tolerance
4253 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncFreeRunTH(MS_U32 u32Id,MS_U32 u32Arg)4254 HVD_EX_Result MDrv_HVD_EX_SetSyncFreeRunTH(MS_U32 u32Id, MS_U32 u32Arg)
4255 {
4256 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4257 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4258
4259 HVD_EX_MSG_TRACE();
4260 _DRV_HVD_Inited(u8DrvId,eRet);
4261 _DRV_HVD_EX_Entry(u8DrvId);
4262
4263 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FREERUN_THRESHOLD, u32Arg);
4264
4265 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncFreeRunTH = u32Arg;
4266
4267 _DRV_HVD_EX_RET(u8DrvId, eRet);
4268 }
4269
4270 //-----------------------------------------------------------------------------
4271 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncRepeatTH()
4272 /// @brief \b Function \b Description: Set the repeat threashold under sync mode.
4273 /// @param -u32Arg \b IN : repeat times. 0x01 ~ 0xFF
4274 /// 0xff - repeat current frame until STC catch up PTS.
4275 /// @return -The result of command set sync repeat threashold
4276 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncRepeatTH(MS_U32 u32Id,MS_U32 u32Arg)4277 HVD_EX_Result MDrv_HVD_EX_SetSyncRepeatTH(MS_U32 u32Id, MS_U32 u32Arg)
4278 {
4279 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4280 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4281
4282 HVD_EX_MSG_TRACE();
4283 _DRV_HVD_Inited(u8DrvId,eRet);
4284 _DRV_HVD_EX_Entry(u8DrvId);
4285
4286 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_THRESHOLD, u32Arg);
4287
4288 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncRepeatTH = u32Arg;
4289
4290 _DRV_HVD_EX_RET(u8DrvId, eRet);
4291 }
4292
4293 //-----------------------------------------------------------------------------
4294 /// @brief \b Function \b Name: MDrv_HVD_EX_SetErrConceal()
4295 /// @brief \b Function \b Description: Enable/Disable error concealment.
4296 /// @param -bEnable \b IN : Enable/Disable
4297 /// -FALSE(0): Disable error concealment.
4298 /// -TRUE(1): Enable error concealment.
4299 /// @return -The result of command set sync tolerance
4300 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetErrConceal(MS_U32 u32Id,MS_BOOL bEnable)4301 HVD_EX_Result MDrv_HVD_EX_SetErrConceal(MS_U32 u32Id, MS_BOOL bEnable)
4302 {
4303 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4304 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4305
4306 HVD_EX_MSG_TRACE();
4307 _DRV_HVD_Inited(u8DrvId,eRet);
4308 _DRV_HVD_EX_Entry(u8DrvId);
4309
4310 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ERR_CONCEAL, bEnable);
4311
4312 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bIsErrConceal = bEnable;
4313
4314 _DRV_HVD_EX_RET(u8DrvId, eRet);
4315 }
4316
4317 //-----------------------------------------------------------------------------
4318 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDbgLevel()
4319 /// @brief \b Function \b Description: Set debug level
4320 /// @param -elevel \b IN : debug level
4321 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDbgLevel(MS_U32 u32Id,HVD_EX_UartLevel eLevel)4322 void MDrv_HVD_EX_SetDbgLevel(MS_U32 u32Id, HVD_EX_UartLevel eLevel)
4323 {
4324 VPU_EX_UartLevel eVpuLevel = E_VPU_EX_UART_LEVEL_NONE;
4325
4326 switch (eLevel)
4327 {
4328 case E_HVD_EX_UART_LEVEL_ERR:
4329 {
4330 u32UartCtrl = E_HVD_UART_CTRL_ERR;
4331 eVpuLevel = E_VPU_EX_UART_LEVEL_ERR;
4332 break;
4333 }
4334 case E_HVD_EX_UART_LEVEL_INFO:
4335 {
4336 u32UartCtrl = E_HVD_UART_CTRL_INFO | E_HVD_UART_CTRL_ERR;
4337 eVpuLevel = E_VPU_EX_UART_LEVEL_INFO;
4338 break;
4339 }
4340 case E_HVD_EX_UART_LEVEL_DBG:
4341 {
4342 u32UartCtrl = E_HVD_UART_CTRL_DBG | E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_INFO;
4343 eVpuLevel = E_VPU_EX_UART_LEVEL_DBG;
4344 break;
4345 }
4346 case E_HVD_EX_UART_LEVEL_TRACE:
4347 {
4348 u32UartCtrl = E_HVD_UART_CTRL_TRACE | E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_INFO | E_HVD_UART_CTRL_DBG;
4349 eVpuLevel = E_VPU_EX_UART_LEVEL_TRACE;
4350 break;
4351 }
4352 case E_HVD_EX_UART_LEVEL_FW:
4353 {
4354 u32UartCtrl = E_HVD_UART_CTRL_DISABLE;
4355
4356 HAL_HVD_EX_UartSwitch2FW(u32Id, TRUE);
4357 break;
4358 }
4359 default:
4360 {
4361 u32UartCtrl = E_HVD_UART_CTRL_DISABLE;
4362 eVpuLevel = E_VPU_EX_UART_LEVEL_ERR;
4363 break;
4364 }
4365 }
4366
4367 HAL_VPU_EX_SetDbgLevel(eVpuLevel);
4368 }
4369
4370 //-----------------------------------------------------------------------------
4371 /// @brief \b Function \b Name: MDrv_HVD_EX_SeekToPTS()
4372 /// @brief \b Function \b Description: Let FW decode to the input PTS by using full decoding speed. If FW reaches (equal to or larger than) input PTS, FW will pause automatically. This function can not work under MDrv_HVD_EX_SetSyncActive(TRUE).
4373 /// @param -u32PTS \b IN : specific PTS.
4374 /// -0: disable this mode. FW will go back to previous status (play or pause).
4375 /// -any not zero: enable this mode
4376 /// @return -The result of command seek to specific PTS.
4377 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SeekToPTS(MS_U32 u32Id,MS_U32 u32PTS)4378 HVD_EX_Result MDrv_HVD_EX_SeekToPTS(MS_U32 u32Id, MS_U32 u32PTS)
4379 {
4380 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4381 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4382
4383 HVD_EX_MSG_TRACE();
4384 _DRV_HVD_Inited(u8DrvId,eRet);
4385 _DRV_HVD_EX_Entry(u8DrvId);
4386
4387 eRet = _HVD_EX_Check_Cmd(u8DrvId, E_HVD_CHECK_CMD_SEEK2PTS);
4388
4389 if (eRet != E_HVD_EX_OK)
4390 {
4391 _DRV_HVD_EX_RET(u8DrvId, eRet);
4392 }
4393
4394 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_JUMP_TO_PTS, u32PTS);
4395
4396 _DRV_HVD_EX_RET(u8DrvId, eRet);
4397 }
4398
4399 //-----------------------------------------------------------------------------
4400 /// @brief \b Function \b Name: MDrv_HVD_EX_SkipToPTS()
4401 /// @brief \b Function \b Description: Let FW skip to the input PTS by using full decoding speed and start decode again after input PTS.
4402 /// @param -u32PTS \b IN : specific PTS.
4403 /// -0: disable this mode. FW will go back to previous status (play or pause).
4404 /// -any not zero: enable this mode
4405 /// @return -The result of command seek to specific PTS.
4406 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SkipToPTS(MS_U32 u32Id,MS_U32 u32PTS)4407 HVD_EX_Result MDrv_HVD_EX_SkipToPTS(MS_U32 u32Id, MS_U32 u32PTS)
4408 {
4409 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4410 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4411
4412 HVD_EX_MSG_TRACE();
4413 _DRV_HVD_Inited(u8DrvId,eRet);
4414 _DRV_HVD_EX_Entry(u8DrvId);
4415
4416 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_TO_PTS, u32PTS);
4417
4418 _DRV_HVD_EX_RET(u8DrvId, eRet);
4419 }
4420
4421 //-----------------------------------------------------------------------------
4422 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFreezeImg()
4423 /// @brief \b Function \b Description: Let FW stop updating frames when vsync, but decoding process is still going.
4424 /// @param -bEnable \b IN : Enable/Disable
4425 /// -FALSE(0): Disable freeze image.
4426 /// -TRUE(1): Enable freeze image.
4427 /// @return -The result of command freeze image.
4428 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFreezeImg(MS_U32 u32Id,MS_BOOL bEnable)4429 HVD_EX_Result MDrv_HVD_EX_SetFreezeImg(MS_U32 u32Id, MS_BOOL bEnable)
4430 {
4431 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4432 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4433
4434 HVD_EX_MSG_TRACE();
4435 _DRV_HVD_Inited(u8DrvId,eRet);
4436 _DRV_HVD_EX_Entry(u8DrvId);
4437
4438 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FREEZE_IMG, bEnable);
4439
4440 _DRV_HVD_EX_RET(u8DrvId, eRet);
4441 }
4442
4443 //-----------------------------------------------------------------------------
4444 /// @brief \b Function \b Name: MDrv_HVD_EX_SetBlueScreen()
4445 /// @brief \b Function \b Description: Let FW stop updating frames when vsync and keep blue screen , but decoding process is still going.
4446 /// @param -bEnable \b IN : Enable/Disable
4447 /// -FALSE(0): Disable blue screen.
4448 /// -TRUE(1): Enable blue screen.
4449 /// @return -The result of command set blue screen.
4450 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetBlueScreen(MS_U32 u32Id,MS_BOOL bEnable)4451 HVD_EX_Result MDrv_HVD_EX_SetBlueScreen(MS_U32 u32Id, MS_BOOL bEnable)
4452 {
4453 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4454 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4455
4456 HVD_EX_MSG_TRACE();
4457 _DRV_HVD_Inited(u8DrvId,eRet);
4458 _DRV_HVD_EX_Entry(u8DrvId);
4459
4460 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_BLUE_SCREEN, bEnable);
4461
4462 _DRV_HVD_EX_RET(u8DrvId, eRet);
4463 }
4464
4465 //-----------------------------------------------------------------------------
4466 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispOneField()
4467 /// @brief \b Function \b Description: Let FW only show one field(top field only).
4468 /// @param -bEnable \b IN : Enable/Disable
4469 /// -FALSE(0): Disable display one field.
4470 /// -TRUE(1): Enable display one field.
4471 /// @return -The result of command display one field.
4472 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispOneField(MS_U32 u32Id,MS_BOOL bEnable)4473 HVD_EX_Result MDrv_HVD_EX_SetDispOneField(MS_U32 u32Id, MS_BOOL bEnable)
4474 {
4475 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4476 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4477
4478 HVD_EX_MSG_TRACE();
4479 _DRV_HVD_Inited(u8DrvId,eRet);
4480 _DRV_HVD_EX_Entry(u8DrvId);
4481
4482 if (bEnable)
4483 {
4484 // force to show top field only.
4485 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_TOP);
4486 }
4487 else
4488 {
4489 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_OFF);
4490 }
4491
4492 _DRV_HVD_EX_RET(u8DrvId, eRet);
4493 }
4494
4495 //-----------------------------------------------------------------------------
4496 /// @brief \b Function \b Name: MDrv_HVD_EX_SetISREvent()
4497 /// @brief \b Function \b Description: Set the ISR event type sended by HVD fw.
4498 /// @param -u32Event \b IN : event types
4499 /// @param -fnISRHandler \b IN : function pointer to a interrupt handler.
4500 /// @return -The result of command set ISR event.
4501 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetISREvent(MS_U32 u32Id,MS_U32 u32Event,HVD_InterruptCb fnISRHandler)4502 HVD_EX_Result MDrv_HVD_EX_SetISREvent(MS_U32 u32Id, MS_U32 u32Event, HVD_InterruptCb fnISRHandler)
4503 {
4504 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4505 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4506 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
4507
4508 HVD_EX_MSG_TRACE();
4509 _DRV_HVD_Inited(u8DrvId,eRet);
4510 _DRV_HVD_EX_Entry(u8DrvId);
4511
4512 if (u32Event == E_HVD_EX_ISR_NONE)
4513 {
4514 MS_U32 i = 0;
4515 MS_BOOL bUsed = FALSE;
4516 pCtrl->Settings.bEnISR = FALSE;
4517
4518 // Fix the ISR imbalance of Enable and Disable
4519 if (pCtrl->HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_HVD) // hvd case
4520 {
4521 for (i = 0; i < HVD_MAX_STREAMS; i++)
4522 {
4523 if (i != u8DrvId)
4524 {
4525 if ((E_HWDEC_ISR_HVD == pHVDDrvContext->gHVDCtrl_EX[i].HVDISRCtrl.eHWDecIsr)
4526 && (TRUE == pHVDDrvContext->gHVDCtrl_EX[i].bUsed))
4527 {
4528 bUsed = TRUE;
4529 break;
4530 }
4531 }
4532 }
4533
4534 if ((bHVDDisableISRFlag != TRUE) && (FALSE == bUsed))
4535 {
4536 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
4537 HAL_HVD_EX_EnableISR(u32Id, FALSE);
4538 #else
4539 HAL_HVD_EX_EnableISR(FALSE);
4540 #endif
4541 bHVDDisableISRFlag = OSAL_HVD_ISR_Disable(HVD_ISR_VECTOR);
4542 if (bHVDDisableISRFlag == FALSE)
4543 {
4544 HVD_EX_MSG_ERR("%s Disable Interrupt Fail\n", __FUNCTION__);
4545 }
4546
4547 #if !defined(SUPPORT_X_MODEL_HVD_FEATURE) && !defined(DISABLE_ISR_DETACH)
4548 if (TRUE == bHVDIsIsrAttached)
4549 {
4550 OSAL_HVD_ISR_Detach(HVD_ISR_VECTOR);
4551 bHVDIsIsrAttached = FALSE;
4552 }
4553 #endif
4554 }
4555 }
4556 #if SUPPORT_EVD
4557 else if (pCtrl->HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_EVD) // evd case
4558 {
4559 for (i = 0; i < HVD_MAX_STREAMS; i++)
4560 {
4561 if (i != u8DrvId)
4562 {
4563 if ((E_HWDEC_ISR_EVD == pHVDDrvContext->gHVDCtrl_EX[i].HVDISRCtrl.eHWDecIsr)
4564 && (TRUE == pHVDDrvContext->gHVDCtrl_EX[i].bUsed))
4565 {
4566 bUsed = TRUE;
4567 break;
4568 }
4569 }
4570 }
4571
4572 if ((bEVDDisableISRFlag != TRUE) && (FALSE == bUsed))
4573 {
4574 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
4575 HAL_HVD_EX_EnableISR(u32Id, FALSE);
4576 #else
4577 HAL_HVD_EX_EnableISR(FALSE);
4578 #endif
4579 bEVDDisableISRFlag = OSAL_HVD_ISR_Disable(EVD_ISR_VECTOR);
4580 if (bEVDDisableISRFlag == FALSE)
4581 {
4582 HVD_EX_MSG_ERR("%s Disable Interrupt Fail\n", __FUNCTION__);
4583 }
4584
4585 #if !defined(SUPPORT_X_MODEL_HVD_FEATURE) && !defined(DISABLE_ISR_DETACH)
4586 if (TRUE == bEVDIsIsrAttached)
4587 {
4588 OSAL_HVD_ISR_Detach(EVD_ISR_VECTOR);
4589 bEVDIsIsrAttached = FALSE;
4590 }
4591 #endif
4592 }
4593 }
4594 #if defined(CHIP_KANO) || defined(CHIP_CURRY)
4595 else if (pCtrl->HVDISRCtrl.eHWDecIsr == E_HWDEC_ISR_EVDLITE) // evdlite case
4596 {
4597 for (i = 0; i < HVD_MAX_STREAMS; i++)
4598 {
4599 if (i != u8DrvId)
4600 {
4601 if ((E_HWDEC_ISR_EVDLITE == pHVDDrvContext->gHVDCtrl_EX[i].HVDISRCtrl.eHWDecIsr)
4602 && (TRUE == pHVDDrvContext->gHVDCtrl_EX[i].bUsed))
4603 {
4604 bUsed = TRUE;
4605 break;
4606 }
4607 }
4608 }
4609
4610 if ((bEVDLITEDisableISRFlag != TRUE) && (FALSE == bUsed))
4611 {
4612 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
4613 HAL_HVD_EX_EnableISR(u32Id, FALSE);
4614 #else
4615 HAL_HVD_EX_EnableISR(FALSE);
4616 #endif
4617 bEVDLITEDisableISRFlag = OSAL_HVD_ISR_Disable(EVD_LITE_ISR_VECTOR);
4618 if (bEVDLITEDisableISRFlag == FALSE)
4619 {
4620 HVD_EX_MSG_ERR("%s Disable Interrupt Fail\n", __FUNCTION__);
4621 }
4622
4623 #if !defined(SUPPORT_X_MODEL_HVD_FEATURE) && !defined(DISABLE_ISR_DETACH)
4624 if (TRUE == bEVDLITEIsIsrAttached)
4625 {
4626 OSAL_HVD_ISR_Detach(EVD_LITE_ISR_VECTOR);
4627 bEVDLITEIsIsrAttached = FALSE;
4628 }
4629 #endif
4630 }
4631 }
4632 #endif
4633 #endif
4634
4635 pCtrl->HVDISRCtrl.bRegISR = FALSE;
4636 pCtrl->HVDISRCtrl.pfnISRCallBack = NULL;
4637 pCtrl->Settings.u32IsrEvent = (MS_U32) E_HVD_EX_ISR_NONE;
4638 eRet = E_HVD_EX_OK;
4639 }
4640 else
4641 {
4642 if (fnISRHandler != NULL)
4643 {
4644 #if 1 //If ISR handler has been registerred, we only need to reset event flag.
4645 if (pCtrl->HVDISRCtrl.bRegISR)
4646 {
4647 pCtrl->HVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack) fnISRHandler;
4648 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, u32Event);
4649
4650 if (eRet != E_HVD_EX_OK)
4651 {
4652 _DRV_HVD_EX_RET(u8DrvId, eRet);
4653 }
4654
4655 pCtrl->Settings.u32IsrEvent = u32Event;
4656 eRet = E_HVD_EX_OK;
4657 }
4658 else
4659 {
4660 MS_U32 u32IsrVector = HVD_ISR_VECTOR;
4661 pCtrl->HVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack) fnISRHandler;
4662
4663 if (E_HWDEC_ISR_HVD == pCtrl->HVDISRCtrl.eHWDecIsr)
4664 {
4665 u32IsrVector = HVD_ISR_VECTOR;
4666
4667 if (FALSE == bHVDIsIsrAttached)
4668 {
4669 if (OSAL_HVD_ISR_Attach(u32IsrVector, (void*)_HVD_EX_ISRHandler) != TRUE)
4670 {
4671 HVD_EX_MSG_ERR("fail to attach _HVD_EX_ISRHandler!\n");
4672 return E_HVD_EX_FAIL;
4673 }
4674 HVD_PRINT("attach ISR number:%d\n", HVD_ISR_VECTOR);
4675 bHVDIsIsrAttached = TRUE;
4676 }
4677 }
4678 #if SUPPORT_EVD
4679 else if (E_HWDEC_ISR_EVD == pCtrl->HVDISRCtrl.eHWDecIsr)
4680 {
4681 u32IsrVector = EVD_ISR_VECTOR;
4682
4683 if (FALSE == bEVDIsIsrAttached)
4684 {
4685 if (OSAL_HVD_ISR_Attach(u32IsrVector, (void*)_EVD_EX_ISRHandler) != TRUE)
4686 {
4687 HVD_EX_MSG_ERR("fail to attach _EVD_EX_ISRHandler!\n");
4688 return E_HVD_EX_FAIL;
4689 }
4690 HVD_PRINT("attach ISR number:%d\n", EVD_ISR_VECTOR);
4691 bEVDIsIsrAttached = TRUE;
4692 }
4693 }
4694 #if defined(CHIP_KANO) || defined(CHIP_CURRY)
4695 else if (E_HWDEC_ISR_EVDLITE == pCtrl->HVDISRCtrl.eHWDecIsr)
4696 {
4697 u32IsrVector = EVD_LITE_ISR_VECTOR;
4698
4699 if (FALSE == bEVDLITEIsIsrAttached)
4700 {
4701 if (OSAL_HVD_ISR_Attach(u32IsrVector, (void*)_EVDLITE_EX_ISRHandler) != TRUE)
4702 {
4703 HVD_EX_MSG_ERR("fail to attach _EVDLITE_EX_ISRHandler!\n");
4704 return E_HVD_EX_FAIL;
4705 }
4706 HVD_PRINT("attach ISR number:%d\n", EVD_LITE_ISR_VECTOR);
4707 bEVDLITEIsIsrAttached = TRUE;
4708 }
4709 }
4710 #endif
4711 #endif
4712
4713 if (OSAL_HVD_ISR_Enable(u32IsrVector) != TRUE)
4714 {
4715 HVD_EX_MSG_ERR("fail to OSAL_HVD_IntEnable!\n");
4716 return E_HVD_EX_FAIL;
4717 }
4718
4719 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, u32Event);
4720
4721 if (eRet != E_HVD_EX_OK)
4722 {
4723 _DRV_HVD_EX_RET(u8DrvId, eRet);
4724 }
4725
4726 pCtrl->Settings.u32IsrEvent = u32Event;
4727 pCtrl->Settings.bEnISR = TRUE;
4728 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
4729 HAL_HVD_EX_EnableISR(u32Id, TRUE);
4730 #else
4731 HAL_HVD_EX_EnableISR(TRUE);
4732 #endif
4733 pCtrl->HVDISRCtrl.bRegISR = TRUE;
4734 eRet = E_HVD_EX_OK;
4735 }
4736 #else
4737 HAL_HVD_EX_EnableISR(FALSE);
4738
4739 if (pCtrl->HVDISRCtrl.bRegISR)
4740 {
4741 OSAL_HVD_ISR_Detach();
4742 pCtrl->HVDISRCtrl.bRegISR = FALSE;
4743 }
4744
4745 pCtrl->HVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack) fnISRHandler;
4746 OSAL_HVD_ISR_Attach((void *) _HVD_EX_ISRHandler);
4747 OSAL_HVD_ISR_Enable();
4748
4749 HVD_EX_MSG_INF("attach ISR number:%d\n", HVD_ISR_VECTOR);
4750 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, u32Event);
4751 pCtrl->Settings.u32IsrEvent = u32Event;
4752
4753 if (eRet != E_HVD_EX_OK)
4754 {
4755 _DRV_HVD_EX_RET(u8DrvId, eRet);
4756 }
4757
4758 HAL_HVD_EX_EnableISR(TRUE);
4759 pCtrl->HVDISRCtrl.bRegISR = TRUE;
4760 eRet = E_HVD_EX_OK;
4761 #endif
4762 }
4763 else
4764 {
4765 HVD_EX_MSG_ERR("SetISREvent with NULL pointer. ISR type:%u\n", u32Event);
4766 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
4767 }
4768 }
4769
4770 _DRV_HVD_EX_RET(u8DrvId, eRet);
4771 }
4772
4773 //-----------------------------------------------------------------------------
4774 /// @brief \b Function \b Name: MDrv_HVD_EX_SetEnableISR()
4775 /// @brief \b Function \b Description: Enable/Disable HVD interrupt.
4776 /// @param -bEnable \b IN : Enable/Disable
4777 /// -FALSE(0): Disable interrupt.
4778 /// -TRUE(1): Enable interrupt.
4779 /// @return -The result of command set enable ISR.
4780 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetEnableISR(MS_U32 u32Id,MS_BOOL bEnable)4781 MS_BOOL MDrv_HVD_EX_SetEnableISR(MS_U32 u32Id, MS_BOOL bEnable)
4782 {
4783 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4784
4785 HVD_EX_MSG_TRACE();
4786 _DRV_HVD_Inited(u8DrvId,FALSE);
4787
4788 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
4789 HAL_HVD_EX_EnableISR(u32Id, bEnable);
4790 #else
4791 HAL_HVD_EX_EnableISR(bEnable);
4792 #endif
4793 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bEnISR = bEnable;
4794
4795 return TRUE;
4796 }
4797
4798 //-----------------------------------------------------------------------------
4799 /// @brief \b Function \b Name: MDrv_HVD_EX_SetForceISR()
4800 /// @brief \b Function \b Description: test the HVD interrupt function. Force FW send one interrupt.
4801 /// @param -bEnable \b IN : Enable/Disable
4802 /// -FALSE(0): Clear force interrupt status from HK.
4803 /// -TRUE(1): force one interrupt from HK.
4804 /// @return -The result of command set force ISR.
4805 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetForceISR(MS_U32 u32Id,MS_BOOL bEnable)4806 MS_BOOL MDrv_HVD_EX_SetForceISR(MS_U32 u32Id, MS_BOOL bEnable)
4807 {
4808 HVD_EX_MSG_TRACE();
4809 //_DRV_HVD_Inited(FALSE);
4810 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
4811 HAL_HVD_EX_SetForceISR(u32Id, bEnable);
4812 #else
4813 UNUSED(u32Id);
4814 HAL_HVD_EX_SetForceISR(bEnable);
4815 #endif
4816 return TRUE;
4817 }
4818
4819 //-----------------------------------------------------------------------------
4820 /// @brief \b Function \b Name: MDrv_HVD_EX_SetMVOPDone()
4821 /// @brief \b Function \b Description: tell FW MVOP is ready for futher decode.
4822 /// @return -The result of command.
4823 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetMVOPDone(MS_U32 u32Id)4824 MS_BOOL MDrv_HVD_EX_SetMVOPDone(MS_U32 u32Id)
4825 {
4826 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4827 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4828 HVD_EX_MSG_TRACE();
4829 _DRV_HVD_Inited(u8DrvId,FALSE);
4830
4831 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_BLUE_SCREEN, FALSE);
4832
4833 if (E_HVD_EX_OK == eRet)
4834 {
4835 return TRUE;
4836 }
4837 else
4838 {
4839 return FALSE;
4840 }
4841 }
4842
4843 //-----------------------------------------------------------------------------
4844 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVirtualBox()
4845 /// @brief \b Function \b Description: Set DS width and Height to F/W
4846 /// @param -u16Width \b IN : frame width
4847 /// @param -u16Height \b IN : frame height
4848 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVirtualBox(MS_U32 u32Id,MS_U16 u16Width,MS_U16 u16Height)4849 HVD_EX_Result MDrv_HVD_EX_SetVirtualBox(MS_U32 u32Id, MS_U16 u16Width, MS_U16 u16Height)
4850 {
4851 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4852 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4853
4854 HVD_EX_MSG_TRACE();
4855 _DRV_HVD_Inited(u8DrvId,eRet);
4856 _DRV_HVD_EX_Entry(u8DrvId);
4857
4858 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_VIRTUAL_BOX_WIDTH, u16Width);
4859 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_VIRTUAL_BOX_HEIGHT, u16Height);
4860
4861 eRet = E_HVD_EX_OK;
4862 _DRV_HVD_EX_RET(u8DrvId, eRet);
4863 }
4864
4865 //-----------------------------------------------------------------------------
4866 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDynScalingParam()
4867 /// @brief \b Function \b Description: Pass scalar parameters to decoder
4868 /// @return -The result of command.
4869 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDynScalingParam(MS_U32 u32Id,void * pStAddr,MS_U32 u32Size)4870 HVD_EX_Result MDrv_HVD_EX_SetDynScalingParam(MS_U32 u32Id, void *pStAddr, MS_U32 u32Size)
4871 {
4872 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4873 MS_U32 addr = 0;
4874 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4875
4876 HVD_EX_MSG_TRACE();
4877 _DRV_HVD_Inited(u8DrvId,eRet);
4878 _DRV_HVD_EX_Entry(u8DrvId);
4879
4880 if ((pStAddr == NULL) || (u32Size == 0))
4881 {
4882 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
4883 _DRV_HVD_Inited(u8DrvId,eRet);
4884 }
4885 else
4886 {
4887 // 1. copy data input data array
4888 addr = MDrv_HVD_EX_GetDynamicScalingInfo(u32Id, E_HVD_EX_DS_INFO_ADDR);
4889
4890 if(addr == 0x0)
4891 {
4892 eRet = E_HVD_EX_FAIL;
4893 _DRV_HVD_EX_RET(u8DrvId, eRet);
4894 }
4895
4896 HVD_memcpy(MS_PA2KSEG1(addr), pStAddr, u32Size);
4897
4898 // 2. while till FW finish it.
4899 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SCALER_INFO_NOTIFY, ((MS_U8 *)pStAddr)[0]);
4900 }
4901
4902 _DRV_HVD_EX_RET(u8DrvId, eRet);
4903 }
4904
4905 //-----------------------------------------------------------------------------
4906 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispInfoTH()
4907 /// @brief \b Function \b Description: Set the upper and lower limitation of a valid SPS.
4908 /// @param -DispInfoTH \b IN : tolerance.
4909 /// @return -The result of command set display inforation threshold
4910 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispInfoTH(MS_U32 u32Id,HVD_EX_DispInfoThreshold * DispInfoTH)4911 HVD_EX_Result MDrv_HVD_EX_SetDispInfoTH(MS_U32 u32Id, HVD_EX_DispInfoThreshold *DispInfoTH)
4912 {
4913 HVD_Disp_Info_TH DispInfoTHTmp;
4914 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4915 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4916
4917 HVD_EX_MSG_TRACE();
4918 _DRV_HVD_Inited(u8DrvId,eRet);
4919 _DRV_HVD_EX_Entry(u8DrvId);
4920
4921 if (DispInfoTH == NULL)
4922 {
4923 _DRV_HVD_EX_RET(u8DrvId, eRet);
4924 }
4925
4926 DispInfoTHTmp.u32FrmrateLowBound = DispInfoTH->u32FrmrateLowBound;
4927 DispInfoTHTmp.u32FrmrateUpBound = DispInfoTH->u32FrmrateUpBound;
4928 DispInfoTHTmp.u32MvopLowBound = DispInfoTH->u32MvopLowBound;
4929 DispInfoTHTmp.u32MvopUpBound = DispInfoTH->u32MvopUpBound;
4930
4931 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISP_INFO_TH, (MS_VIRT) (&DispInfoTHTmp));
4932
4933 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
4934
4935 HVD_memcpy((void *) &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.DispInfoTH), (void *) (DispInfoTH), sizeof(HVD_EX_DispInfoThreshold));
4936
4937 _DRV_HVD_EX_RET(u8DrvId, eRet);
4938 }
4939
4940 //-----------------------------------------------------------------------------
4941 /// @brief \b Function \b Name: MDrv_HVD_EX_SetIgnoreErrRef()
4942 /// @brief \b Function \b Description: Turn on / off ignore error reference.
4943 /// @param -b bFastDisplay \b IN : Enable/ Disable
4944 /// -FALSE(0): handle error reference
4945 /// -TRUE(1): ignore error reference
4946 /// @return -The result of command set ignore error reference
4947 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetIgnoreErrRef(MS_U32 u32Id,MS_BOOL bIgnore)4948 HVD_EX_Result MDrv_HVD_EX_SetIgnoreErrRef(MS_U32 u32Id, MS_BOOL bIgnore)
4949 {
4950 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4951 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4952
4953 HVD_EX_MSG_TRACE();
4954 _DRV_HVD_Inited(u8DrvId,eRet);
4955 _DRV_HVD_EX_Entry(u8DrvId);
4956
4957 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, bIgnore);
4958
4959 _DRV_HVD_EX_RET(u8DrvId, eRet);
4960 }
4961
4962 //-----------------------------------------------------------------------------
4963 /// @brief \b Function \b Name: MDrv_HVD_EX_ForceFollowDTVSpec()
4964 /// @brief \b Function \b Description: Turn on / off Force follow DTV Spec
4965 /// @param -b bEnable \b IN : Enable/ Disable
4966 /// -FALSE(0): Disable
4967 /// -TRUE(1): Enable
4968 /// @return -The result of command set force follow DTV spec
4969 //-----------------------------------------------------------------------------
MDrv_HVD_EX_ForceFollowDTVSpec(MS_U32 u32Id,MS_BOOL bEnable)4970 HVD_EX_Result MDrv_HVD_EX_ForceFollowDTVSpec(MS_U32 u32Id, MS_BOOL bEnable)
4971 {
4972 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4973 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4974
4975 HVD_EX_MSG_TRACE();
4976 _DRV_HVD_Inited(u8DrvId,eRet);
4977 _DRV_HVD_EX_Entry(u8DrvId);
4978
4979 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_DTV_SPEC, bEnable);
4980
4981 _DRV_HVD_EX_RET(u8DrvId, eRet);
4982 }
4983
4984 //-----------------------------------------------------------------------------
4985 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFastDisplay()
4986 /// @brief \b Function \b Description: Turn on / off fast display.
4987 /// @param -b bFastDisplay \b IN : Enable/ Disable
4988 /// -FALSE(0): normal display
4989 /// -TRUE(1): fast display
4990 /// @return -The result of command set fast display
4991 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFastDisplay(MS_U32 u32Id,MS_BOOL bFastDisplay)4992 HVD_EX_Result MDrv_HVD_EX_SetFastDisplay(MS_U32 u32Id, MS_BOOL bFastDisplay)
4993 {
4994 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4995 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4996
4997 HVD_EX_MSG_TRACE();
4998 _DRV_HVD_Inited(u8DrvId,eRet);
4999 _DRV_HVD_EX_Entry(u8DrvId);
5000
5001 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FAST_DISP, bFastDisplay);
5002
5003 _DRV_HVD_EX_RET(u8DrvId, eRet);
5004 }
5005
5006 //-----------------------------------------------------------------------------
5007 /// @brief \b Function \b Name: MDrv_HVD_EX_DispOutsideMode()
5008 /// @brief \b Function \b Description: Turn on / off Disp control method which handle by app side
5009 /// @param -b bEnable \b IN : Enable/ Disable
5010 /// -FALSE(0): Disable
5011 /// -TRUE(1): Enable
5012 /// @return -
5013 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DispOutsideMode(MS_U32 u32Id,MS_BOOL bEnable)5014 HVD_EX_Result MDrv_HVD_EX_DispOutsideMode(MS_U32 u32Id, MS_BOOL bEnable)
5015 {
5016 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
5017 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5018
5019 HVD_EX_MSG_TRACE();
5020 _DRV_HVD_Inited(u8DrvId,eRet);
5021 _DRV_HVD_EX_Entry(u8DrvId);
5022 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE);
5023 //change to open max setting ,wait f/w release new fwHVD_if
5024 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_DISP_OUTSIDE, bEnable);
5025
5026 _DRV_HVD_EX_RET(u8DrvId, eRet);
5027 }
5028 // check status
5029
5030 //-----------------------------------------------------------------------------
5031 /// @brief \b Function \b Name: MDrv_HVD_EX_IsISROccured()
5032 /// @brief \b Function \b Description: Check if the ISR is occured or not.
5033 /// @return - Is occured or not
5034 /// @retval -FALSE(0): interrupt is not occured.
5035 /// @retval -TRUE(1): interrupt has been occured.
5036 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsISROccured(MS_U32 u32Id)5037 MS_BOOL MDrv_HVD_EX_IsISROccured(MS_U32 u32Id)
5038 {
5039 HVD_EX_MSG_TRACE();
5040 //_DRV_HVD_Inited(FALSE);
5041 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(HAL_CHIP_SUPPORT_EVD)
5042 return HAL_HVD_EX_IsISROccured(u32Id);
5043 #else
5044 UNUSED(u32Id);
5045 return HAL_HVD_EX_IsISROccured();
5046 #endif
5047 }
5048
5049 //-----------------------------------------------------------------------------
5050 /// @brief \b Function \b Name: MDrv_HVD_EX_IsDispFinish()
5051 /// @brief \b Function \b Description: Check this file mode display is finish or not. only work after MDrv_HVD_EX_SetDataEnd(TRUE)
5052 /// @return - Is finish or not
5053 /// @retval -FALSE(0): Not finish or Not in file mode playback
5054 /// @retval -TRUE(1): Display Finished.
5055 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsDispFinish(MS_U32 u32Id)5056 MS_BOOL MDrv_HVD_EX_IsDispFinish(MS_U32 u32Id)
5057 {
5058 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5059 HVD_EX_MSG_TRACE();
5060 _DRV_HVD_Inited(u8DrvId,FALSE);
5061
5062 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_LIVE_STREAM)
5063 {
5064 return FALSE;
5065 }
5066
5067 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DATA_END)
5068 {
5069 #ifndef VDEC3
5070 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP8)
5071 {
5072 if (_HVD_EX_IsAllBufferEmpty_VP8(u32Id))
5073 {
5074 return TRUE;
5075 }
5076 else
5077 {
5078 return FALSE;
5079 }
5080 }
5081 else
5082 #endif
5083 {
5084 if (_HVD_EX_IsAllBufferEmpty(u32Id, FALSE))
5085 {
5086 return TRUE;
5087 }
5088 else
5089 {
5090 //_DRV_HVD_PushDummy();
5091 return FALSE;
5092 }
5093 }
5094 }
5095 else
5096 {
5097 return FALSE;
5098 }
5099 }
5100
5101 //-----------------------------------------------------------------------------
5102 /// @brief \b Function \b Name: MDrv_HVD_EX_IsFrameShowed()
5103 /// @brief \b Function \b Description: Is HVD Frame showed after TriggerDisp(TRUE) or first frame showed
5104 /// @return - Is frame showed or not
5105 /// @retval -FALSE(0): New Framed showed
5106 /// @retval -TRUE(1): Not showed
5107 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsFrameShowed(MS_U32 u32Id)5108 MS_BOOL MDrv_HVD_EX_IsFrameShowed(MS_U32 u32Id)
5109 {
5110 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5111
5112 HVD_EX_MSG_TRACE();
5113 _DRV_HVD_Inited(u8DrvId,FALSE);
5114
5115 if (!HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_1ST_FRM_RDY))
5116 {
5117 // 1st frame not ready or AV sync not ready
5118 return FALSE;
5119 }
5120 else
5121 {
5122 // 1st frame showed or AV sync ready
5123 if (_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL))
5124 {
5125 // control display
5126 return (MS_BOOL) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_FRAME_SHOWED);
5127 }
5128 else
5129 {
5130 // cotrol decode
5131 return TRUE;
5132 }
5133 }
5134 }
5135
5136 //-----------------------------------------------------------------------------
5137 /// @brief \b Function \b Name: MDrv_HVD_EX_IsStepDecodeDone()
5138 /// @brief \b Function \b Description: Is HVD step decode done after step decode command.
5139 /// @return - TRUE/FALSE
5140 /// @retval -FALSE(0): decoding, or user did not send corresponding step decode command.
5141 /// @retval -TRUE(1): decode done
5142 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsStepDecodeDone(MS_U32 u32Id)5143 MS_BOOL MDrv_HVD_EX_IsStepDecodeDone(MS_U32 u32Id)
5144 {
5145 MS_BOOL bRet = FALSE;
5146 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5147
5148 HVD_EX_MSG_TRACE();
5149 _DRV_HVD_Inited(u8DrvId,FALSE);
5150
5151 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding)
5152 {
5153 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt !=
5154 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT))
5155 {
5156 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt = 0;
5157 bRet = TRUE;
5158 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding = FALSE;
5159 }
5160 }
5161
5162 return bRet;
5163 }
5164
5165 //-----------------------------------------------------------------------------
5166 /// @brief \b Function \b Name: MDrv_HVD_EX_CheckDispInfoRdy()
5167 /// @brief \b Function \b Description: check display info ready and correct or not
5168 /// @return -The result of command check display infor ready or not
5169 //-----------------------------------------------------------------------------
MDrv_HVD_EX_CheckDispInfoRdy(MS_U32 u32Id)5170 HVD_EX_Result MDrv_HVD_EX_CheckDispInfoRdy(MS_U32 u32Id)
5171 {
5172 MS_U32 u32ErrCode = 0;
5173 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
5174 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5175
5176 HVD_EX_MSG_TRACE();
5177 _DRV_HVD_Inited(u8DrvId,eRet);
5178
5179 #if defined(SUPPORT_CMA)
5180 if (pHVDDrvContext->bCMAUsed && !HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_CMA_ALLOC_DONE))
5181 {
5182 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
5183 struct CMA_Pool_Alloc_Param alloc_param, alloc_param2;
5184 MS_U32 framebuf_size, framebuf_size2 = 0;
5185 MS_U8 u8BitMiuSel = 0;
5186 MS_U8 u8CodeMiuSel = 0;
5187 MS_U8 u8FBMiuSel = 0, u8FB2MiuSel = 0;
5188 MS_U32 u32BitStartOffset;
5189 MS_U32 u32CodeStartOffset;
5190
5191 framebuf_size = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRAMEBUF_SIZE);
5192 if (framebuf_size == 0)
5193 return E_HVD_EX_RET_NOTREADY;
5194
5195 if (pHVDDrvContext->bCMATwoMIU[u8DrvId])
5196 {
5197 framebuf_size2 = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRAMEBUF2_SIZE);
5198 if (framebuf_size2 == 0)
5199 return E_HVD_EX_RET_NOTREADY;
5200 }
5201 alloc_param.pool_handle_id = pHVDDrvContext->cmaInitParam[0].pool_handle_id;
5202 alloc_param.offset_in_pool = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRAMEBUF_ADDR) - pHVDDrvContext->cmaInitParam[0].heap_miu_start_offset;
5203 alloc_param.length = framebuf_size;
5204 alloc_param.flags = CMA_FLAG_VIRT_ADDR;
5205 if (MApi_CMA_Pool_GetMem(&alloc_param) == FALSE)
5206 return E_HVD_EX_RET_CMA_ERROR;
5207
5208 VPRINTF("[VDEC][%d]MApi_CMA_Pool_GetMem in hvd: alloc_param.pool_handle_id=%x, alloc_param.flags=%x, alloc_param.offset_in_pool=%llx, alloc_param.length=%x\n",
5209 (unsigned int)u8DrvId,
5210 (unsigned int)alloc_param.pool_handle_id,
5211 (unsigned int)alloc_param.flags,
5212 (unsigned long long int)alloc_param.offset_in_pool,
5213 (unsigned int)alloc_param.length);
5214
5215 pHVDDrvContext->cmaFreeParam[0][u8DrvId].pool_handle_id = alloc_param.pool_handle_id;
5216 pHVDDrvContext->cmaFreeParam[0][u8DrvId].offset_in_pool = alloc_param.offset_in_pool;
5217 pHVDDrvContext->cmaFreeParam[0][u8DrvId].length = alloc_param.length;
5218 u8FBMiuSel = pHVDDrvContext->cmaInitParam[0].miu;
5219 HVD_EX_MSG_DBG("[0x%lx]MApi_CMA_Pool_GetMem:offset=0x%lx, len=0x%lx, miu=%ld\n", u32Id, alloc_param.offset_in_pool, alloc_param.length, pHVDDrvContext->cmaInitParam[0].miu);
5220
5221 if (pHVDDrvContext->bCMATwoMIU[u8DrvId])
5222 {
5223 alloc_param2.pool_handle_id = pHVDDrvContext->cmaInitParam[1].pool_handle_id;
5224 alloc_param2.offset_in_pool = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRAMEBUF2_ADDR) - pHVDDrvContext->cmaInitParam[1].heap_miu_start_offset;
5225 alloc_param2.length = framebuf_size2;
5226 alloc_param2.flags = CMA_FLAG_VIRT_ADDR;
5227 if (MApi_CMA_Pool_GetMem(&alloc_param2) == FALSE)
5228 return E_HVD_EX_RET_CMA_ERROR;
5229
5230 VPRINTF("[VDEC][%d]MApi_CMA_Pool_GetMem in hvd2: alloc_param.pool_handle_id=%x, alloc_param.flags=%x, alloc_param.offset_in_pool=%llx, alloc_param.length=%x\n",
5231 (unsigned int)u8DrvId,
5232 (unsigned int)alloc_param.pool_handle_id,
5233 (unsigned int)alloc_param.flags,
5234 (unsigned long long int)alloc_param.offset_in_pool,
5235 (unsigned int)alloc_param.length);
5236
5237 pHVDDrvContext->cmaFreeParam[1][u8DrvId].pool_handle_id = alloc_param2.pool_handle_id;
5238 pHVDDrvContext->cmaFreeParam[1][u8DrvId].offset_in_pool = alloc_param2.offset_in_pool;
5239 pHVDDrvContext->cmaFreeParam[1][u8DrvId].length = alloc_param2.length;
5240 u8FB2MiuSel = pHVDDrvContext->cmaInitParam[1].miu;
5241 HVD_EX_MSG_DBG("[0x%lx]MApi_CMA_Pool_GetMem:offset=0x%lx, len=0x%lx, miu=%ld\n", u32Id, alloc_param2.offset_in_pool, alloc_param2.length, pHVDDrvContext->cmaInitParam[1].miu);
5242 }
5243 else
5244 {
5245 u8FB2MiuSel = u8FBMiuSel;
5246 }
5247
5248 _phy_to_miu_offset(u8BitMiuSel, u32BitStartOffset, pCtrl->MemMap.u32BitstreamBufAddr);
5249 _phy_to_miu_offset(u8CodeMiuSel, u32CodeStartOffset, pCtrl->MemMap.u32CodeBufAddr);
5250
5251 MS_U32 u32MIUSel = (u8BitMiuSel << VDEC_BS_MIUSEL) |
5252 (u8FBMiuSel << VDEC_LUMA8_MIUSEL) |
5253 // (u8FBMiuSel << VDEC_CHROMA8_MIUSEL) |
5254 // (u8FB2MiuSel << VDEC_LUMA2_MIUSEL) |
5255 (u8FB2MiuSel << VDEC_CHROMA2_MIUSEL) |
5256 (u8FBMiuSel << VDEC_HWBUF_MIUSEL) |
5257 (u8FBMiuSel << VDEC_BUF1_MIUSEL) |
5258 (u8FB2MiuSel << VDEC_BUF2_MIUSEL) |
5259 (u8FBMiuSel << VDEC_PPIN_MIUSEL);
5260 #ifdef CHIP_MONET
5261 u32MIUSel |= (u8FB2MiuSel << VDEC_CHROMA8_MIUSEL) |
5262 (u8FBMiuSel << VDEC_LUMA2_MIUSEL);
5263 #else
5264 u32MIUSel |= (u8FBMiuSel << VDEC_CHROMA8_MIUSEL) |
5265 (u8FB2MiuSel << VDEC_LUMA2_MIUSEL);
5266 #endif
5267 #if SUPPORT_G2VP9
5268 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP9)
5269 {
5270 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_LUMA8_MIUSEL));
5271 u32MIUSel &= (~(VDEC_MIUSEL_MASK << VDEC_CHROMA8_MIUSEL));
5272 u32MIUSel |= (u8FB2MiuSel << VDEC_LUMA8_MIUSEL);
5273 u32MIUSel |= (u8FB2MiuSel << VDEC_CHROMA8_MIUSEL);
5274 }
5275 #endif
5276
5277 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_MIU_SEL, u32MIUSel);
5278
5279 HVD_EX_MSG_DBG("E_HVD_SDATA_MIU_SEL = 0x%lx\n", u32MIUSel);
5280
5281 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_CMA_ALLOC_DONE, 1);
5282 }
5283 #endif
5284
5285 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
5286 {
5287 if (!HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_CHANGE))
5288 {
5289 return E_HVD_EX_RET_NOTREADY;
5290 }
5291 else
5292 {
5293 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = TRUE;
5294 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_INFO_RDY);
5295 }
5296 }
5297
5298 // check if FW report error
5299 u32ErrCode = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ERROR_CODE);
5300
5301 if (u32ErrCode != 0)
5302 {
5303 if (u32ErrCode == E_HVD_ERR_OUT_OF_MEMORY)
5304 {
5305 HVD_EX_MSG_ERR
5306 ("FW error that Out of Memory:%x. Allocated frame buffer size is smaller than required.\n",
5307 u32ErrCode);
5308 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = FALSE;
5309 return E_HVD_EX_RET_OUTOF_MEMORY;
5310 }
5311 }
5312
5313 return E_HVD_EX_OK;
5314 }
5315
5316 //-----------------------------------------------------------------------------
5317 /// @brief \b Function \b Name: MDrv_HVD_EX_IsDispInfoChg()
5318 /// @brief \b Function \b Description: check display info is changed or not
5319 /// @return - TRUE / FALSE
5320 /// @retval -FALSE(0): not changed
5321 /// @retval -TRUE(1): changed
5322 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsDispInfoChg(MS_U32 u32Id)5323 MS_BOOL MDrv_HVD_EX_IsDispInfoChg(MS_U32 u32Id)
5324 {
5325 MS_BOOL bRet = FALSE;
5326 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5327
5328 HVD_EX_MSG_TRACE();
5329 _DRV_HVD_Inited(u8DrvId,FALSE);
5330
5331 bRet = (MS_BOOL) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_CHANGE);
5332
5333 if (bRet)
5334 {
5335 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = TRUE;
5336 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_INFO_RDY);
5337 }
5338 #if 0 // debug use
5339 {
5340 static MS_U32 u32DecodeCnt = 0;
5341 static MS_U32 u32IdleCnt = 0;
5342 MS_U32 tmp = 0;
5343 tmp = MDrv_HVD_EX_GetDecodeCnt(u32Id);
5344
5345 if (u32DecodeCnt != tmp)
5346 {
5347 HVD_PRINT("%u decode cnt:%x PTS:%x\n", (MS_U32) bRet, tmp, MDrv_HVD_EX_GetPTS(u32Id));
5348 u32DecodeCnt = tmp;
5349 }
5350 else
5351 {
5352 u32IdleCnt++;
5353 }
5354 if (u32IdleCnt > 1000)
5355 {
5356 HVD_PRINT("HVD: seems IDLE: %u decode cnt:%x PTS:%x\n", (MS_U32) bRet, tmp, MDrv_HVD_EX_GetPTS(u32Id));
5357 u32IdleCnt = 0;
5358 }
5359 }
5360 #endif
5361 return bRet;
5362 }
5363
5364 //-----------------------------------------------------------------------------
5365 /// @brief \b Function \b Name: MDrv_HVD_EX_IsIdle()
5366 /// @brief \b Function \b Description: check decoder is idle or not
5367 /// @return - TRUE / FALSE
5368 /// @retval -FALSE(0): decoder is not idle
5369 /// @retval -TRUE(1): decoder is idle
5370 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsIdle(MS_U32 u32Id)5371 MS_BOOL MDrv_HVD_EX_IsIdle(MS_U32 u32Id)
5372 {
5373 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5374 HVD_EX_MSG_TRACE();
5375 _DRV_HVD_Inited(u8DrvId,FALSE);
5376
5377 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > HVD_FW_IDLE_THRESHOLD)
5378 {
5379 return TRUE;
5380 }
5381 else
5382 {
5383 return FALSE;
5384 }
5385 }
5386
5387 //-----------------------------------------------------------------------------
5388 /// @brief \b Function \b Name: MDrv_HVD_EX_IsSyncStart()
5389 /// @brief \b Function \b Description: check decoder starts to do sync action(drop or repeat) or not.
5390 /// @return - TRUE / FALSE
5391 /// @retval -FALSE(0): decoder is not doing sync action
5392 /// @retval -TRUE(1): decoder is doing sync action
5393 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsSyncStart(MS_U32 u32Id)5394 MS_BOOL MDrv_HVD_EX_IsSyncStart(MS_U32 u32Id)
5395 {
5396 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5397 HVD_EX_MSG_TRACE();
5398 _DRV_HVD_Inited(u8DrvId,FALSE);
5399
5400 if ((MS_BOOL) MDrv_HVD_EX_GetPlayMode(u32Id, E_HVD_EX_GMODE_IS_SYNC_ON) == FALSE)
5401 {
5402 return FALSE;
5403 }
5404 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_SYNC_START))
5405 {
5406 return TRUE;
5407 }
5408 else
5409 {
5410 return FALSE;
5411 }
5412 }
5413
5414 //-----------------------------------------------------------------------------
5415 /// @brief \b Function \b Name: MDrv_HVD_EX_IsSyncReach()
5416 /// @brief \b Function \b Description: The distance of Video time stamp and STC is closed enough.
5417 /// @return - TRUE / FALSE
5418 /// @retval -FALSE(0): The distance is not shorter than sync tolerance.
5419 /// @retval -TRUE(1): The distance is shorter than sync tolerance.
5420 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsSyncReach(MS_U32 u32Id)5421 MS_BOOL MDrv_HVD_EX_IsSyncReach(MS_U32 u32Id)
5422 {
5423 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5424 HVD_EX_MSG_TRACE();
5425 _DRV_HVD_Inited(u8DrvId,FALSE);
5426
5427 if ((MS_BOOL) MDrv_HVD_EX_GetPlayMode(u32Id, E_HVD_EX_GMODE_IS_SYNC_ON) == FALSE)
5428 {
5429 return FALSE;
5430 }
5431
5432 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_SYNC_REACH))
5433 {
5434 return TRUE;
5435 }
5436 else
5437 {
5438 return FALSE;
5439 }
5440 }
5441
5442 //-----------------------------------------------------------------------------
5443 /// @brief \b Function \b Name: MDrv_HVD_EX_IsLowDelay()
5444 /// @brief \b Function \b Description: check if current stream has low delay flag in SPS.
5445 /// @return - TRUE / FALSE
5446 /// @retval -FALSE(0): Low delay flag not found.
5447 /// @retval -TRUE(1): Low delay flag found.
5448 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsLowDelay(MS_U32 u32Id)5449 MS_BOOL MDrv_HVD_EX_IsLowDelay(MS_U32 u32Id)
5450 {
5451 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5452 HVD_EX_MSG_TRACE();
5453 _DRV_HVD_Inited(u8DrvId,FALSE);
5454
5455 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_AVC_LOW_DELAY))
5456 {
5457 return TRUE;
5458 }
5459 else
5460 {
5461 return FALSE;
5462 }
5463 }
5464
5465 //-----------------------------------------------------------------------------
5466 /// @brief \b Function \b Name: MDrv_HVD_EX_IsIFrmFound()
5467 /// @brief \b Function \b Description: check if I frame found after Init() or flush().
5468 /// @return - TRUE / FALSE
5469 /// @retval -FALSE(0): I frame is not found.
5470 /// @retval -TRUE(1): I frame has been found.
5471 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsIFrmFound(MS_U32 u32Id)5472 MS_BOOL MDrv_HVD_EX_IsIFrmFound(MS_U32 u32Id)
5473 {
5474 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5475 HVD_EX_MSG_TRACE();
5476 _DRV_HVD_Inited(u8DrvId,FALSE);
5477
5478 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_I_FRM_FOUND))
5479 {
5480 return TRUE;
5481 }
5482 else
5483 {
5484 return FALSE;
5485 }
5486 }
5487
5488 //-----------------------------------------------------------------------------
5489 /// @brief \b Function \b Name: MDrv_HVD_EX_Is1stFrmRdy()
5490 /// @brief \b Function \b Description: check if first frame showed on screen after Init() or flush().
5491 /// @return - TRUE / FALSE
5492 /// @retval -FALSE(0): First frame is not showed.
5493 /// @retval -TRUE(1): First frame is showed.
5494 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Is1stFrmRdy(MS_U32 u32Id)5495 MS_BOOL MDrv_HVD_EX_Is1stFrmRdy(MS_U32 u32Id)
5496 {
5497 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5498 HVD_EX_MSG_TRACE();
5499 _DRV_HVD_Inited(u8DrvId,FALSE);
5500
5501 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_1ST_FRM_RDY))
5502 {
5503 return TRUE;
5504 }
5505 else
5506 {
5507 return FALSE;
5508 }
5509 }
5510
5511 //-----------------------------------------------------------------------------
5512 /// @brief \b Function \b Name: MDrv_HVD_EX_IsAllBufferEmpty()
5513 /// @brief \b Function \b Description: check if all of the buffers(display, decoded, BBU, bitstream) are empty.
5514 /// @return - TRUE / FALSE
5515 /// @retval -FALSE(0): Not Empty.
5516 /// @retval -TRUE(1): Empty.
5517 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id)5518 MS_BOOL MDrv_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id)
5519 {
5520 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5521 //HVD_MSG_TRACE();
5522 _DRV_HVD_Inited(u8DrvId,FALSE);
5523
5524 if (_HVD_EX_IsAllBufferEmpty(u32Id, FALSE))
5525 {
5526 return TRUE;
5527 }
5528 else
5529 {
5530 return FALSE;
5531 }
5532 #if 0
5533 if (u32Times > 200)
5534 {
5535 HVD_EX_MSG_INF("Flush() timeout failed:BBU:%u Dec:%u Disp:%u Idle:%u ESr:%x ESw:%x \n",
5536 HAL_HVD_EX_GetData(E_HVD_GDATA_BBU_Q_NUMB),
5537 HAL_HVD_EX_GetData(E_HVD_GDATA_DEC_Q_NUMB),
5538 HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_NUMB),
5539 HAL_HVD_EX_GetData(E_HVD_GDATA_VPU_IDLE_CNT),
5540 HAL_HVD_EX_GetData(E_HVD_GDATA_ES_READ_PTR), HAL_HVD_EX_GetData(E_HVD_GDATA_ES_WRITE_PTR));
5541 eRet = E_HVD_EX_FAIL;
5542 break;
5543 }
5544 return TRUE;
5545 #endif
5546 }
5547
5548 // get infomation
5549
5550 //-----------------------------------------------------------------------------
5551 /// @brief \b Function \b Name: MDrv_HVD_EX_GetBBUVacancy()
5552 /// @brief \b Function \b Description: get the vacancy of BBU queue.
5553 /// @return - TRUE / FALSE
5554 /// @retval -0: queue is full.
5555 /// @retval -not zero: queue is not full.
5556 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetBBUVacancy(MS_U32 u32Id)5557 MS_U32 MDrv_HVD_EX_GetBBUVacancy(MS_U32 u32Id)
5558 {
5559 #ifdef VDEC3
5560 MS_U32 u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
5561 return HAL_VPU_EX_GetVBBUVacancy(u32Id, u32VBBUAddr);
5562 #else
5563 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5564 MS_U32 u32BBUQnumb = 0;
5565 MS_U32 u32BBUTotal = 0;
5566 MS_U32 u32PTSQnumb = 0;
5567 MS_U32 u32PTSTotal = 0;
5568
5569 HVD_EX_MSG_TRACE();
5570 _DRV_HVD_Inited(u8DrvId,FALSE);
5571
5572 u32BBUTotal = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TOTAL_TBL_ENTRY);
5573 u32BBUQnumb = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB);
5574
5575 if (u32BBUTotal < u32BBUQnumb)
5576 {
5577 HVD_EX_MSG_ERR("Total BBUs(%lx) is less than the current(%lx)\n", u32BBUTotal, u32BBUQnumb);
5578 u32BBUQnumb = 0;
5579 }
5580 else
5581 {
5582 u32BBUQnumb = u32BBUTotal - u32BBUQnumb;
5583
5584 if (u32BBUQnumb < MIN_BBU_VACANCY_FOR_4K2K)
5585 {
5586 HVD_EX_MSG_DBG("BBU Vacancy(%lx) is less than MIN_BBU_VACANCY_FOR_4K2K(%x)\n", u32BBUQnumb, MIN_BBU_VACANCY_FOR_4K2K);
5587 u32BBUQnumb = 0;
5588 }
5589 }
5590
5591 #if HVD_ENABLE_MVC
5592 if ( u32BBUQnumb &&
5593 ( (HAL_HVD_EX_CheckMVCID(u32Id) == FALSE) ||
5594 ((HAL_HVD_EX_CheckMVCID(u32Id) == TRUE) && (E_VDEC_EX_MAIN_VIEW == HAL_HVD_EX_GetView(u32Id))) )
5595 )
5596 #else
5597 if (u32BBUQnumb)
5598 #endif
5599 {
5600 u32PTSTotal = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_PTS_TOTAL_ENTRY_NUMB) - 1; // add -1 for full case
5601 u32PTSQnumb = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_PTS_Q_NUMB);
5602
5603 if (u32PTSTotal <= u32PTSQnumb)
5604 {
5605 HVD_EX_MSG_DBG
5606 ("Warn: GetBBUVacancy has error that total PTS Q number(%lx) is smaller than current PTS Q number(%lx)\n",
5607 u32PTSTotal, u32PTSQnumb);
5608 u32BBUQnumb = 0;
5609 }
5610 }
5611
5612 return u32BBUQnumb;
5613 #endif
5614 }
5615
5616 //-----------------------------------------------------------------------------
5617 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDispInfo()
5618 /// @brief \b Function \b Description: Get video display information
5619 /// @param -pinfo \b OUT : pointer to video display information.
5620 /// @return -The result of command get display information
5621 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDispInfo(MS_U32 u32Id,HVD_EX_DispInfo * pInfo)5622 HVD_EX_Result MDrv_HVD_EX_GetDispInfo(MS_U32 u32Id, HVD_EX_DispInfo *pInfo)
5623 {
5624 HVD_EX_Result eRet = E_HVD_EX_FAIL;
5625 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5626
5627 eRet = _HVD_EX_GetDispInfo(u32Id, pInfo, TRUE);
5628 if (E_HVD_EX_OK == eRet)
5629 {
5630 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
5631 pCtrl->bFrmRateSupported = HAL_HVD_EX_GetFrmRateIsSupported(u32Id, pInfo->u16HorSize, pInfo->u16VerSize, pInfo->u32FrameRate);
5632 HVD_EX_MSG_DBG("bFrmRateSupported[0x%x]=%x\n", u8DrvId, pCtrl->bFrmRateSupported);
5633 }
5634
5635 #if HVD_ENABLE_RV_FEATURE
5636 if (HVD_INIT_HW_RM == (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
5637 {
5638 //RM is always displayed by 60 frames per sec.
5639 pInfo->u32FrameRate = 60000;
5640 HVD_EX_MSG_DBG("rm force set 60fps\n");
5641 }
5642 #endif
5643
5644 return eRet;
5645 }
5646
5647 //-----------------------------------------------------------------------------
5648 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPtsStcDiff()
5649 /// @brief \b Function \b Description: Get the difference of PTS and STC
5650 /// @return - PTS
5651 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPtsStcDiff(MS_U32 u32Id)5652 MS_S64 MDrv_HVD_EX_GetPtsStcDiff(MS_U32 u32Id)
5653 {
5654 MS_S64 s64PTS = 0;
5655 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5656 _DRV_HVD_Inited(u8DrvId,FALSE);
5657
5658 s64PTS = HAL_HVD_EX_GetData_EX(u32Id, E_HVD_GDATA_PTS_STC_DIFF);
5659
5660 return s64PTS;
5661 }
5662
5663 //-----------------------------------------------------------------------------
5664 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPTS()
5665 /// @brief \b Function \b Description: get the pts of current displayed video frame. unit: ms
5666 /// @return - PTS
5667 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPTS(MS_U32 u32Id)5668 MS_U32 MDrv_HVD_EX_GetPTS(MS_U32 u32Id)
5669 {
5670 MS_U32 u32PTS = 0;
5671 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5672 _DRV_HVD_Inited(u8DrvId,FALSE);
5673
5674 u32PTS = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_PTS);
5675
5676 u32PTS = _HVD_EX_ReportLow32BitPTS(u32Id, u32PTS);
5677
5678 return u32PTS;
5679 }
5680
5681 //-----------------------------------------------------------------------------
5682 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPTS()
5683 /// @brief \b Function \b Description: get the 33 bits pts of current displayed video frame. unit: ms
5684 /// @return - PTS
5685 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetU64PTS(MS_U32 u32Id)5686 MS_U64 MDrv_HVD_EX_GetU64PTS(MS_U32 u32Id)
5687 {
5688 MS_U64 u64PTS = 0;
5689 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5690 _DRV_HVD_Inited(u8DrvId,FALSE);
5691
5692 u64PTS = *((MS_U64*)(HAL_HVD_EX_GetData(u32Id,E_HVD_GDATA_U64PTS)));
5693
5694 return u64PTS;
5695 }
5696
5697 //-----------------------------------------------------------------------------
5698 /// @brief \b Function \b Name: MDrv_HVD_EX_GetU64PTS_PreParse()
5699 /// @brief \b Function \b Description: get the 33 bits pts which is latest added into PTS table. unit: ms
5700 /// @return - PTS
5701 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetU64PTS_PreParse(MS_U32 u32Id)5702 MS_U64 MDrv_HVD_EX_GetU64PTS_PreParse(MS_U32 u32Id)
5703 {
5704 MS_U64 u64PTS = 0;
5705 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5706 _DRV_HVD_Inited(u8DrvId,FALSE);
5707
5708 u64PTS = *((MS_U64*)(HAL_HVD_EX_GetData(u32Id,E_HVD_GDATA_U64PTS_PRE_PARSE)));
5709 u64PTS = _90K_TO_MS(u64PTS); //ms
5710
5711 return u64PTS;
5712 }
5713
5714 //-----------------------------------------------------------------------------
5715 /// @brief \b Function \b Name: MDrv_HVD_EX_GetNextPTS()
5716 /// @brief \b Function \b Description: get the pts of next displayed video frame. unit: ms
5717 /// @return - PTS
5718 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetNextPTS(MS_U32 u32Id)5719 MS_U32 MDrv_HVD_EX_GetNextPTS(MS_U32 u32Id)
5720 {
5721 MS_U32 u32PTS = 0;
5722 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5723 _DRV_HVD_Inited(u8DrvId,FALSE);
5724
5725 u32PTS = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_NEXT_PTS);
5726
5727 u32PTS = _HVD_EX_ReportLow32BitPTS(u32Id, u32PTS);
5728
5729 return u32PTS;
5730 }
5731
5732 //-----------------------------------------------------------------------------
5733 /// @brief \b Function \b Name: MDrv_HVD_EX_GetNextDispQPtr()
5734 /// @brief \b Function \b Description: get the pointer of next displayed video frame.
5735 /// @return - Pointer in the display queue
5736 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetNextDispQPtr(MS_U32 u32Id)5737 MS_U32 MDrv_HVD_EX_GetNextDispQPtr(MS_U32 u32Id)
5738 {
5739 MS_U32 u32Ptr = 0;
5740 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5741 _DRV_HVD_Inited(u8DrvId,FALSE);
5742
5743 //HVD_PRINT("GetNextDispQPtr DqNum=%ld, DqPtr=%ld\n", HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_NUMB), HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_PTR));
5744 //if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_NUMB) != 0)
5745 {
5746 u32Ptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_PTR);
5747 }
5748
5749 return u32Ptr;
5750 }
5751
5752 //-----------------------------------------------------------------------------
5753 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDataErrCnt()
5754 /// @brief \b Function \b Description: get accumulated data Error Count
5755 /// @return -data error count
5756 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDataErrCnt(MS_U32 u32Id)5757 MS_U32 MDrv_HVD_EX_GetDataErrCnt(MS_U32 u32Id)
5758 {
5759 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5760 _DRV_HVD_Inited(u8DrvId,FALSE);
5761
5762 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DATA_ERROR_CNT);
5763 }
5764
5765 //-----------------------------------------------------------------------------
5766 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDecErrCnt()
5767 /// @brief \b Function \b Description: get accumulated decode Error Count
5768 /// @return -decode error count
5769 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDecErrCnt(MS_U32 u32Id)5770 MS_U32 MDrv_HVD_EX_GetDecErrCnt(MS_U32 u32Id)
5771 {
5772 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5773 _DRV_HVD_Inited(u8DrvId,FALSE);
5774
5775 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_ERROR_CNT);
5776 }
5777
5778 //-----------------------------------------------------------------------------
5779 /// @brief \b Function \b Name: MDrv_HVD_EX_GetESWritePtr()
5780 /// @brief \b Function \b Description: Get Elementary Stream buffer write point
5781 /// @return - ES buffer write point offset from bitstream buffer base
5782 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetESWritePtr(MS_U32 u32Id)5783 MS_VIRT MDrv_HVD_EX_GetESWritePtr(MS_U32 u32Id)
5784 {
5785 #ifdef VDEC3
5786 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5787 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
5788 if ((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_INPUT_MASK) == E_HVD_INIT_INPUT_DRV) // File mode
5789 {
5790 MS_VIRT u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
5791 MS_VIRT u32Wptr = HAL_VPU_EX_GetESWritePtr(u32Id, u32VBBUAddr);
5792
5793 if (pCtrl->bNStreamMode)
5794 {
5795 if (u32Wptr != 0)
5796 u32Wptr = u32Wptr - (pCtrl->MemMap.u32BitstreamBufAddr - pCtrl->MemMap.u32TotalBitstreamBufAddr); // NStream will share the same ES buffer
5797 }
5798
5799 if (u32Wptr & HVD_RV_BROKEN_BY_US_MASK)
5800 u32Wptr &= (~HVD_RV_BROKEN_BY_US_MASK);
5801
5802 return u32Wptr;
5803 }
5804 else // TSP mode
5805 #endif
5806 {
5807 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5808 _DRV_HVD_Inited(u8DrvId,FALSE);
5809
5810 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR);
5811 }
5812 }
5813
5814 //-----------------------------------------------------------------------------
5815 /// @brief \b Function \b Name: MDrv_HVD_EX_GetESReadPtr()
5816 /// @brief \b Function \b Description: Get Elementary Stream buffer read point
5817 /// @return - ES buffer read point offset from bitstream buffer base
5818 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetESReadPtr(MS_U32 u32Id)5819 MS_VIRT MDrv_HVD_EX_GetESReadPtr(MS_U32 u32Id)
5820 {
5821 #ifdef VDEC3
5822 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5823 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
5824 if ((pCtrl->InitParams.u32ModeFlag & E_HVD_INIT_INPUT_MASK) == E_HVD_INIT_INPUT_DRV) // File mode
5825 {
5826 MS_VIRT u32VBBUAddr = MDrv_HVD_EX_GetData(u32Id, E_HVD_EX_GDATA_TYPE_VBBU_ADDR);
5827 MS_VIRT u32Rptr = HAL_VPU_EX_GetESReadPtr(u32Id, u32VBBUAddr);
5828
5829 if (pCtrl->bNStreamMode)
5830 {
5831 if (u32Rptr != 0)
5832 u32Rptr = u32Rptr - (pCtrl->MemMap.u32BitstreamBufAddr - pCtrl->MemMap.u32TotalBitstreamBufAddr); // NStream will share the same ES buffer
5833 }
5834
5835 if (u32Rptr & HVD_RV_BROKEN_BY_US_MASK)
5836 u32Rptr &= (~HVD_RV_BROKEN_BY_US_MASK);
5837
5838 return u32Rptr;
5839
5840 }
5841 else // TSP mode
5842 #endif
5843 {
5844 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5845 _DRV_HVD_Inited(u8DrvId,FALSE);
5846
5847 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR);
5848 }
5849 }
5850
5851 //-----------------------------------------------------------------------------
5852 /// @brief \b Function \b Name: MDrv_HVD_GetESLevel()
5853 /// @brief \b Function \b Description: Get Elementary Stream buffer level
5854 /// @return - ES buffer level (ES data size in bitstream buffer)
5855 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetESQuantity(MS_U32 u32Id)5856 MS_U32 MDrv_HVD_EX_GetESQuantity(MS_U32 u32Id)
5857 {
5858 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5859 _DRV_HVD_Inited(u8DrvId,FALSE);
5860
5861 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_QUANTITY);
5862 }
5863
5864 #define FATAL_ERROR(x) ((x)==E_HVD_RETURN_OUTOF_MEMORY)
5865
5866 //-----------------------------------------------------------------------------
5867 /// @brief \b Function \b Name: MDrv_HVD_EX_GetErrCode()
5868 /// @brief \b Function \b Description: get error code
5869 /// @return - error code number
5870 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetErrCode(MS_U32 u32Id)5871 MS_U32 MDrv_HVD_EX_GetErrCode(MS_U32 u32Id)
5872 {
5873 // TODO: define driver error code for upper layer
5874 MS_U32 u32Ret = 0;
5875 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5876
5877 _DRV_HVD_Inited(u8DrvId,FALSE);
5878
5879 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ERROR_CODE);
5880
5881 u32Ret = _HVD_EX_Map2HVDErrCode(u32Ret);
5882
5883 #ifdef SUPPORT_X_MODEL_FEATURE //We using the common compile option to handle X model
5884 if (!FATAL_ERROR(u32Ret))
5885 #else
5886 if (u32Ret)
5887 #endif
5888 {
5889 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_ERROR_CODE, 0);
5890 }
5891
5892 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32LastErrCode = u32Ret;
5893
5894 return u32Ret;
5895 }
5896
5897 //-----------------------------------------------------------------------------
5898 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPlayMode()
5899 /// @brief \b Function \b Description: Get current play mode status.
5900 /// @param -eMode \b IN : Mode type.
5901 /// @return - mode status
5902 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPlayMode(MS_U32 u32Id,HVD_EX_GetModeStatus eMode)5903 MS_U32 MDrv_HVD_EX_GetPlayMode(MS_U32 u32Id, HVD_EX_GetModeStatus eMode)
5904 {
5905 MS_U32 u32Ret = 0;
5906 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5907
5908 HVD_EX_MSG_TRACE();
5909 _DRV_HVD_Inited(u8DrvId,FALSE);
5910
5911 switch (eMode)
5912 {
5913 case E_HVD_EX_GMODE_IS_SHOW_ERR_FRM:
5914 case E_HVD_EX_GMODE_IS_REPEAT_LAST_FIELD:
5915 case E_HVD_EX_GMODE_IS_ERR_CONCEAL:
5916 case E_HVD_EX_GMODE_IS_SYNC_ON:
5917 case E_HVD_EX_GMODE_IS_PLAYBACK_FINISH:
5918 case E_HVD_EX_GMODE_SYNC_MODE:
5919 case E_HVD_EX_GMODE_SKIP_MODE:
5920 case E_HVD_EX_GMODE_DROP_MODE:
5921 case E_HVD_EX_GMODE_DISPLAY_SPEED:
5922 case E_HVD_EX_GMODE_FRC_MODE:
5923 // TODO: add isr type here
5924 case E_HVD_EX_GMODE_ISR_TYPE:
5925 u32Ret = HAL_HVD_EX_GetData(u32Id, (HVD_GetData) ((MS_U32) eMode + (MS_U32) E_HVD_GDATA_IS_SHOW_ERR_FRM));
5926 break;
5927 case E_HVD_EX_GMODE_IS_STEP_DISPLAY:
5928 u32Ret = _DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL);
5929 break;
5930 case E_HVD_EX_GMODE_STREAM_TYPE:
5931 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & E_HVD_INIT_MAIN_MASK;
5932 break;
5933 default:
5934 break;
5935 }
5936
5937 return u32Ret;
5938 }
5939
5940 //-----------------------------------------------------------------------------
5941 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPlayState()
5942 /// @brief \b Function \b Description: get current play state
5943 /// @return - play state
5944 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPlayState(MS_U32 u32Id)5945 HVD_EX_GetPlayState MDrv_HVD_EX_GetPlayState(MS_U32 u32Id)
5946 {
5947 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5948 MS_U32 u32FWstate = 0;
5949 HVD_EX_GetPlayState eRet = E_HVD_EX_GSTATE_INIT;
5950
5951 HVD_EX_MSG_TRACE();
5952 _DRV_HVD_Inited(u8DrvId,eRet);
5953
5954 u32FWstate = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE);
5955 u32FWstate &= E_HVD_FW_STATE_MASK;
5956
5957 switch (u32FWstate)
5958 {
5959 case E_HVD_FW_INIT:
5960 eRet = E_HVD_EX_GSTATE_INIT;
5961 break;
5962 case E_HVD_FW_PLAY:
5963 eRet = E_HVD_EX_GSTATE_PLAY;
5964 break;
5965 case E_HVD_FW_PAUSE:
5966 eRet = E_HVD_EX_GSTATE_PAUSE;
5967 break;
5968 case E_HVD_FW_STOP:
5969 eRet = E_HVD_EX_GSTATE_STOP;
5970 break;
5971 default:
5972 break;
5973 }
5974 return eRet;
5975 }
5976
5977 //-----------------------------------------------------------------------------
5978 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDecodeCnt()
5979 /// @brief \b Function \b Description: get accumulated decoded frame Count
5980 /// @return - decoded frame Count
5981 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDecodeCnt(MS_U32 u32Id)5982 MS_U32 MDrv_HVD_EX_GetDecodeCnt(MS_U32 u32Id)
5983 {
5984 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5985 _DRV_HVD_Inited(u8DrvId,FALSE);
5986
5987 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT);
5988 }
5989
5990 //-----------------------------------------------------------------------------
5991 /// @brief \b Function \b Name: MDrv_HVD_EX_GetActiveFormat()
5992 /// @brief \b Function \b Description: Get current AFD ID
5993 /// @return - AFD ID, 0xFF:invalid value
5994 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetActiveFormat(MS_U32 u32Id)5995 MS_U8 MDrv_HVD_EX_GetActiveFormat(MS_U32 u32Id)
5996 {
5997 HVD_Display_Info *pDispInfo = NULL;
5998 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5999
6000 HVD_EX_MSG_TRACE();
6001
6002 _DRV_HVD_Inited(u8DrvId,~0);
6003
6004 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
6005 {
6006 return 0;
6007 }
6008
6009 pDispInfo = (HVD_Display_Info *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_INFO_ADDR);
6010
6011 if (pDispInfo != NULL)
6012 {
6013 return pDispInfo->u8AFD;
6014 }
6015 else
6016 {
6017 return ~0;
6018 }
6019 }
6020
6021 //-----------------------------------------------------------------------------
6022 /// @brief \b Function \b Name: MDrv_HVD_EX_GetInfo()
6023 /// @brief \b Function \b Description: Get information of HVD driver.
6024 /// @return - driver information
6025 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetInfo(void)6026 const HVD_EX_DrvInfo *MDrv_HVD_EX_GetInfo(void)
6027 {
6028 DrvInfo.bAVC = MDrv_HVD_EX_GetCaps(E_HVD_EX_AVC);
6029 DrvInfo.bAVS = MDrv_HVD_EX_GetCaps(E_HVD_EX_AVS);
6030 DrvInfo.bRM = MDrv_HVD_EX_GetCaps(E_HVD_EX_RM);
6031 DrvInfo.FWversion = HVD_FW_VERSION;
6032 return &DrvInfo;
6033 }
6034
6035 //-----------------------------------------------------------------------------
6036 /// @brief \b Function \b Name: MDrv_HVD_EX_GetLibVer()
6037 /// @brief \b Function \b Description: Get verion ID of HVD library.
6038 /// @param -pVerString \b OUT : pointer to HVD driver version ID.
6039 /// @return - driver library verion ID
6040 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetLibVer(const MSIF_Version ** ppVersion)6041 HVD_EX_Result MDrv_HVD_EX_GetLibVer(const MSIF_Version ** ppVersion)
6042 {
6043 if (!ppVersion)
6044 {
6045 return E_HVD_EX_FAIL;
6046 }
6047
6048 *ppVersion = &_drv_hvd_version;
6049 return E_HVD_EX_OK;
6050 }
6051
6052 //-----------------------------------------------------------------------------
6053 /// @brief \b Function \b Name: MDrv_HVD_EX_GetStatus()
6054 /// @brief \b Function \b Description: Get status of HVD driver
6055 /// @param -pstatus \b OUT : driver status
6056 /// @return - TRUE / FALSE
6057 /// @retval -FALSE(0): Low delay flag not found.
6058 /// @retval -TRUE(1): Low delay flag found.
6059 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetStatus(MS_U32 u32Id,HVD_EX_DrvStatus * pstatus)6060 MS_BOOL MDrv_HVD_EX_GetStatus(MS_U32 u32Id, HVD_EX_DrvStatus *pstatus)
6061 {
6062 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6063
6064 if (pstatus == NULL)
6065 {
6066 return FALSE;
6067 }
6068
6069 pstatus->bInit = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_INIT_FINISHED;
6070 pstatus->bBusy = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_PROCESSING;
6071
6072 return TRUE;
6073 }
6074
6075 //-----------------------------------------------------------------------------
6076 /// @brief \b Function \b Name: MDrv_HVD_EX_GetFrmInfo()
6077 /// @brief \b Function \b Description: Get current displayed or decoded frame information of HVD driver
6078 /// @param -eType \b IN : Type of frame information
6079 /// @param -pInfo \b OUT : frame information
6080 /// @return -The result of command get frame information
6081 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFrmInfo(MS_U32 u32Id,HVD_EX_GetFrmInfoType eType,HVD_EX_FrameInfo * pInfo)6082 HVD_EX_Result MDrv_HVD_EX_GetFrmInfo(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType, HVD_EX_FrameInfo * pInfo)
6083 {
6084 HVD_Frm_Information *pFrmInfo = NULL;
6085 HVD_Frm_Information_EXT_Entry *pFrmInfo_ext = NULL;
6086
6087 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6088
6089 HVD_EX_MSG_TRACE();
6090 _DRV_HVD_Inited(u8DrvId,E_HVD_EX_FAIL);
6091
6092 if (pInfo == NULL)
6093 {
6094 return E_HVD_EX_FAIL;
6095 }
6096
6097 if (eType == E_HVD_EX_GFRMINFO_DISPLAY)
6098 {
6099 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_FRM_INFO);
6100 }
6101 else if (eType == E_HVD_EX_GFRMINFO_DECODE)
6102 {
6103 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_FRM_INFO);
6104 }
6105 else if (eType == E_HVD_EX_GFRMINFO_NEXT_DISPLAY)
6106 {
6107 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_NEXT_DISP_FRM_INFO);
6108 if(pFrmInfo != NULL)
6109 {
6110 pFrmInfo_ext = (HVD_Frm_Information_EXT_Entry *)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_NEXT_DISP_FRM_INFO_EXT);
6111 }
6112 }
6113 #if HVD_ENABLE_MVC
6114 else if (eType == E_HVD_EX_GFRMINFO_DISPLAY_SUB)
6115 {
6116 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_FRM_INFO_SUB);
6117 }
6118 else if (eType == E_HVD_EX_GFRMINFO_DECODE_SUB)
6119 {
6120 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_FRM_INFO_SUB);
6121 }
6122 #endif ///HVD_ENABLE_MVC
6123 else if (eType == E_HVD_EX_GFRMINFO_LAST_DISPLAY)
6124 {
6125 pFrmInfo = (HVD_Frm_Information *) pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo;
6126 }
6127 else if (eType == E_HVD_EX_GFRMINFO_LAST_DISPLAY_EX)
6128 {
6129 pFrmInfo = (HVD_Frm_Information *) pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo;
6130 pFrmInfo_ext = (HVD_Frm_Information_EXT_Entry *) pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo_ext;
6131 }
6132
6133 if (pFrmInfo != NULL)
6134 {
6135 MS_U32 u32Luma8MiuSel = (MS_U32)pFrmInfo->u2Luma0Miu;
6136 MS_U32 u32Luma2MiuSel = (MS_U32)pFrmInfo->u2Luma1Miu;
6137 MS_U32 u32Chroma8MiuSel = (MS_U32)pFrmInfo->u2Chroma0Miu;
6138 MS_U32 u32Chroma2MiuSel = (MS_U32)pFrmInfo->u2Chroma1Miu;
6139
6140 pInfo->u32LumaAddr = (MS_PHY) (pFrmInfo->u32LumaAddr + _HVD_EX_GetMIUBase(u8DrvId, u32Luma8MiuSel));
6141 pInfo->u32ChromaAddr = (MS_PHY) (pFrmInfo->u32ChromaAddr + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma8MiuSel));
6142 pInfo->u32TimeStamp = pFrmInfo->u32TimeStamp;
6143 pInfo->u32ID_L = pFrmInfo->u32ID_L;
6144 pInfo->u32ID_H = pFrmInfo->u32ID_H;
6145 pInfo->u32PrivateData = pFrmInfo->u32PrivateData; //[STB]only for AVC
6146 pInfo->u16Pitch = pFrmInfo->u16Pitch;
6147 pInfo->u16Height = pFrmInfo->u16Height;
6148 pInfo->u16Width = pFrmInfo->u16Width;
6149 pInfo->eFrmType = (HVD_EX_FrmType) (pFrmInfo->u8FrmType);
6150 pInfo->eFieldType = (HVD_EX_FieldType) (pFrmInfo->u8FieldType);
6151
6152 pInfo->u32LumaAddr_2bit = (MS_PHY) (pFrmInfo->u32LumaAddr_2bit + _HVD_EX_GetMIUBase(u8DrvId, u32Luma2MiuSel)) ;
6153 pInfo->u32ChromaAddr_2bit = (MS_PHY) (pFrmInfo->u32ChromaAddr_2bit + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma2MiuSel));
6154 pInfo->u16Pitch_2bit = pFrmInfo->u16Pitch_2bit;
6155 pInfo->u8LumaBitdepth = pFrmInfo->u8LumaBitdepth;
6156 pInfo->u8ChromaBitdepth = pFrmInfo->u8ChromaBitdepth;
6157
6158 if ((pInfo->u16Pitch == 0) && (pInfo->u16Width == 0) && (pInfo->u16Height == 0))
6159 {
6160 return E_HVD_EX_FAIL;
6161 }
6162
6163 if (eType == E_HVD_EX_GFRMINFO_NEXT_DISPLAY)
6164 {
6165 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo = pFrmInfo;
6166 }
6167
6168 if(pFrmInfo_ext != NULL)
6169 {
6170 pInfo->u32LumaAddr_2bit = (MS_PHY)(pFrmInfo_ext->u32LumaAddrExt[HVD_FRM_INFO_EXT_TYPE_10BIT]
6171 + _HVD_EX_GetMIUBase(u8DrvId, u32Luma2MiuSel));
6172 pInfo->u32ChromaAddr_2bit = (MS_PHY)(pFrmInfo_ext->u32ChromaAddrExt[HVD_FRM_INFO_EXT_TYPE_10BIT]
6173 + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma2MiuSel));
6174 pInfo->u32LumaAddrI = (MS_PHY)(pFrmInfo_ext->u32LumaAddrExt[HVD_FRM_INFO_EXT_TYPE_INTERLACE]
6175 + _HVD_EX_GetMIUBase(u8DrvId, u32Luma8MiuSel));
6176 pInfo->u32LumaAddrI_2bit = (MS_PHY)(pFrmInfo_ext->u32LumaAddrExt[HVD_FRM_INFO_EXT_TYPE_10BIT_INTERLACE]
6177 + _HVD_EX_GetMIUBase(u8DrvId, u32Luma2MiuSel));
6178 pInfo->u32ChromaAddrI = (MS_PHY)(pFrmInfo_ext->u32ChromaAddrExt[HVD_FRM_INFO_EXT_TYPE_INTERLACE]
6179 + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma8MiuSel));
6180 pInfo->u32ChromaAddrI_2bit = (MS_PHY)(pFrmInfo_ext->u32ChromaAddrExt[HVD_FRM_INFO_EXT_TYPE_10BIT_INTERLACE]
6181 + _HVD_EX_GetMIUBase(u8DrvId, u32Chroma2MiuSel));
6182 pInfo->u32MFCodecInfo = pFrmInfo_ext->MFCodecInfo;
6183 pInfo->u32LumaMFCbitlen = pFrmInfo_ext->u32LumaAddrExt[HVD_FRM_INFO_EXT_TYPE_MFCBITLEN];
6184 pInfo->u32ChromaMFCbitlen = pFrmInfo_ext->u32ChromaAddrExt[HVD_FRM_INFO_EXT_TYPE_MFCBITLEN];
6185
6186
6187 pInfo->u32MaxLuminance = pFrmInfo_ext->maxLuminance;
6188 pInfo->u32MinLuminance = pFrmInfo_ext->minLuminance;
6189 pInfo->u16Primaries[0][0] = pFrmInfo_ext->primaries[0][0];
6190 pInfo->u16Primaries[0][1] = pFrmInfo_ext->primaries[0][1];
6191 pInfo->u16Primaries[1][0] = pFrmInfo_ext->primaries[1][0];
6192 pInfo->u16Primaries[1][1] = pFrmInfo_ext->primaries[1][1];
6193 pInfo->u16Primaries[2][0] = pFrmInfo_ext->primaries[2][0];
6194 pInfo->u16Primaries[2][1] = pFrmInfo_ext->primaries[2][1];
6195 pInfo->u16WhitePoint[0] = pFrmInfo_ext->whitePoint[0];
6196 pInfo->u16WhitePoint[1] = pFrmInfo_ext->whitePoint[1];
6197
6198 pInfo->u8Frm_Info_Ext_avail = pFrmInfo_ext->Frm_Info_Ext_avail;
6199 pInfo->u8Colour_primaries = pFrmInfo_ext->colour_primaries;
6200 pInfo->u8Transfer_characteristics = pFrmInfo_ext->transfer_characteristics;
6201 pInfo->u8Matrix_coefficients = pFrmInfo_ext->matrix_coefficients;
6202
6203 pInfo->u8DVMode = pFrmInfo_ext->u8DVMode;
6204 pInfo->u32DVMetadataAddr = (MS_PHY)(pFrmInfo_ext->u32DVMetadataAddr);
6205 if (pInfo->u8DVMode & 0x03) // we hide dolby vision infomation into Luma Interlace Address when dolby mode enable;
6206 {
6207 pInfo->u32LumaAddrI = pInfo->u8DVMode;
6208 }
6209 pInfo->u32DVDMSize = pFrmInfo_ext->u32DVDMSize;
6210 pInfo->u32DVCompSize = pFrmInfo_ext->u32DVCompSize;
6211 pInfo->u8CurrentIndex = pFrmInfo_ext->u8CurrentIndex;
6212 pInfo->u32HDRRegAddr = pFrmInfo_ext->u32DVRegAddr;
6213 pInfo->u32HDRRegSize = pFrmInfo_ext->u32DVRegSize;
6214 pInfo->u32HDRLutAddr = pFrmInfo_ext->u32DVLutAddr;
6215 pInfo->u32HDRLutSize = pFrmInfo_ext->u32DVLutSize;
6216 pInfo->bDMEnable = pFrmInfo_ext->bDMEnable;
6217 pInfo->bCompEnable = pFrmInfo_ext->bCompEnable;
6218 pInfo->u8ComplexityLevel = pFrmInfo_ext->u8ComplexityLevel;
6219
6220 pInfo->u32ParWidth = pFrmInfo_ext->u32ParWidth;
6221 pInfo->u32ParHeight = pFrmInfo_ext->u32ParHeight;
6222 pInfo->u16CropRight = pFrmInfo_ext->u16CropRight;
6223 pInfo->u16CropLeft = pFrmInfo_ext->u16CropLeft;
6224 pInfo->u16CropBottom = pFrmInfo_ext->u16CropBottom;
6225 pInfo->u16CropTop = pFrmInfo_ext->u16CropTop;
6226
6227 pInfo->u8TileMode = pFrmInfo_ext->u8TileMode;
6228 pInfo->u16MIUBandwidth = pFrmInfo_ext->u16MIUBandwidth;
6229 pInfo->u16Bitrate = pFrmInfo_ext->u16Bitrate;
6230 pInfo->u8HTLBTableId = pFrmInfo_ext->u8HTLBTableId;
6231 pInfo->u8HTLBEntriesSize = pFrmInfo_ext->u8HTLBEntriesSize;
6232 pInfo->u32HTLBEntriesAddr = pFrmInfo_ext->u32HTLBEntriesAddr;
6233
6234 if (eType == E_HVD_EX_GFRMINFO_NEXT_DISPLAY)
6235 {
6236 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo_ext = pFrmInfo_ext;
6237 }
6238 }
6239 }
6240 else
6241 {
6242 return E_HVD_EX_FAIL;
6243 }
6244
6245 return E_HVD_EX_OK;
6246 }
6247
6248 //-----------------------------------------------------------------------------
6249 /// @brief \b Function \b Name: MDrv_HVD_EX_GetISRInfo()
6250 /// @brief \b Function \b Description: Get information of HVD driver interrupt
6251 /// @param -eType \b OUT : ISR information
6252 /// @return -the result of get ISR information
6253 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetISRInfo(MS_U32 u32Id,MS_U32 * eType)6254 MS_BOOL MDrv_HVD_EX_GetISRInfo(MS_U32 u32Id, MS_U32 *eType)
6255 {
6256 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6257
6258 _DRV_HVD_Inited(u8DrvId,FALSE);
6259
6260 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.bInISR)
6261 {
6262 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.u32ISRInfo |= HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_HVD_ISR_STATUS);
6263 *eType = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.u32ISRInfo;
6264 }
6265 else
6266 {
6267 *eType = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_HVD_ISR_STATUS);
6268 }
6269
6270 HVD_EX_MSG_DBG("ISR=0x%x\n", *eType);
6271
6272 return TRUE;
6273 }
6274
6275 //-----------------------------------------------------------------------------
6276 /// @brief \b Function \b Name: MDrv_HVD_EX_CalLumaSum()
6277 /// @brief \b Function \b Description: Get the sum of luma data in a frame.
6278 /// @param -eType \b IN : Type of frame information
6279 /// @return -the sum
6280 /// @retval -0xFFFFFFFF: error occer.
6281 /// @retval -not zero: the sum.
6282 //-----------------------------------------------------------------------------
MDrv_HVD_EX_CalLumaSum(MS_U32 u32Id,HVD_EX_GetFrmInfoType eType)6283 MS_U32 MDrv_HVD_EX_CalLumaSum(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType)
6284 {
6285 HVD_Frm_Information *pFrmInfo = NULL;
6286 MS_U32 u32Ret = HVD_U32_MAX;
6287 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6288
6289 HVD_EX_MSG_TRACE();
6290 _DRV_HVD_Inited(u8DrvId,u32Ret);
6291
6292 if (eType == E_HVD_EX_GFRMINFO_DISPLAY)
6293 {
6294 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_FRM_INFO);
6295 }
6296 else if (eType == E_HVD_EX_GFRMINFO_DECODE)
6297 {
6298 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_FRM_INFO);
6299 }
6300
6301 if (pFrmInfo != NULL)
6302 {
6303 MS_U32 u32tmp = 0;
6304 MS_U32 u32PitchCnt = 0;
6305 MS_U32 u32HeightCnt = 0;
6306 volatile MS_U8 *pLumaData = NULL;
6307 // PA2VA
6308 u32tmp = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32FrameBufAddr;
6309
6310 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_1/*u32CtrlMode & HVD_CTRL_FRM_MIU_1*/)
6311 {
6312 u32tmp -= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr;
6313 }
6314 else if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_2)
6315 {
6316 u32tmp -= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU2BaseAddr;
6317 }
6318
6319 pLumaData = (volatile MS_U8 *) (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32FrameBufVAddr + (pFrmInfo->u32LumaAddr - u32tmp));
6320
6321 for (u32HeightCnt = 0; u32HeightCnt < pFrmInfo->u16Height; u32HeightCnt++)
6322 {
6323 for (u32PitchCnt = 0; u32PitchCnt < pFrmInfo->u16Pitch; u32PitchCnt++)
6324 {
6325 if (u32PitchCnt < pFrmInfo->u16Pitch)
6326 {
6327 u32Ret += (MS_U32) (*pLumaData);
6328 }
6329 pLumaData++;
6330 }
6331 }
6332 }
6333
6334 return u32Ret;
6335 }
6336
6337 //-----------------------------------------------------------------------------
6338 /// @brief \b Function \b Name: MDrv_HVD_EX_GetUserData_Wptr()
6339 /// @brief \b Function \b Description: Get write pointer of user data.
6340 /// @return -the information of write pointer of user data.
6341 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetUserData_Wptr(MS_U32 u32Id)6342 MS_U32 MDrv_HVD_EX_GetUserData_Wptr(MS_U32 u32Id)
6343 {
6344 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6345 MS_U32 u32Ret = 0;
6346
6347 HVD_EX_MSG_TRACE();
6348 _DRV_HVD_Inited(u8DrvId,FALSE);
6349
6350 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_WPTR);
6351
6352 return u32Ret;
6353 }
6354
6355 //-----------------------------------------------------------------------------
6356 /// @brief \b Function \b Name: MDrv_HVD_EX_GetUserData_Packet()
6357 /// @brief \b Function \b Description: Get information of user data packet.
6358 /// @param -u32Idx \b IN : the pointer of required user data packet( valid range is 0 ~ 11 )
6359 /// @param -u32Size \b OUT : the size of required user data packet
6360 /// @return -the offset of user data packet form code buffer start address
6361 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetUserData_Packet(MS_U32 u32Id,MS_U32 u32Idx,MS_U32 * u32Size)6362 MS_VIRT MDrv_HVD_EX_GetUserData_Packet(MS_U32 u32Id, MS_U32 u32Idx, MS_U32 *u32Size)
6363 {
6364 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6365 MS_U32 u32Ret = 0;
6366 MS_VIRT tmp = 0;
6367 MS_U8 *pIdx = NULL;
6368
6369 HVD_EX_MSG_TRACE();
6370 _DRV_HVD_Inited(u8DrvId,FALSE);
6371
6372 *u32Size = 0;
6373 tmp = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
6374
6375 if (u32Idx >= tmp)
6376 {
6377 HVD_EX_MSG_ERR("input user data index(%u) is larger than max index(%lu)\n", u32Idx, (unsigned long)tmp);
6378 return 0;
6379 }
6380 tmp = (MS_VIRT) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_ADDR);
6381 if (tmp == 0)
6382 {
6383 HVD_EX_MSG_INF("HVD FW ERR: user data packet idx tbl base addr(%lx) is zero\n", (unsigned long)tmp);
6384 return 0;
6385 }
6386
6387 pIdx = (MS_U8 *) (tmp + u32Idx);
6388
6389 tmp = (MS_VIRT) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_TBL_SIZE);
6390 if ((*pIdx) >= tmp)
6391 {
6392 HVD_EX_MSG_INF("HVD FW ERR: user data packet tbl ptr(%lu) is larger than max size(%lu)\n", (unsigned long) (*pIdx), (unsigned long)tmp);
6393 return 0;
6394 }
6395 tmp = (MS_VIRT) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_TBL_ADDR);
6396 if (tmp == 0)
6397 {
6398 HVD_EX_MSG_INF("HVD FW ERR: user data packet packet tbl base offset(%lx) is zero\n", (unsigned long)tmp);
6399 return 0;
6400 }
6401 u32Ret = tmp;
6402 tmp = (MS_VIRT) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_SIZE);
6403 if (tmp == 0)
6404 {
6405 HVD_EX_MSG_INF("HVD FW ERR: user data packet packet size(%lu) is zero\n", (unsigned long)tmp);
6406 return 0;
6407 }
6408 *u32Size = tmp;
6409 u32Ret += (MS_U32) (*pIdx) * tmp;
6410 return u32Ret;
6411 }
6412
6413 // VDEC Interal control
6414 //-----------------------------------------------------------------------------
6415 /// @brief \b Function \b Name: MDrv_HVD_EX_GenPattern()
6416 /// @brief \b Function \b Description: Generate spcific pattern to support some special function.
6417 /// @param -eType \b IN : the virtual address of spcific pattern
6418 /// @param -u32VAddr \b IN : the virtual address of spcific pattern
6419 /// @param -u32Size \b IN, OUT :
6420 /// IN: the input array size.
6421 /// OUT: the used array size.
6422 /// @return -The result of command generate spcific pattern
6423 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GenPattern(MS_U32 u32Id,HVD_EX_PatternType eType,MS_VIRT u32VAddr,MS_U32 * pu32Size)6424 HVD_EX_Result MDrv_HVD_EX_GenPattern(MS_U32 u32Id, HVD_EX_PatternType eType, MS_VIRT u32VAddr, MS_U32 * pu32Size)
6425 {
6426 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6427 MS_U8 *pDummyData = NULL;
6428 MS_U32 u32MinPatternSize = 0;
6429 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6430
6431 HVD_EX_MSG_TRACE();
6432 _DRV_HVD_Inited(u8DrvId,eRet);
6433 _DRV_HVD_EX_Entry(u8DrvId);
6434
6435 if (eType == E_HVD_EX_PATTERN_FLUSH) // flush pattern
6436 {
6437 // Driver input need not to push flush pattern
6438 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
6439 {
6440 *pu32Size = 0;
6441 eRet = E_HVD_EX_OK;
6442 _DRV_HVD_EX_RET(u8DrvId, eRet);
6443 }
6444
6445 // TSP input process
6446 if (u32VAddr == 0)
6447 {
6448 *pu32Size = 8 + 144;
6449 HVD_EX_MSG_ERR("Flush Pattern address shall not be zero\n");
6450 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
6451 _DRV_HVD_EX_RET(u8DrvId, eRet);
6452 }
6453
6454 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
6455 {
6456 case HVD_INIT_HW_AVC:
6457 case HVD_INIT_HW_MVC:
6458 case HVD_INIT_HW_VP8:
6459 case HVD_INIT_HW_AVS:
6460 #if SUPPORT_EVD
6461 case HVD_INIT_HW_VP9:
6462 case HVD_INIT_HW_HEVC:
6463 #endif
6464 {
6465 u32MinPatternSize = 8 + 144;
6466 break;
6467 }
6468 case HVD_INIT_HW_RM:
6469 default:
6470 u32MinPatternSize = 0;
6471 break;
6472 }
6473
6474 if (*pu32Size < u32MinPatternSize)
6475 {
6476 HVD_EX_MSG_ERR("Flush Pattern must have at least %u bytes, input:%u\n", u32MinPatternSize,
6477 (MS_U32) (*pu32Size));
6478 *pu32Size = u32MinPatternSize;
6479 eRet = E_HVD_EX_RET_OUTOF_MEMORY;
6480 _DRV_HVD_EX_RET(u8DrvId, eRet);
6481 }
6482
6483 *pu32Size = u32MinPatternSize;
6484 pDummyData = (MS_U8 *) u32VAddr;
6485
6486 memset((void *) pDummyData, 0, *pu32Size);
6487
6488 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
6489 {
6490 case HVD_INIT_HW_AVC:
6491 case HVD_INIT_HW_MVC:
6492 case HVD_INIT_HW_VP8:
6493 #if SUPPORT_EVD
6494 case HVD_INIT_HW_VP9:
6495 case HVD_INIT_HW_HEVC:
6496 #endif
6497 {
6498 pDummyData[0] = 0;
6499 pDummyData[1] = 0;
6500 pDummyData[2] = 1;
6501 pDummyData[3] = 0xFF;
6502 pDummyData[4] = 0xAA;
6503 pDummyData[5] = 0x55;
6504 pDummyData[6] = 0xAA;
6505 pDummyData[7] = 0x55;
6506
6507 break;
6508 }
6509 case HVD_INIT_HW_AVS:
6510 {
6511 pDummyData[0] = 0;
6512 pDummyData[1] = 0;
6513 pDummyData[2] = 1;
6514 pDummyData[3] = 0xB4;
6515 pDummyData[4] = 0xAA;
6516 pDummyData[5] = 0x55;
6517 pDummyData[6] = 0xAA;
6518 pDummyData[7] = 0x55;
6519
6520 break;
6521 }
6522 case HVD_INIT_HW_RM:
6523 default:
6524 break;
6525 }
6526 }
6527 else if (eType == E_HVD_EX_PATTERN_FILEEND) // dummy pattern
6528 {
6529 // Driver input need not to push dummy pattern
6530 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
6531 {
6532 *pu32Size = 0;
6533 eRet = E_HVD_EX_OK;
6534 _DRV_HVD_EX_RET(u8DrvId, eRet);
6535 }
6536
6537 // TSP input process
6538 if (u32VAddr == 0)
6539 {
6540 *pu32Size = 8 + 144;
6541 HVD_EX_MSG_ERR("Dummy Pattern address shall not be zero\n");
6542 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
6543 _DRV_HVD_EX_RET(u8DrvId, eRet);
6544 }
6545
6546 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
6547 {
6548 case HVD_INIT_HW_AVC:
6549 case HVD_INIT_HW_MVC:
6550 case HVD_INIT_HW_VP8:
6551 case HVD_INIT_HW_AVS:
6552 #if SUPPORT_EVD
6553 case HVD_INIT_HW_VP9:
6554 case HVD_INIT_HW_HEVC:
6555 #endif
6556 u32MinPatternSize = 8 + 144;
6557 break;
6558 case HVD_INIT_HW_RM:
6559 default:
6560 u32MinPatternSize = 0;
6561 break;
6562 }
6563
6564 if (*pu32Size < u32MinPatternSize)
6565 {
6566 HVD_EX_MSG_ERR("Dummy Pattern must have at least %u bytes, input:%u\n", u32MinPatternSize,
6567 (MS_U32) (*pu32Size));
6568 *pu32Size = u32MinPatternSize;
6569 eRet = E_HVD_EX_RET_OUTOF_MEMORY;
6570 _DRV_HVD_EX_RET(u8DrvId, eRet);
6571 }
6572
6573 pDummyData = (MS_U8 *) u32VAddr;
6574
6575 memset((void *) pDummyData, 0, *pu32Size);
6576
6577 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
6578 {
6579 case HVD_INIT_HW_AVC:
6580 case HVD_INIT_HW_MVC:
6581 case HVD_INIT_HW_VP8:
6582 #if SUPPORT_EVD
6583 case HVD_INIT_HW_VP9:
6584 case HVD_INIT_HW_HEVC:
6585 #endif
6586 {
6587 pDummyData[0] = 0;
6588 pDummyData[1] = 0;
6589 pDummyData[2] = 1;
6590 pDummyData[3] = 0xFF;
6591 pDummyData[4] = 0xFF;
6592 pDummyData[5] = 0xFF;
6593 pDummyData[6] = 0xFF;
6594 pDummyData[7] = 0xFF;
6595
6596 break;
6597 }
6598 case HVD_INIT_HW_AVS:
6599 {
6600 pDummyData[0] = 0;
6601 pDummyData[1] = 0;
6602 pDummyData[2] = 1;
6603 pDummyData[3] = 0xB4;
6604 pDummyData[4] = 0xAA;
6605 pDummyData[5] = 0x66;
6606 pDummyData[6] = 0xAA;
6607 pDummyData[7] = 0x66;
6608
6609 break;
6610 }
6611 case HVD_INIT_HW_RM:
6612 default:
6613 *pu32Size = u32MinPatternSize;
6614 break;
6615 }
6616 }
6617
6618 eRet = E_HVD_EX_OK;
6619
6620 _DRV_HVD_EX_RET(u8DrvId, eRet);
6621 }
6622
6623 //-----------------------------------------------------------------------------
6624 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPatternInfo()
6625 /// @brief \b Function \b Description: Get driver specific data information
6626 /// @param -eType \b IN : the type of specific data information
6627 /// @return -the information of choosed type
6628 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPatternInfo(MS_U32 u32Id,HVD_EX_PatternInfo eType)6629 MS_U32 MDrv_HVD_EX_GetPatternInfo(MS_U32 u32Id, HVD_EX_PatternInfo eType)
6630 {
6631 MS_U32 eRet = 0;
6632 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6633
6634 HVD_EX_MSG_TRACE();
6635 _DRV_HVD_Inited(u8DrvId,FALSE);
6636
6637 switch (eType)
6638 {
6639 case E_HVD_EX_FLUSH_PATTERN_SIZE:
6640 {
6641 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
6642 {
6643 eRet = 0;
6644 }
6645 else if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
6646 {
6647 eRet = 8 + 144;
6648 }
6649 break;
6650 }
6651 case E_HVD_EX_DUMMY_HW_FIFO:
6652 {
6653 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
6654 {
6655 eRet = 0;
6656 }
6657 else if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
6658 {
6659 eRet = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_MAX_DUMMY_FIFO);
6660 }
6661 break;
6662 }
6663 default:
6664 break;
6665 }
6666
6667 return eRet;
6668 }
6669
6670
MDrv_HVD_EX_GetDSBufMiuSelect(MS_U32 u32Id)6671 MS_U8 MDrv_HVD_EX_GetDSBufMiuSelect(MS_U32 u32Id)
6672 {
6673 MS_U8 u8MiuSel;
6674 MS_U32 u32StartOffset;
6675 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6676
6677
6678 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
6679 {
6680 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf);
6681 }
6682 else
6683 {
6684 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr);
6685 }
6686 return u8MiuSel;
6687 }
6688
MDrv_HVD_EX_GetPVRSeamlessInfo(MS_U32 u32Id,HVD_EX_PVR_Seamless_Info * param)6689 MS_BOOL MDrv_HVD_EX_GetPVRSeamlessInfo(MS_U32 u32Id, HVD_EX_PVR_Seamless_Info* param)
6690 {
6691 param->u64PTS = (MS_U64) HAL_HVD_EX_GetData_EX(u32Id, E_HVD_GDATA_TS_SEAMLESS_TARGET_PTS);
6692 param->u32POC = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TS_SEAMLESS_TARGET_POC);
6693 param->u8FrameType = 0xFF; // not support now
6694
6695 return TRUE;
6696 }
6697
6698 //-----------------------------------------------------------------------------
6699 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDynamicScalingInfo()
6700 /// @brief \b Function \b Description: Get information of Dynamic Scaling
6701 /// @param -eType \b IN : the type of specific information
6702 /// @return -the information of choosed type
6703 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDynamicScalingInfo(MS_U32 u32Id,HVD_EX_DynamicScalingInfo eType)6704 MS_U32 MDrv_HVD_EX_GetDynamicScalingInfo(MS_U32 u32Id, HVD_EX_DynamicScalingInfo eType)
6705 {
6706 MS_U32 u32Ret = 0;
6707 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6708 MS_U8 u8MiuSel;
6709 MS_U32 u32StartOffset;
6710
6711 HVD_EX_MSG_TRACE();
6712 _DRV_HVD_Inited(u8DrvId,FALSE);
6713
6714 switch (eType)
6715 {
6716 case E_HVD_EX_DS_BUF_MIUSEL:
6717 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
6718 {
6719 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf >= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr)
6720 {
6721 u32Ret = TRUE;
6722 }
6723 else
6724 {
6725 u32Ret = FALSE;
6726 }
6727
6728 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf);
6729 /* comment the dead code
6730 if(u8MiuSel >= E_CHIP_MIU_2)
6731 {
6732 HVD_EX_MSG_ERR("u8MiuSel is %d !!, but return type is only Boolean. Please use MDrv_HVD_EX_GetDSBufMiuSelect() to get right miu select of DS buffer!\n",u8MiuSel);
6733 }
6734 */
6735 }
6736 else
6737 {
6738 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr >= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr)
6739 {
6740 u32Ret = TRUE;
6741 }
6742 else
6743 {
6744 u32Ret = FALSE;
6745 }
6746
6747 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr);
6748 /* comment the dead code, the u8MiuSel must be MIU_0 or MIU_1
6749 if(u8MiuSel >= E_CHIP_MIU_2)
6750 {
6751
6752 HVD_EX_MSG_ERR("u8MiuSel is %d !!, but return type is only Boolean. Please use MDrv_HVD_EX_GetDSBufMiuSelect() to get right miu select of DS buffer!\n",u8MiuSel);
6753 }
6754 */
6755 }
6756 break;
6757 case E_HVD_EX_DS_BUF_ADDR:
6758 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
6759 {
6760 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf;
6761 ///HVD_PRINT("[EDS] E_HVD_EX_DS_BUF_ADDR 0x%lx.\n",u32Ret);
6762 }
6763 else
6764 {
6765 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_BUF_ADDR);
6766
6767 ///HVD_PRINT("[DS] DS_BUF_ADDR 0x%lx \n", u32Ret);
6768 ///HVD_PRINT("[EDS] E_HVD_EX_DS_BUF_ADDR Old.\n");
6769 }
6770 break;
6771 case E_HVD_EX_DS_BUF_SIZE:
6772 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_BUF_SIZE);
6773 break;
6774 case E_HVD_EX_DS_VECTOR_DEPTH:
6775 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_VECTOR_DEPTH);
6776 break;
6777 case E_HVD_EX_DS_INFO_ADDR:
6778 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
6779 {
6780 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_BUF_SIZE);//0xC00;
6781 ///HVD_PRINT("[EDS] E_HVD_EX_DS_INFO_ADDR 0x%lx.\n",u32Ret);
6782 }
6783 else
6784 {
6785 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_INFO_ADDR);
6786
6787 ///HVD_PRINT("[DS] DS_INFO_ADDR 0x%lx \n", u32Ret);
6788 }
6789 break;
6790 case E_HVD_EX_DS_IS_ENABLED:
6791 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_IS_ENABLED);
6792 break;
6793 default:
6794 break;
6795 }
6796 return u32Ret;
6797 }
6798
6799 //-----------------------------------------------------------------------------
6800 /// @brief \b Function \b Name: MDrv_HVD_EX_GetData()
6801 /// @brief \b Function \b Description: Get target data from HVD driver
6802 /// @param -eType \b IN : the type of the target data
6803 /// @return -the value of the target data
6804 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetData(MS_U32 u32Id,HVD_EX_GDataType eType)6805 MS_VIRT MDrv_HVD_EX_GetData(MS_U32 u32Id, HVD_EX_GDataType eType)
6806 {
6807 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6808 MS_VIRT u32Ret = 0;
6809
6810 _DRV_HVD_Inited(u8DrvId,FALSE);
6811
6812 switch (eType)
6813 {
6814 case E_HVD_EX_GDATA_TYPE_DISP_CNT:
6815 {
6816 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_CNT);
6817 break;
6818 }
6819 case E_HVD_EX_GDATA_TYPE_SKIP_CNT:
6820 {
6821 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_SKIP_CNT);
6822 break;
6823 }
6824 case E_HVD_EX_GDATA_TYPE_DROP_CNT:
6825 {
6826 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DROP_CNT);
6827 break;
6828 }
6829 case E_HVD_EX_GDATA_TYPE_IDLE_CNT:
6830 {
6831 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT);
6832 break;
6833 }
6834 case E_HVD_EX_GDATA_TYPE_VSYNC_CNT:
6835 {
6836 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VSYNC_CNT);
6837 break;
6838 }
6839 case E_HVD_EX_GDATA_TYPE_MAIN_LOOP_CNT:
6840 {
6841 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MAIN_LOOP_CNT);
6842 break;
6843 }
6844 case E_HVD_EX_GDATA_TYPE_AVC_LEVEL_IDC:
6845 {
6846 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_AVC_LEVEL_IDC);
6847 break;
6848 }
6849 case E_HVD_EX_GDATA_TYPE_DISP_Q_SIZE:
6850 {
6851 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB);
6852 break;
6853 }
6854 case E_HVD_EX_GDATA_TYPE_ES_LEVEL:
6855 {
6856 u32Ret = (MS_U32) (HVD_EX_ESLevel) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_LEVEL);
6857 break;
6858 }
6859 case E_HVD_EX_GDATA_TYPE_AVC_VUI_DISP_INFO:
6860 {
6861 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_AVC_VUI_DISP_INFO);
6862 break;
6863 }
6864 case E_HVD_EX_GDATA_TYPE_DISP_STC:
6865 {
6866 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_STC);
6867 break;
6868 }
6869 case E_HVD_EX_GDATA_TYPE_USERDATA_IDX_TBL_SIZE:
6870 {
6871 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
6872 break;
6873 }
6874 case E_HVD_EX_GDATA_TYPE_USERDATA_PACKET_SIZE:
6875 {
6876 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_SIZE);
6877 break;
6878 }
6879 case E_HVD_EX_GDATA_TYPE_REAL_FRAMERATE:
6880 {
6881 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_REAL_FRAMERATE);
6882 break;
6883 }
6884 case E_HVD_EX_GDATA_TYPE_IS_ORI_INTERLACE_MODE:
6885 {
6886 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_ORI_INTERLACE_MODE);
6887 break;
6888 }
6889 case E_HVD_EX_GDATA_TYPE_FRAME_MBS_ONLY_FLAG:
6890 {
6891 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TYPE_FRAME_MBS_ONLY_FLAG);
6892 break;
6893 }
6894 case E_HVD_EX_GDATA_TYPE_IS_LEAST_DISPQ_SIZE:
6895 {
6896 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TYPE_IS_LEAST_DISPQ_SIZE);
6897 break;
6898 }
6899 case E_HVD_EX_GDATA_TYPE_FIELD_PIC_FLAG:
6900 {
6901 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FIELD_PIC_FLAG);
6902 break;
6903 }
6904 case E_HVD_EX_GDATA_TYPE_FW_CODEC_TYPE:
6905 {
6906 //u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_CODEC_TYPE);
6907 switch(HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_CODEC_TYPE))
6908 {
6909 case E_HVD_Codec_AVC:
6910 {
6911 u32Ret = E_HVD_EX_AVC;
6912 break;
6913 }
6914 case E_HVD_Codec_AVS:
6915 {
6916 u32Ret = E_HVD_EX_AVS;
6917 break;
6918 }
6919 case E_HVD_Codec_RM:
6920 {
6921 u32Ret = E_HVD_EX_RM;
6922 break;
6923 }
6924 case E_HVD_Codec_MVC:
6925 {
6926 u32Ret = E_HVD_EX_MVC;
6927 break;
6928 }
6929 case E_HVD_Codec_VP8:
6930 {
6931 u32Ret = E_HVD_EX_VP8;
6932 break;
6933 }
6934 case E_HVD_Codec_MJPEG:
6935 {
6936 u32Ret = E_HVD_EX_NONE;
6937 break;
6938 }
6939 case E_HVD_Codec_HEVC:
6940 {
6941 u32Ret = E_HVD_EX_HEVC;
6942 break;
6943 }
6944 case E_HVD_EX_VP9:
6945 {
6946 u32Ret = E_HVD_EX_VP9;
6947 break;
6948 }
6949 default:
6950 {
6951 u32Ret = E_HVD_EX_NONE;
6952 break;
6953 }
6954 }
6955 break;
6956 }
6957 case E_HVD_EX_GDATA_TYPE_FRC_MODE:
6958 {
6959 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRC_MODE);
6960 break;
6961 }
6962 case E_HVD_EX_GDATA_TYPE_FW_STATUS_FLAG:
6963 {
6964 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATUS_FLAG);
6965 break;
6966 }
6967 case E_HVD_EX_GDATA_TYPE_HVD_HW_MAX_PIXEL:
6968 {
6969 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_HVD_HW_MAX_PIXEL);
6970 break;
6971 }
6972 #ifdef VDEC3
6973 case E_HVD_EX_GDATA_TYPE_VBBU_ADDR:
6974 {
6975 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_VBBU_ADDR);
6976 break;
6977 }
6978 #endif
6979 case E_HVD_EX_GDATA_TYPE_VIDEO_FULL_RANGE_FLAG:
6980 {
6981 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VIDEO_FULL_RANGE_FLAG);
6982 break;
6983 }
6984 case E_HVD_EX_GDATA_TYPE_GET_NOT_SUPPORT_INFO:
6985 {
6986 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_GET_NOT_SUPPORT_INFO);
6987 break;
6988 }
6989 case E_HVD_EX_GDATA_TYPE_GET_MIN_TSP_DATA_SIZE :
6990 {
6991 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_GET_MIN_TSP_DATA_SIZE);
6992 break;
6993 }
6994 default:
6995 break;
6996 }
6997
6998 return u32Ret;
6999 }
7000
7001 //-----------------------------------------------------------------------------
7002 /// @brief \b Function \b Name: MDrv_HVD_EX_GetMem_Dbg()
7003 /// @brief \b Function \b Description: Get any data from any memory address
7004 /// @param -u32Addr \b IN : the memory address of the target data
7005 /// @return -the value of the memory
7006 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetMem_Dbg(MS_U32 u32Id,MS_VIRT u32Addr)7007 MS_U32 MDrv_HVD_EX_GetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr)
7008 {
7009 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7010 MS_U32 u32Ret = 0;
7011
7012 HVD_EX_MSG_TRACE();
7013 _DRV_HVD_Inited(u8DrvId,u32Ret);
7014
7015 switch (u32Addr)
7016 {
7017 case 1:
7018 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR);
7019 break;
7020 case 2:
7021 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_PC_CNT);
7022 break;
7023 case 3:
7024 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR);
7025 break;
7026 default:
7027 break;
7028 }
7029
7030 return u32Ret;
7031 }
7032
7033 //-----------------------------------------------------------------------------
7034 /// @brief \b Function \b Name: MDrv_HVD_EX_DbgDumpStatus()
7035 /// @brief \b Function \b Description: Dump specific information to standard output.
7036 /// @param -eFlag \b IN : the type of information.
7037 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DbgDumpStatus(MS_U32 u32Id,HVD_EX_DumpStatus eFlag)7038 void MDrv_HVD_EX_DbgDumpStatus(MS_U32 u32Id, HVD_EX_DumpStatus eFlag)
7039 {
7040 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7041
7042 if (!(pHVDDrvContext->bHVDIsInited[u8DrvId]))
7043 {
7044 return;
7045 }
7046
7047 if (eFlag & E_HVD_EX_DUMP_STATUS_FW)
7048 {
7049 HAL_HVD_EX_Dump_FW_Status(u32Id);
7050 }
7051
7052 if (eFlag & E_HVD_EX_DUMP_STATUS_HW)
7053 {
7054 HAL_HVD_EX_Dump_HW_Status(HVD_U32_MAX);
7055 }
7056 }
7057
7058 //-----------------------------------------------------------------------------
7059 /// @brief \b Function \b Name: MDrv_HVD_EX_SetMem_Dbg()
7060 /// @brief \b Function \b Description: set any data into any memory address
7061 /// @param -u32Addr \b IN : the memory address of the target destination
7062 /// @param -u32Arg \b IN : the value of input content
7063 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetMem_Dbg(MS_U32 u32Id,MS_VIRT u32Addr,MS_U32 u32Arg)7064 void MDrv_HVD_EX_SetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr, MS_U32 u32Arg)
7065 {
7066 HVD_EX_MSG_TRACE();
7067 HAL_HVD_EX_SetData_Dbg(u32Addr, u32Arg);
7068 }
7069
7070 //-----------------------------------------------------------------------------
7071 /// @brief \b Function \b Name: MDrv_HVD_SetData_Dbg()
7072 /// @brief \b Function \b Description: set any FW debug command
7073 /// @param -u32Cmd \b IN : specify the FW command ID.
7074 /// @param -u32Arg \b IN : specify the argument of FW command.
7075 /// @return -the result of debug command
7076 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetCmd_Dbg(MS_U32 u32Id,MS_U32 u32Cmd,MS_U32 u32Arg)7077 HVD_EX_Result MDrv_HVD_EX_SetCmd_Dbg(MS_U32 u32Id, MS_U32 u32Cmd, MS_U32 u32Arg)
7078 {
7079 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7080 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7081
7082 HVD_EX_MSG_TRACE();
7083 _DRV_HVD_Inited(u8DrvId,eRet);
7084 _DRV_HVD_EX_Entry(u8DrvId);
7085
7086 // todo: consider more...
7087 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, (HVD_User_Cmd) u32Cmd, u32Arg);
7088
7089 _DRV_HVD_EX_RET(u8DrvId, eRet);
7090 }
7091
7092 //-----------------------------------------------------------------------------
7093 /// @brief \b Function \b Name: MDrv_HVD_EX_Set_Err_Tolerance()
7094 /// @brief \b Function \b Description: set display error tolerance
7095 /// @param -u32Arg \b IN : //[15:8]+[7:0] = (err_tolerance(0%~100%)+enable or disable)
7096 /// @return -the result of set err tolerance
7097 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Set_Err_Tolerance(MS_U32 u32Id,MS_U32 u32Arg)7098 HVD_EX_Result MDrv_HVD_EX_Set_Err_Tolerance(MS_U32 u32Id, MS_U32 u32Arg)
7099 {
7100 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7101 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7102 HVD_EX_MSG_TRACE();
7103 _DRV_HVD_Inited(u8DrvId,eRet);
7104 _DRV_HVD_EX_Entry(u8DrvId);
7105
7106 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_DISP_ERROR_TOLERANCE, u32Arg);
7107
7108 _DRV_HVD_EX_RET(u8DrvId, eRet);
7109
7110 }
7111
7112 //-----------------------------------------------------------------------------
7113 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDVInfo()
7114 /// @brief \b Function \b Description: set DV profile and level
7115 /// @param -u32Arg \b IN : //[15:8]+[7:0] = (profile+level)
7116 /// @return -the result of set DV profile and level
7117 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDVInfo(MS_U32 u32Id,MS_U32 u32Arg)7118 HVD_EX_Result MDrv_HVD_EX_SetDVInfo(MS_U32 u32Id, MS_U32 u32Arg)
7119 {
7120 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7121 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7122 HVD_EX_MSG_TRACE();
7123 _DRV_HVD_Inited(u8DrvId,eRet);
7124 _DRV_HVD_EX_Entry(u8DrvId);
7125
7126 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DV_INFO, u32Arg);
7127
7128 eRet = E_HVD_EX_OK;
7129
7130 _DRV_HVD_EX_RET(u8DrvId, eRet);
7131 }
7132
7133 //-----------------------------------------------------------------------------
7134 /// @brief \b Function \b Name: MDrv_HVD_EX_Set_Slow_Sync()
7135 /// @brief \b Function \b Description: set slow sync
7136 /// @param -u32Arg \b IN : //[15:8]+[7:0] = (repeat period + drop period)
7137 /// @return -the result of set err tolerance
7138 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Set_Slow_Sync(MS_U32 u32Id,MS_U32 u32Arg)7139 HVD_EX_Result MDrv_HVD_EX_Set_Slow_Sync(MS_U32 u32Id, MS_U32 u32Arg)
7140 {
7141 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7142 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7143 HVD_EX_MSG_TRACE();
7144 _DRV_HVD_Inited(u8DrvId,eRet);
7145 _DRV_HVD_EX_Entry(u8DrvId);
7146
7147 eRet = _HVD_MapRetEx( HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_SLOW_SYNC, u32Arg));
7148
7149 _DRV_HVD_EX_RET(u8DrvId, eRet);
7150
7151 }
7152
7153 //-----------------------------------------------------------------------------
7154 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSettings_Pro()
7155 /// @brief \b Function \b Description: set any FW debug command
7156 /// @param -eType \b IN : specify the type of setting.
7157 /// @param -u32Arg \b IN : specify the argument of the setting.
7158 /// @return -the result of set professional settings.
7159 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSettings_Pro(MS_U32 u32Id,HVD_EX_SSettingsType eType,MS_U32 u32Arg)7160 HVD_EX_Result MDrv_HVD_EX_SetSettings_Pro(MS_U32 u32Id, HVD_EX_SSettingsType eType, MS_U32 u32Arg)
7161 {
7162 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7163 HVD_User_Cmd eCmd = E_HVD_CMD_INVALID_CMD;
7164 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7165
7166 HVD_EX_MSG_TRACE();
7167 _DRV_HVD_Inited(u8DrvId,eRet);
7168 _DRV_HVD_EX_Entry(u8DrvId);
7169
7170 switch (eType)
7171 {
7172 case E_HVD_EX_SSET_TIME_UNIT:
7173 eCmd = E_HVD_CMD_TIME_UNIT_TYPE;
7174 break;
7175 case E_HVD_EX_SSET_PITCH:
7176 eCmd = E_HVD_CMD_PITCH;
7177 break;
7178 case E_HVD_EX_SSET_SYNC_EACH_FRM:
7179 eCmd = E_HVD_CMD_SYNC_EACH_FRM;
7180 break;
7181 case E_HVD_EX_SSET_MAX_DEC_TICK:
7182 eCmd = E_HVD_CMD_MAX_DEC_TICK;
7183 break;
7184 case E_HVD_EX_SSET_AUTO_FREE_ES:
7185 eCmd = E_HVD_CMD_AUTO_FREE_ES;
7186 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bAutoFreeES = u32Arg;
7187 break;
7188 case E_HVD_EX_SSET_MIN_FRAME_GAP:
7189 eCmd = E_HVD_CMD_MIN_FRAME_GAP;
7190 break;
7191 case E_HVD_EX_SSET_DISABLE_DEBLOCKING:
7192 eCmd = E_HVD_CMD_DIS_DBF;
7193 if (u32Arg > 2)
7194 {
7195 u32Arg = 1;
7196 }
7197 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bDisDeblocking = u32Arg;
7198 break;
7199 case E_HVD_EX_SSET_DISABLE_QUARTER_PIXEL:
7200 eCmd = E_HVD_CMD_DIS_QUART_PIXEL;
7201 if (u32Arg > 2)
7202 {
7203 u32Arg = 1;
7204 }
7205 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bDisQuarterPixel = u32Arg;
7206 break;
7207 case E_HVD_EX_SSET_MIU_BURST_CNT_LEVEL:
7208 {
7209 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32MiuBurstLevel = u32Arg;
7210 eCmd = E_HVD_CMD_MIU_BURST_CNT;
7211
7212 break;
7213 }
7214 default:
7215 break;
7216 }
7217
7218 if (eCmd != E_HVD_CMD_INVALID_CMD)
7219 {
7220 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, eCmd, u32Arg);
7221 }
7222 else
7223 {
7224 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
7225 }
7226
7227 _DRV_HVD_EX_RET(u8DrvId, eRet);
7228 }
7229
7230 //-----------------------------------------------------------------------------
7231 /// @brief \b Function \b Name: MDrv_HVD_EX_GetCaps()
7232 /// @brief \b Function \b Description: check if HW support this format
7233 /// @param -u32Type \b IN : specify the format type
7234 /// @return - TRUE/ FALSE
7235 /// @retval -FALSE(0): not supported by HW
7236 /// @retval -TRUE(1): supported by HW
7237 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetCaps(HVD_EX_Codec u32Type)7238 MS_BOOL MDrv_HVD_EX_GetCaps(HVD_EX_Codec u32Type)
7239 {
7240 if(E_HVD_EX_HEVC == u32Type)
7241 #if SUPPORT_EVD
7242 return TRUE;
7243 #else
7244 return FALSE;
7245 #endif
7246 #if SUPPORT_G2VP9 && defined(VDEC3)
7247 if(E_HVD_EX_VP9 == u32Type)
7248 return TRUE;
7249 #endif
7250
7251 #if SUPPORT_MSVP9 && defined(VDEC3)
7252 if(E_HVD_EX_VP9 == u32Type)
7253 return TRUE;
7254 #endif
7255
7256 #if ( HVD_HW_VERSION == HVD_HW_HVD)
7257 MS_U32 verID = HAL_HVD_EX_GetHWVersionID();
7258 verID = verID >> 12;
7259 switch (u32Type)
7260 {
7261 case E_HVD_EX_AVC:
7262 case E_HVD_EX_AVS:
7263 case E_HVD_EX_RM:
7264 case E_HVD_EX_MVC:
7265 if ((verID & BIT(u32Type)) == 0)
7266 {
7267 return FALSE;
7268 }
7269 break;
7270 case E_HVD_EX_VP8:
7271 return TRUE;
7272 default:
7273 return FALSE;
7274 }
7275 #else
7276 if (u32Type != E_HVD_EX_AVC)
7277 {
7278 return FALSE;
7279 }
7280 #endif
7281 return TRUE;
7282 }
7283
MDrv_HVD_LinkWeakSymbolPatch(void)7284 MS_BOOL MDrv_HVD_LinkWeakSymbolPatch(void)
7285 {
7286 return TRUE;
7287 }
7288
7289 //-----------------------------------------------------------------------------
7290 /// @brief \b Function \b Name: MDrv_HVD_EX_SetAutoRmLstZeroByte
7291 /// @brief \b Function \b Description: Turn on/off auto remove last zero byte
7292 /// @param -bOn \b IN : Turn on/off auto remove last zero byte
7293 /// @return -the result of turn on/off auto remove last zero byte
7294 ///\b NOTE: The default mode after initialization is On.
7295 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetAutoRmLstZeroByte(MS_U32 u32Id,MS_BOOL bOn)7296 HVD_EX_Result MDrv_HVD_EX_SetAutoRmLstZeroByte(MS_U32 u32Id, MS_BOOL bOn)
7297 {
7298 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7299 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7300
7301 HVD_EX_MSG_TRACE();
7302 _DRV_HVD_Inited(u8DrvId,eRet);
7303
7304 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bAutoRmLastZeroByte = bOn;
7305
7306 return E_HVD_EX_OK;
7307 }
7308
7309 //-----------------------------------------------------------------------------
7310 /// @brief \b Function \b Name: MDrv_HVD_EX_IsAlive
7311 /// @brief \b Function \b Description:Check Whether HVD is alive or not(check cnt)
7312 /// @return -the result of HVD alive status(E_HVD_EX_OK/E_HVD_EX_RET_NOT_RUNNING)
7313 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsAlive(MS_U32 u32Id)7314 HVD_EX_Result MDrv_HVD_EX_IsAlive(MS_U32 u32Id)
7315 {
7316 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7317
7318 HVD_EX_MSG_TRACE();
7319 _DRV_HVD_Inited(u8DrvId,E_HVD_EX_FAIL);
7320
7321 if (HAL_HVD_EX_IsAlive(u32Id))
7322 {
7323 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32DecCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT);
7324 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32SkipCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_SKIP_CNT);
7325 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32IdleCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT);
7326 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32MainLoopCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MAIN_LOOP_CNT);
7327
7328 return E_HVD_EX_OK;
7329 }
7330 else
7331 {
7332 return E_HVD_EX_RET_NOT_RUNNING;
7333 }
7334 }
7335
7336 //-----------------------------------------------------------------------------
7337 /// @brief \b Function \b Name: MDrv_HVD_EX_SetBalanceBW
7338 /// @brief \b Function \b Description: bandwidth adjustment
7339 /// @param -qp_cnt \b IN : QP threshold for overtime counter
7340 /// @param -db_cnt \b IN : Deblocking threshod for overtime counter
7341 /// @param -upper \b IN : upper bound for overtime counter
7342 /// @return -the result of command E_HVD_CMD_BALANCE_BW
7343 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetBalanceBW(MS_U32 u32Id,MS_U8 u8QPCnt,MS_U8 u8DBCnt,MS_U8 u8Upper)7344 HVD_EX_Result MDrv_HVD_EX_SetBalanceBW(MS_U32 u32Id, MS_U8 u8QPCnt, MS_U8 u8DBCnt, MS_U8 u8Upper)
7345 {
7346 HVD_EX_Result eRet = E_HVD_EX_FAIL;
7347 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7348
7349 HVD_EX_MSG_TRACE();
7350 _DRV_HVD_Inited(u8DrvId,eRet);
7351 _DRV_HVD_EX_Entry(u8DrvId);
7352
7353 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_BALANCE_BW, u8QPCnt | (u8DBCnt << 8) | (u8Upper << 16));
7354
7355 _DRV_HVD_EX_RET(u8DrvId, eRet);
7356 }
7357
7358 //-----------------------------------------------------------------------------
7359 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFdMaskDelayCnt()
7360 /// @brief \b Function \b Description: Set fd mask muting count
7361 /// @param -u8DelayCnt \b IN : 0~0xFF, Fdmask delay count, arg >= 0xFF -> use default
7362 /// @return -The result of command setting fd_mask muting count
7363 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFdMaskDelayCnt(MS_U32 u32Id,MS_U8 u8DelayCnt)7364 HVD_EX_Result MDrv_HVD_EX_SetFdMaskDelayCnt(MS_U32 u32Id, MS_U8 u8DelayCnt)
7365 {
7366 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7367 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7368
7369 HVD_EX_MSG_TRACE();
7370 _DRV_HVD_Inited(u8DrvId,eRet);
7371 _DRV_HVD_EX_Entry(u8DrvId);
7372
7373 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FDMASK_DELAY_CNT, u8DelayCnt);
7374
7375 _DRV_HVD_EX_RET(u8DrvId, eRet);
7376 }
7377
7378 //-----------------------------------------------------------------------------
7379 /// @brief \b Function \b Name: MDrv_HVD_EX_SetOutputFRCMode()
7380 /// @brief \b Function \b Description: Set output frame rate convert mode.
7381 /// @param -u8FrameRate \b IN : output vsync count.
7382 /// @param -u8Interlace \b IN : output scan type: 0:progress, 1:interlace field, 2: interlace frame.
7383 /// @return -The result of command setting output FRC mode
7384 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetOutputFRCMode(MS_U32 u32Id,MS_U8 u8FrameRate,MS_U8 u8Interlace)7385 HVD_EX_Result MDrv_HVD_EX_SetOutputFRCMode(MS_U32 u32Id, MS_U8 u8FrameRate, MS_U8 u8Interlace)
7386 {
7387 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7388 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7389
7390 HVD_EX_MSG_TRACE();
7391 _DRV_HVD_Inited(u8DrvId,eRet);
7392 _DRV_HVD_EX_Entry(u8DrvId);
7393
7394 if ((u8Interlace != 0) && (u8Interlace != 1) && (u8Interlace != 2))
7395 {
7396 _DRV_HVD_EX_RET(u8DrvId, eRet);
7397 }
7398
7399 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_OUTPUT_FRAMERATE, u8FrameRate);
7400
7401 if (eRet != E_HVD_EX_OK)
7402 {
7403 _DRV_HVD_EX_RET(u8DrvId, eRet);
7404 }
7405
7406 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_OUTPUT_INTERLACE, u8Interlace);
7407
7408 _DRV_HVD_EX_RET(u8DrvId, eRet);
7409 }
7410
MDrv_HVD_EX_DispFrame(MS_U32 u32Id,MS_U32 u32FrmIdx)7411 HVD_EX_Result MDrv_HVD_EX_DispFrame(MS_U32 u32Id, MS_U32 u32FrmIdx)
7412 {
7413 HVD_EX_MSG_TRACE();
7414
7415 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISPQ_STATUS_DISP, u32FrmIdx);
7416
7417 return E_HVD_EX_OK;
7418 }
7419
MDrv_HVD_EX_FreeFrame(MS_U32 u32Id,MS_U32 u32FrmIdx)7420 HVD_EX_Result MDrv_HVD_EX_FreeFrame(MS_U32 u32Id, MS_U32 u32FrmIdx)
7421 {
7422 HVD_EX_MSG_TRACE();
7423
7424 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISPQ_STATUS_FREE, u32FrmIdx);
7425
7426 return E_HVD_EX_OK;
7427 }
7428
MDrv_HVD_EX_EnableDispQue(MS_U32 u32Id,MS_BOOL bEnable)7429 HVD_EX_Result MDrv_HVD_EX_EnableDispQue(MS_U32 u32Id, MS_BOOL bEnable)
7430 {
7431 HVD_EX_MSG_TRACE();
7432
7433 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_DISP_QUEUE, bEnable);
7434
7435 return E_HVD_EX_OK;
7436 }
7437
MDrv_HVD_EX_EnableVSizeAlign(MS_U32 u32Id,MS_BOOL bEnable)7438 HVD_EX_Result MDrv_HVD_EX_EnableVSizeAlign(MS_U32 u32Id, MS_BOOL bEnable)
7439 {
7440 HVD_EX_MSG_TRACE();
7441
7442 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_ALIGN_VSIZE, bEnable);
7443
7444 return E_HVD_EX_OK;
7445 }
7446
MDrv_HVD_EX_ShowDecodeOrder(MS_U32 u32Id,MS_BOOL bEnable)7447 HVD_EX_Result MDrv_HVD_EX_ShowDecodeOrder(MS_U32 u32Id, MS_BOOL bEnable)
7448 {
7449 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7450 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7451
7452 HVD_EX_MSG_TRACE();
7453 _DRV_HVD_Inited(u8DrvId,eRet);
7454 _DRV_HVD_EX_Entry(u8DrvId);
7455
7456 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SHOW_DECODE_ORDER, bEnable);
7457
7458 _DRV_HVD_EX_RET(u8DrvId, eRet);
7459 }
7460
7461 //-----------------------------------------------------------------------------
7462 /// @brief \b Function \b Name: MDrv_HVD_EX_Disp_Ignore_Crop()
7463 /// @brief \b Function \b Description: ingore corp info
7464 /// @param -bEnable \b IN : turn on / off.
7465 /// @return -The result of command setting fd_mask muting count
7466 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Disp_Ignore_Crop(MS_U32 u32Id,MS_BOOL bEnable)7467 HVD_EX_Result MDrv_HVD_EX_Disp_Ignore_Crop(MS_U32 u32Id, MS_BOOL bEnable)
7468 {
7469 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7470 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7471
7472 HVD_EX_MSG_TRACE();
7473 _DRV_HVD_Inited(u8DrvId,eRet);
7474 _DRV_HVD_EX_Entry(u8DrvId);
7475
7476 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_IGNORE_CROP, bEnable);
7477
7478 _DRV_HVD_EX_RET(u8DrvId, eRet);
7479 }
7480
MDrv_HVD_EX_SuspendDynamicScale(MS_U32 u32Id,MS_BOOL bEnable)7481 HVD_EX_Result MDrv_HVD_EX_SuspendDynamicScale(MS_U32 u32Id, MS_BOOL bEnable)
7482 {
7483 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7484 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7485 HVD_EX_MSG_TRACE();
7486 _DRV_HVD_Inited(u8DrvId,eRet);
7487 _DRV_HVD_EX_Entry(u8DrvId);
7488
7489 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SUSPEND_DYNAMIC_SCALE, bEnable);
7490
7491 _DRV_HVD_EX_RET(u8DrvId, eRet);
7492 }
7493
MDrv_HVD_EX_RmEnablePtsTbl(MS_U32 u32Id,MS_BOOL bEnable)7494 HVD_EX_Result MDrv_HVD_EX_RmEnablePtsTbl(MS_U32 u32Id, MS_BOOL bEnable)
7495 {
7496 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7497 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7498 HVD_EX_MSG_TRACE();
7499 _DRV_HVD_Inited(u8DrvId,eRet);
7500 _DRV_HVD_EX_Entry(u8DrvId);
7501
7502 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RM_ENABLE_PTS_TBL, bEnable);
7503
7504 _DRV_HVD_EX_RET(u8DrvId, eRet);
7505 }
7506
7507
MDrv_HVD_EX_AutoExhaustESMode(MS_U32 u32Id,MS_U32 u32ESbound)7508 HVD_EX_Result MDrv_HVD_EX_AutoExhaustESMode(MS_U32 u32Id, MS_U32 u32ESbound)
7509 {
7510 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7511 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7512 HVD_EX_MSG_TRACE();
7513 _DRV_HVD_Inited(u8DrvId,eRet);
7514 _DRV_HVD_EX_Entry(u8DrvId);
7515
7516 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AUTO_EXHAUST_ES_MODE, u32ESbound);
7517
7518 _DRV_HVD_EX_RET(u8DrvId, eRet);
7519 }
7520
7521
MDrv_HVD_EX_SetMinTspSize(MS_U32 u32Id,MS_U32 u32Size)7522 HVD_EX_Result MDrv_HVD_EX_SetMinTspSize(MS_U32 u32Id, MS_U32 u32Size)
7523 {
7524 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7525 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7526 HVD_EX_MSG_TRACE();
7527 _DRV_HVD_Inited(u8DrvId,eRet);
7528 _DRV_HVD_EX_Entry(u8DrvId);
7529
7530 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_MIN_TSP_DATA_SIZE, u32Size);
7531
7532 _DRV_HVD_EX_RET(u8DrvId, eRet);
7533 }
7534
7535 //------------------------------------------------------------------------------
7536 /// Set HVD FRC drop type.
7537 /// @param u8DropType \b IN : drop type. 0:drop frame, 1:drop field. default:0
7538 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
7539 //------------------------------------------------------------------------------
MDrv_HVD_EX_SetFRCDropType(MS_U32 u32Id,MS_U8 u8DropType)7540 HVD_EX_Result MDrv_HVD_EX_SetFRCDropType(MS_U32 u32Id, MS_U8 u8DropType)
7541 {
7542 HVD_EX_Result eRet = E_HVD_EX_FAIL;
7543 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7544
7545 HVD_EX_MSG_TRACE();
7546 _DRV_HVD_Inited(u8DrvId,eRet);
7547 _DRV_HVD_EX_Entry(u8DrvId);
7548
7549 if (u8DropType != 0 && u8DropType != 1)
7550 {
7551 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
7552 _DRV_HVD_EX_RET(u8DrvId, eRet);
7553 }
7554
7555 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_DROP_MODE, u8DropType);
7556
7557 _DRV_HVD_EX_RET(u8DrvId, eRet);
7558 }
7559
7560 //-----------------------------------------------------------------------------
7561 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDrvFwVer()
7562 /// @brief \b Function \b Description: Get driver's FW version
7563 /// @return - Driver's FW version
7564 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDrvFwVer(void)7565 MS_U32 MDrv_HVD_EX_GetDrvFwVer(void)
7566 {
7567 return HVD_FW_VERSION;
7568 }
7569
7570 //-----------------------------------------------------------------------------
7571 /// @brief \b Function \b Name: MDrv_HVD_EX_GetFwVer()
7572 /// @brief \b Function \b Description: Get driver's FW version
7573 /// @return - FW version obtained by querying FW
7574 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFwVer(MS_U32 u32Id)7575 MS_U32 MDrv_HVD_EX_GetFwVer(MS_U32 u32Id)
7576 {
7577 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_VERSION_ID);
7578 }
7579
MDrv_HVD_SetSingleDecodeMode(MS_BOOL bEnable)7580 MS_BOOL MDrv_HVD_SetSingleDecodeMode(MS_BOOL bEnable)
7581 {
7582 return HAL_VPU_EX_SetSingleDecodeMode(bEnable);
7583 }
7584
MDrv_HVD_SetSTCMode(MS_U32 u32Id,MS_U32 STCindex)7585 MS_BOOL MDrv_HVD_SetSTCMode(MS_U32 u32Id, MS_U32 STCindex)
7586 {
7587 return HAL_VPU_EX_SetSTCMode(u32Id,STCindex);
7588 }
7589
MDrv_HVD_SetDecodeMode(MS_U32 u32Id,HVD_EX_DecModCfg * pstCfg)7590 MS_BOOL MDrv_HVD_SetDecodeMode(MS_U32 u32Id, HVD_EX_DecModCfg *pstCfg)
7591 {
7592 MS_U8 i;
7593 VPU_EX_DecModCfg stVpuDecModCfg;
7594
7595 stVpuDecModCfg.u8DecMod = pstCfg->u8DecMod;
7596 stVpuDecModCfg.u8CodecCnt = pstCfg->u8CodecCnt;
7597 for (i=0; ((i<pstCfg->u8CodecCnt)&&(i<HVD_MAX_DEC_NUM)); i++)
7598 {
7599 stVpuDecModCfg.u8CodecType[i] = pstCfg->u8CodecType[i];
7600 }
7601 stVpuDecModCfg.u8ArgSize = pstCfg->u8ArgSize;
7602 stVpuDecModCfg.u32Arg = pstCfg->u32Arg;
7603
7604 return HAL_VPU_EX_SetDecodeMode(u32Id, &stVpuDecModCfg);
7605 }
7606
MDrv_HVD_EX_SetBurstMode(MS_U32 u32Id,MS_BOOL bBurst)7607 void MDrv_HVD_EX_SetBurstMode(MS_U32 u32Id, MS_BOOL bBurst)
7608 {
7609 HVD_Return eCtrlRet = E_HVD_RETURN_FAIL;
7610
7611 eCtrlRet = HAL_HVD_EX_SetCmd(u32Id, E_DUAL_BURST_MODE, bBurst);
7612 if (E_HVD_RETURN_SUCCESS != eCtrlRet)
7613 {
7614 HVD_EX_MSG_ERR("E_DUAL_BURST_MODE NG eCtrlRet=%x\n", eCtrlRet);
7615 }
7616 else
7617 {
7618 HVD_EX_MSG_DBG("MJPEG!!! Set burst mode =%d success!!!!\n", bBurst);
7619 }
7620 }
7621
7622 //------------------------------------------------------------------------------
7623 /// Force into interlace mode
7624 /// @param u8Mode \b IN : 0: Disable, 1: Enable
7625 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
7626 //------------------------------------------------------------------------------
MDrv_HVD_EX_ForceInterlaceMode(MS_U32 u32Id,MS_U8 u8Mode)7627 HVD_EX_Result MDrv_HVD_EX_ForceInterlaceMode(MS_U32 u32Id, MS_U8 u8Mode)
7628 {
7629 HVD_EX_Result eRet = E_HVD_EX_FAIL;
7630 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7631
7632 HVD_EX_MSG_TRACE();
7633 _DRV_HVD_Inited(u8DrvId,eRet);
7634 _DRV_HVD_EX_Entry(u8DrvId);
7635
7636 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_INTERLACE, u8Mode);
7637
7638 _DRV_HVD_EX_RET(u8DrvId, eRet);
7639 }
7640
7641 //------------------------------------------------------------------------------
7642 /// Push Disp Q with Ref num
7643 /// @param u8Mode \b IN : 0: Disable, 1: Enable
7644 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
7645 //------------------------------------------------------------------------------
MDrv_HVD_EX_PushDispQWithRefNum(MS_U32 u32Id,MS_U8 u8Mode)7646 HVD_EX_Result MDrv_HVD_EX_PushDispQWithRefNum(MS_U32 u32Id, MS_U8 u8Mode)
7647 {
7648 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7649 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7650
7651 HVD_EX_MSG_TRACE();
7652 _DRV_HVD_Inited(u8DrvId,eRet);
7653 _DRV_HVD_EX_Entry(u8DrvId);
7654
7655 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PUSH_DISPQ_WITH_REF_NUM, u8Mode);
7656
7657 _DRV_HVD_EX_RET(u8DrvId, eRet);
7658 }
7659
7660 //------------------------------------------------------------------------------
7661 /// Ignore HW error - PIC_OVERRUN
7662 /// @param bEnable \b IN : 0: Disable, 1: Enable
7663 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
7664 //------------------------------------------------------------------------------
MDrv_HVD_EX_IgnorePicOverrun(MS_U32 u32Id,MS_BOOL bEnable)7665 HVD_EX_Result MDrv_HVD_EX_IgnorePicOverrun(MS_U32 u32Id, MS_BOOL bEnable)
7666 {
7667 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7668 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7669
7670 HVD_EX_MSG_TRACE();
7671 _DRV_HVD_Inited(u8DrvId,eRet);
7672 _DRV_HVD_EX_Entry(u8DrvId);
7673
7674 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_PIC_OVERRUN, bEnable);
7675
7676 _DRV_HVD_EX_RET(u8DrvId, eRet);
7677 }
7678
7679 //------------------------------------------------------------------------------
7680 /// Control speed in displaying time only.
7681 /// @param bEnable \b IN : 0: Original, control in decoding and displaying time, 1: Enable,control speed in displaying time only
7682 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
7683 //------------------------------------------------------------------------------
MDrv_HVD_EX_CtlSpeedInDispOnly(MS_U32 u32Id,MS_BOOL bEnable)7684 HVD_EX_Result MDrv_HVD_EX_CtlSpeedInDispOnly(MS_U32 u32Id, MS_BOOL bEnable)
7685 {
7686 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7687 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7688
7689 HVD_EX_MSG_TRACE();
7690 _DRV_HVD_Inited(u8DrvId,eRet);
7691 _DRV_HVD_EX_Entry(u8DrvId);
7692
7693 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, bEnable);
7694
7695 _DRV_HVD_EX_RET(u8DrvId, eRet);
7696 }
7697
7698 //------------------------------------------------------------------------------
7699 /// AVC support reference number over max DPB size when frame buffer is enough.
7700 /// @param bEnable \b IN : 0: Disable, 1: Enable
7701 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
7702 //------------------------------------------------------------------------------
MDrv_HVD_EX_AVCSupportRefNumOverMaxDBPSize(MS_U32 u32Id,MS_BOOL bEnable)7703 HVD_EX_Result MDrv_HVD_EX_AVCSupportRefNumOverMaxDBPSize(MS_U32 u32Id, MS_BOOL bEnable)
7704 {
7705 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7706 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7707
7708 HVD_EX_MSG_TRACE();
7709 _DRV_HVD_Inited(u8DrvId,eRet);
7710 _DRV_HVD_EX_Entry(u8DrvId);
7711
7712 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_SUPPORT_REF_NUM_OVER_MAX_DPB_SIZE, bEnable);
7713
7714 _DRV_HVD_EX_RET(u8DrvId, eRet);
7715 }
7716
MDrv_HVD_EX_ReturnInvalidAFD(MS_U32 u32Id,MS_BOOL bEnable)7717 HVD_EX_Result MDrv_HVD_EX_ReturnInvalidAFD(MS_U32 u32Id, MS_BOOL bEnable)
7718 {
7719 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7720 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7721
7722 HVD_EX_MSG_TRACE();
7723 _DRV_HVD_Inited(u8DrvId,eRet);
7724 _DRV_HVD_EX_Entry(u8DrvId);
7725
7726 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RETURN_INVALID_AFD, bEnable);
7727
7728 _DRV_HVD_EX_RET(u8DrvId, eRet);
7729 }
7730
7731
MDrv_HVD_EX_AVCForceBrokenByUs(MS_U32 u32Id,MS_BOOL bEnable)7732 HVD_EX_Result MDrv_HVD_EX_AVCForceBrokenByUs(MS_U32 u32Id, MS_BOOL bEnable)
7733 {
7734 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7735 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7736
7737 HVD_EX_MSG_TRACE();
7738 _DRV_HVD_Inited(u8DrvId,eRet);
7739 _DRV_HVD_EX_Entry(u8DrvId);
7740
7741 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_FORCE_BROKEN_BY_US, bEnable);
7742
7743 _DRV_HVD_EX_RET(u8DrvId, eRet);
7744 }
7745
7746 //-----------------------------------------------------------------------------
7747 /// @brief \b Function \b Name: MDrv_HVD_EX_Support_AVC2MVC()
7748 /// @brief \b Function \b Description: Set Support AVC to MVC
7749 /// @param -bEnable \b IN : turn on / off.
7750 /// @return -The result of command setting fd_mask muting count
7751 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Support_AVC2MVC(MS_U32 u32Id,MS_BOOL bEnable)7752 HVD_EX_Result MDrv_HVD_EX_Support_AVC2MVC(MS_U32 u32Id, MS_BOOL bEnable)
7753 {
7754 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7755 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7756
7757 HVD_EX_MSG_TRACE();
7758 _DRV_HVD_Inited(u8DrvId,eRet);
7759 _DRV_HVD_EX_Entry(u8DrvId);
7760
7761 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SUPPORT_AVC_TO_MVC, bEnable);
7762
7763 _DRV_HVD_EX_RET(u8DrvId, eRet);
7764 }
7765
7766 //-----------------------------------------------------------------------------
7767 /// @brief \b Function \b Name: MDrv_HVD_EX_3DLR_View_Exchange()
7768 /// @brief \b Function \b Description: view exchange
7769 /// @param -bEnable \b IN : turn on / off.
7770 /// @return -The result of command setting fd_mask muting count
7771 //-----------------------------------------------------------------------------
MDrv_HVD_EX_3DLR_View_Exchange(MS_U32 u32Id,MS_BOOL bEnable)7772 HVD_EX_Result MDrv_HVD_EX_3DLR_View_Exchange(MS_U32 u32Id, MS_BOOL bEnable)
7773 {
7774 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7775 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7776
7777 HVD_EX_MSG_TRACE();
7778 _DRV_HVD_Inited(u8DrvId,eRet);
7779 _DRV_HVD_EX_Entry(u8DrvId);
7780
7781 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_3DLR_VIEW_EXCHANGE, bEnable);
7782
7783 _DRV_HVD_EX_RET(u8DrvId, eRet);
7784 }
7785
7786 //-----------------------------------------------------------------------------
7787 /// @brief \b Function \b Name: MDrv_HVD_GetFrmRateIsSupported()
7788 /// @brief \b Function \b Description: Get if the framerate is supported
7789 /// @return -The result of supported or not.
7790 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFrmRateIsSupported(MS_U32 u32Id)7791 MS_BOOL MDrv_HVD_EX_GetFrmRateIsSupported(MS_U32 u32Id)
7792 {
7793 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7794 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7795 MS_BOOL bRet = pCtrl->bFrmRateSupported;
7796
7797 return bRet;
7798 }
7799
7800
7801 //-----------------------------------------------------------------------------
7802 /// @brief \b Function \b Name: MDrv_HVD_EX_Enable_New_Slow_Motion()
7803 /// @brief \b Function \b Description: view exchange
7804 /// @param -bEnable \b IN : turn on / off.
7805 /// @return -The result of command setting fd_mask muting count
7806 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Enable_New_Slow_Motion(MS_U32 u32Id,MS_BOOL bEnable)7807 HVD_EX_Result MDrv_HVD_EX_Enable_New_Slow_Motion(MS_U32 u32Id, MS_BOOL bEnable)
7808 {
7809 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7810 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7811
7812 HVD_EX_MSG_TRACE();
7813 _DRV_HVD_Inited(u8DrvId,eRet);
7814 _DRV_HVD_EX_Entry(u8DrvId);
7815
7816 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_NEW_SLOW_MOTION, bEnable);
7817
7818 _DRV_HVD_EX_RET(u8DrvId, eRet);
7819 }
7820
7821 //------------------------------------------------------------------------------
7822 /// Get SEI USER DATA Info
7823 /// @param pUsrInfo \b OUT : Get CC USER Data info
7824 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
7825 //------------------------------------------------------------------------------
MDrv_HVD_EX_GetUserDataInfo(MS_U32 u32Id,HVD_EX_UserData_Info * pUsrInfo)7826 HVD_EX_Result MDrv_HVD_EX_GetUserDataInfo(MS_U32 u32Id,HVD_EX_UserData_Info* pUsrInfo)
7827 {
7828 HVD_EX_Result eRet = E_HVD_EX_FAIL;
7829 MS_U32 u32UserDataIdxSize = 0;
7830 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
7831 MS_U32 u32UserDataSize = 0;
7832 MS_VIRT u32UserDataAddr = 0;
7833 MS_VIRT u32CodeVAddr = 0;
7834 DTV_BUF_type* pHVD_User_Data = NULL;
7835 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7836 HVD_EX_MSG_TRACE();
7837 _DRV_HVD_Inited(u8DrvId,eRet);
7838 _DRV_HVD_EX_Entry(u8DrvId);
7839
7840 u32UserDataIdxSize = (MS_U32)HAL_HVD_EX_GetData(u32Id,E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
7841 u32UsrDataIdxWptr = MDrv_HVD_EX_GetUserData_Wptr(u32Id);
7842
7843 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
7844 {
7845 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr = u32UsrDataIdxWptr;
7846 }
7847
7848 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd == pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr)
7849 { // User Data Buffer Empty
7850 _DRV_HVD_EX_RET(u8DrvId, eRet);
7851 }
7852
7853 u32CodeVAddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufVAddr;
7854 if(u32CodeVAddr == 0x0)
7855 {
7856 eRet = E_HVD_EX_FAIL;
7857 _DRV_HVD_EX_RET(u8DrvId, eRet);
7858 }
7859
7860 u32UserDataAddr = MDrv_HVD_EX_GetUserData_Packet(u32Id,pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd, (MS_U32*)&u32UserDataSize );
7861 if(u32UserDataAddr == 0x0)
7862 {
7863 eRet = E_HVD_EX_FAIL;
7864 _DRV_HVD_EX_RET(u8DrvId, eRet);
7865 }
7866 u32UserDataAddr += u32CodeVAddr; // change to virtual address
7867
7868 pHVD_User_Data = (DTV_BUF_type*)u32UserDataAddr;
7869
7870 pUsrInfo->u16TmpRef = pHVD_User_Data->u16TempRefCnt;
7871 pUsrInfo->u8PicStruct = pHVD_User_Data->pic_struct;
7872 pUsrInfo->u8PicType = pHVD_User_Data->type;
7873 pUsrInfo->u32Pts = pHVD_User_Data->pts;
7874 pUsrInfo->u8ByteCnt = pHVD_User_Data->len;
7875 pUsrInfo->u32DataBuf = (MS_VIRT)pHVD_User_Data->buf;
7876
7877 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd++;
7878
7879 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd >= u32UserDataIdxSize)
7880 {
7881 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd = 0;
7882 }
7883
7884 eRet = E_HVD_EX_OK;
7885
7886 _DRV_HVD_EX_RET(u8DrvId, eRet);
7887
7888 }
7889
7890 //------------------------------------------------------------------------------
7891 /// @brief \b Function \b Name: MDrv_HVD_GetUsrDataIsAvailable()
7892 /// @brief \b Function \b Description: Is there new user data info.
7893 /// @return - TRUE/ FALSE
7894 /// @retval -FALSE(0): no new user data info
7895 /// @retval -TRUE(1): has new user data info
7896 //------------------------------------------------------------------------------
MDrv_HVD_EX_GetUsrDataIsAvailable(MS_U32 u32Id)7897 MS_BOOL MDrv_HVD_EX_GetUsrDataIsAvailable(MS_U32 u32Id)
7898 {
7899
7900 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7901 MS_BOOL bRet = FALSE;
7902 HVD_EX_MSG_TRACE();
7903 _DRV_HVD_EX_Entry(u8DrvId);
7904 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
7905 u32UsrDataIdxWptr = MDrv_HVD_EX_GetUserData_Wptr(u32Id);
7906
7907 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
7908 {
7909 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr = u32UsrDataIdxWptr;
7910 }
7911
7912 bRet = (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr == pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd)?FALSE:TRUE;
7913 _DRV_HVD_EX_RET(u8DrvId, bRet);
7914 }
7915
7916 //------------------------------------------------------------------------------
7917 /// Set HVD DTV User Data Packet Mode
7918 /// @param u8UserDataMode \b IN : User Data Packet Mode. 0: DVB normal, 1: ATSC DirectTV. default:0
7919 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
7920 //------------------------------------------------------------------------------
MDrv_HVD_EX_SetDTVUserDataMode(MS_U32 u32Id,MS_U8 u8UserDataMode)7921 HVD_EX_Result MDrv_HVD_EX_SetDTVUserDataMode(MS_U32 u32Id,MS_U8 u8UserDataMode)
7922 {
7923 HVD_EX_Result eRet = E_HVD_EX_FAIL;
7924 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7925 HVD_EX_MSG_TRACE();
7926 _DRV_HVD_Inited(u8DrvId,eRet);
7927 _DRV_HVD_EX_Entry(u8DrvId);
7928
7929
7930 if (u8UserDataMode == 0)
7931 {
7932 // Noraml DVB USER DATA
7933 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 0);
7934 }
7935 else if (u8UserDataMode == 1)
7936 {
7937 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 1);
7938 }
7939 else if (u8UserDataMode == 2)
7940 {
7941 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 2);
7942 }
7943 else if (u8UserDataMode == 3)
7944 {
7945 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 3);
7946 }
7947 else if (u8UserDataMode == 7)
7948 {
7949 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 7);
7950 }
7951 else
7952 {
7953 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, u8UserDataMode);
7954 HVD_PRINT("Debug Mode for set user data mode \n");
7955 }
7956
7957 _DRV_HVD_EX_RET(u8DrvId, eRet);
7958 }
7959
7960
7961 //-----------------------------------------------------------------------------
7962 /// @brief \b Function \b Name: MDrv_HVD_GetFrmPackingArrSEI()
7963 /// @brief \b Function \b Description: Get if the Frame packing arrangement SEI data
7964 /// @param -bEnable \b IN : The frame packing SEI struct
7965 /// @return -The result of got the info. or not.
7966 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFrmPackingArrSEI(MS_U32 u32Id,HVD_EX_FrmPackingSEI * pFrmPacking)7967 HVD_EX_Result MDrv_HVD_EX_GetFrmPackingArrSEI(MS_U32 u32Id, HVD_EX_FrmPackingSEI *pFrmPacking)
7968 {
7969
7970 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7971 MS_VIRT u32FPAFrameAddr = 0 ;
7972 MS_U32 u32CodeVaddr = 0 ;
7973 HVD_Frame_packing_SEI *pFrmPackingSrc = NULL;
7974 MS_BOOL bIn = FALSE;
7975 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7976
7977 HVD_EX_MSG_TRACE();
7978 _DRV_HVD_Inited(u8DrvId,eRet);
7979 _DRV_HVD_EX_Entry(u8DrvId);
7980
7981 u32CodeVaddr = MS_PA2KSEG1((MS_U32)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr));
7982 if(u32CodeVaddr == 0x0)
7983 {
7984 eRet = E_HVD_EX_FAIL;
7985 _DRV_HVD_EX_RET(u8DrvId, eRet);
7986 }
7987
7988 u32FPAFrameAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRM_PACKING_SEI_DATA);
7989
7990 //u32FPAFrameAddr = HAL_HVD_EX_GetData(u8DrvId,E_HVD_GDATA_FRM_PACKING_SEI_DATA);
7991 if(u32FPAFrameAddr == 0x0)
7992 {
7993 eRet = E_HVD_EX_FAIL;
7994 _DRV_HVD_EX_RET(u8DrvId, eRet);
7995 }
7996
7997 u32FPAFrameAddr = MS_PA2KSEG1((MS_U32)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr+u32FPAFrameAddr)); // change to virtual address
7998
7999 pFrmPackingSrc = (HVD_Frame_packing_SEI *)u32FPAFrameAddr;
8000
8001 if(pFrmPacking != NULL)
8002 {
8003 if(pFrmPackingSrc->bvaild == TRUE)
8004 {
8005 bIn = TRUE;
8006 pFrmPacking->bvaild = pFrmPackingSrc->bvaild;
8007 pFrmPacking->bUsed = pFrmPackingSrc->bUsed;
8008 pFrmPacking->u8Frm_packing_arr_cnl_flag = pFrmPackingSrc->u8Frm_packing_arr_cnl_flag;
8009 pFrmPacking->u8Frm_packing_arr_type = pFrmPackingSrc->u8Frm_packing_arr_type;
8010 pFrmPacking->u8content_interpretation_type = pFrmPackingSrc->u8content_interpretation_type;
8011 pFrmPacking->u1Quincunx_sampling_flag = pFrmPackingSrc->u1Quincunx_sampling_flag;
8012 pFrmPacking->u1Spatial_flipping_flag = pFrmPackingSrc->u1Spatial_flipping_flag;
8013 pFrmPacking->u1Frame0_flipping_flag = pFrmPackingSrc->u1Frame0_flipping_flag;
8014 pFrmPacking->u1Field_views_flag = pFrmPackingSrc->u1Field_views_flag;
8015 pFrmPacking->u1Current_frame_is_frame0_flag = pFrmPackingSrc->u1Current_frame_is_frame0_flag;
8016 pFrmPacking->u1Frame0_self_contained_flag = pFrmPackingSrc->u1Frame0_self_contained_flag;
8017 pFrmPacking->u1Frame1_self_contained_flag = pFrmPackingSrc->u1Frame1_self_contained_flag;
8018 pFrmPacking->u4Frame0_grid_position_x = pFrmPackingSrc->u4Frame0_grid_position_x;
8019 pFrmPacking->u4Frame0_grid_position_y = pFrmPackingSrc->u4Frame0_grid_position_y;
8020 pFrmPacking->u4Frame1_grid_position_x = pFrmPackingSrc->u4Frame1_grid_position_x;
8021 pFrmPacking->u4Frame1_grid_position_y = pFrmPackingSrc->u4Frame1_grid_position_y;
8022 pFrmPacking->u16CropRight = pFrmPackingSrc->u16CropRight;
8023 pFrmPacking->u16CropLeft = pFrmPackingSrc->u16CropLeft;
8024 pFrmPacking->u16CropBottom = pFrmPackingSrc->u16CropBottom;
8025 pFrmPacking->u16CropTop = pFrmPackingSrc->u16CropTop;
8026
8027 if(pFrmPackingSrc->u8payload_len > 32)
8028 {
8029 pFrmPacking->u8payload_len = 32;
8030 }
8031 else
8032 {
8033 pFrmPacking->u8payload_len = pFrmPackingSrc->u8payload_len;
8034 }
8035
8036 pFrmPacking->u8WaitSPS = pFrmPackingSrc->u8WaitSPS;
8037 pFrmPacking->u32payload = (MS_VIRT)pFrmPackingSrc->u8payload;
8038
8039 eRet = E_HVD_EX_OK;
8040 }
8041 else
8042 {
8043 eRet = E_HVD_EX_FAIL;
8044 }
8045 HVD_EX_MSG_DBG("SEI status (%d): %d %d %d %d %d %d %d %d\n",bIn,
8046 pFrmPacking->bvaild,pFrmPacking->bUsed,pFrmPacking->u8Frm_packing_arr_cnl_flag,pFrmPacking->u8Frm_packing_arr_type,
8047 pFrmPacking->u16CropRight,pFrmPacking->u16CropLeft,pFrmPacking->u16CropBottom,pFrmPacking->u16CropTop);
8048 }
8049 else
8050 {
8051 eRet = E_HVD_EX_FAIL;
8052 }
8053 _DRV_HVD_EX_RET(u8DrvId, eRet);
8054 }
8055
MDrv_HVD_EX_GetDisplayColourVolumeArrSEI(MS_U32 u32Id,HVD_EX_DisplayColourVolumeSEI * pDisplayColourVolume)8056 HVD_EX_Result MDrv_HVD_EX_GetDisplayColourVolumeArrSEI(MS_U32 u32Id, HVD_EX_DisplayColourVolumeSEI *pDisplayColourVolume)
8057 {
8058 HVD_EX_Result eRet = E_HVD_EX_FAIL;
8059 MS_VIRT u32DCVFrameAddr = 0 ;
8060
8061 HVD_EX_DisplayColourVolumeSEI *pDisplayColourVolumeSrc = NULL;
8062 MS_BOOL bIn = FALSE;
8063 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8064
8065 HVD_EX_MSG_TRACE();
8066 _DRV_HVD_Inited(u8DrvId,eRet);
8067 _DRV_HVD_EX_Entry(u8DrvId);
8068
8069 u32DCVFrameAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISPLAYCOLOURVOLUME_SEI_DATA);//get data
8070
8071 if(u32DCVFrameAddr == 0x0)
8072 {
8073 eRet = E_HVD_EX_FAIL;
8074 _DRV_HVD_EX_RET(u8DrvId, eRet);
8075 }
8076
8077 u32DCVFrameAddr = MS_PA2KSEG1((MS_U32)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr+u32DCVFrameAddr)); // change to virtual address
8078
8079 pDisplayColourVolumeSrc = (HVD_EX_DisplayColourVolumeSEI *)u32DCVFrameAddr;
8080
8081 if(pDisplayColourVolume != NULL)
8082 {
8083 bIn = TRUE;
8084
8085 pDisplayColourVolume->bColourVolumeSEIEnabled = pDisplayColourVolumeSrc->bColourVolumeSEIEnabled;
8086 pDisplayColourVolume->u32MaxLuminance = pDisplayColourVolumeSrc->u32MaxLuminance;
8087 pDisplayColourVolume->u32MinLuminance = pDisplayColourVolumeSrc->u32MinLuminance;
8088 pDisplayColourVolume->u16Primaries[0][0] = pDisplayColourVolumeSrc->u16Primaries[0][0];
8089 pDisplayColourVolume->u16Primaries[0][1] = pDisplayColourVolumeSrc->u16Primaries[0][1];
8090 pDisplayColourVolume->u16Primaries[1][0] = pDisplayColourVolumeSrc->u16Primaries[1][0];
8091 pDisplayColourVolume->u16Primaries[1][1] = pDisplayColourVolumeSrc->u16Primaries[1][1];
8092 pDisplayColourVolume->u16Primaries[2][0] = pDisplayColourVolumeSrc->u16Primaries[2][0];
8093 pDisplayColourVolume->u16Primaries[2][1] = pDisplayColourVolumeSrc->u16Primaries[2][1];
8094 pDisplayColourVolume->u16WhitePoint[0] = pDisplayColourVolumeSrc->u16WhitePoint[0];
8095 pDisplayColourVolume->u16WhitePoint[1] = pDisplayColourVolumeSrc->u16WhitePoint[1];
8096
8097 eRet = E_HVD_EX_OK;
8098 }
8099 else
8100 {
8101 eRet = E_HVD_EX_FAIL;
8102 }
8103 _DRV_HVD_EX_RET(u8DrvId, eRet);
8104 }
8105
MDrv_HVD_EX_GetContentLightLevelInfoSEI(MS_U32 u32Id,HVD_EX_ContentLightLevelInfoSEI * pContentLightLevel)8106 HVD_EX_Result MDrv_HVD_EX_GetContentLightLevelInfoSEI(MS_U32 u32Id, HVD_EX_ContentLightLevelInfoSEI *pContentLightLevel)
8107 {
8108 HVD_EX_Result eRet = E_HVD_EX_FAIL;
8109 MS_VIRT u32CLLIAddr = 0 ;
8110
8111 HVD_EX_ContentLightLevelInfoSEI *pContentLightLevelInfoSrc = NULL;
8112 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8113
8114 HVD_EX_MSG_TRACE();
8115 _DRV_HVD_Inited(u8DrvId,eRet);
8116 _DRV_HVD_EX_Entry(u8DrvId);
8117
8118 u32CLLIAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_CONTENT_LIGHT_LEVEL_INFO);//get data
8119
8120 if(u32CLLIAddr == 0x0)
8121 {
8122 eRet = E_HVD_EX_FAIL;
8123 _DRV_HVD_EX_RET(u8DrvId, eRet);
8124 }
8125
8126 u32CLLIAddr = MS_PA2KSEG1((MS_U32)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr+u32CLLIAddr)); // change to virtual address
8127 pContentLightLevelInfoSrc = (HVD_EX_ContentLightLevelInfoSEI *)u32CLLIAddr;
8128 if(pContentLightLevel != NULL)
8129 {
8130 pContentLightLevel->bUsed = pContentLightLevelInfoSrc->bUsed;
8131 pContentLightLevel->ContentLightLevelEnabled = pContentLightLevelInfoSrc->ContentLightLevelEnabled;
8132 pContentLightLevel->maxContentLightLevel = pContentLightLevelInfoSrc->maxContentLightLevel;
8133 pContentLightLevel->maxPicAverageLightLevel = pContentLightLevelInfoSrc->maxPicAverageLightLevel;
8134 eRet = E_HVD_EX_OK;
8135 }
8136 else
8137 {
8138 eRet = E_HVD_EX_FAIL;
8139 }
8140 _DRV_HVD_EX_RET(u8DrvId, eRet);
8141 }
8142
8143 //-----------------------------------------------------------------------------
8144 /// @brief \b Function \b Name: MDrv_HVD_EX_DynamicScalingResvNBuffer()
8145 /// @brief \b Function \b Description: use N buffers for Dynamic Scaling
8146 /// @param -bEnable \b IN : turn on / off.
8147 /// @return -The result of command to enable/disable N buffer for DS
8148 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DynamicScalingResvNBuffer(MS_U32 u32Id,MS_BOOL bEnable)8149 HVD_EX_Result MDrv_HVD_EX_DynamicScalingResvNBuffer(MS_U32 u32Id, MS_BOOL bEnable)
8150 {
8151 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8152 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8153
8154 HVD_EX_MSG_TRACE();
8155 _DRV_HVD_Inited(u8DrvId,eRet);
8156 _DRV_HVD_EX_Entry(u8DrvId);
8157
8158 //HVD_PRINT("MDrv_HVD_EX_DynamicScalingResvNBuffer bEnable = %d\n", bEnable);
8159 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, bEnable);
8160
8161 _DRV_HVD_EX_RET(u8DrvId, eRet);
8162 }
8163
8164 //-----------------------------------------------------------------------------
8165 /// @brief \b Function \b Name: MDrv_HVD_EX_GetBBUQNum()
8166 /// @brief \b Function \b Description: Get BBU Q number
8167 /// @return - BBU Q number
8168 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetBBUQNum(MS_U32 u32Id)8169 MS_U32 MDrv_HVD_EX_GetBBUQNum(MS_U32 u32Id)
8170 {
8171 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8172 _DRV_HVD_Inited(u8DrvId,FALSE);
8173
8174 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB);
8175 }
8176
8177 //-----------------------------------------------------------------------------
8178 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDispFrmNum()
8179 /// @brief \b Function \b Description: Get Disp frame number
8180 /// @return - Disp frame number
8181 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDispFrmNum(MS_U32 u32Id)8182 MS_U32 MDrv_HVD_EX_GetDispFrmNum(MS_U32 u32Id)
8183 {
8184 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8185 _DRV_HVD_Inited(u8DrvId,FALSE);
8186
8187 return HAL_HVD_EX_GetDispFrmNum(u32Id);
8188 }
8189
8190 //-----------------------------------------------------------------------------
8191 /// @brief \b Function \b Name: MDrv_HVD_EX_SetHVDClock()
8192 /// @brief \b Function \b Description: set hvd clock speed
8193 /// @return - The result of setting hvd clock speed
8194 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetHVDClockSpeed(HVD_EX_ClockSpeed eClockSpeed)8195 HVD_EX_Result MDrv_HVD_EX_SetHVDClockSpeed(HVD_EX_ClockSpeed eClockSpeed)
8196 {
8197 #if defined(CHIP_A3)
8198 HAL_HVD_EX_ClockSpeed eHVDClockSpeed = E_HVD_EX_CLOCK_SPEED_NONE;
8199 switch (eClockSpeed)
8200 {
8201 case E_HVD_EX_CLOCK_SPEED_HIGHEST:
8202 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_HIGHEST;
8203 break;
8204 case E_HVD_EX_CLOCK_SPEED_HIGH:
8205 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_HIGH;
8206 break;
8207 case E_HVD_EX_CLOCK_SPEED_MEDIUM:
8208 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_MEDIUM;
8209 break;
8210 case E_HVD_EX_CLOCK_SPEED_LOW:
8211 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_LOW;
8212 break;
8213 case E_HVD_EX_CLOCK_SPEED_LOWEST:
8214 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_LOWEST;
8215 break;
8216 case E_HVD_EX_CLOCK_SPEED_DEFAULT:
8217 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_DEFAULT;
8218 break;
8219 default:
8220 HVD_EX_MSG_ERR("hvd clock setting is wrong(%d)\n", eClockSpeed);
8221 return E_HVD_EX_FAIL;
8222 break;
8223 }
8224
8225 if(E_HVD_RETURN_SUCCESS != HAL_HVD_EX_SetClockSpeed(eHVDClockSpeed))
8226 {
8227 return E_HVD_EX_FAIL;
8228 }
8229
8230 return E_HVD_EX_OK;
8231 #else
8232 UNUSED(eClockSpeed);
8233 HVD_PRINT("This chip does not support hvd clock presetting~\n");
8234 return E_HVD_EX_RET_UNSUPPORTED;
8235 #endif
8236 }
8237
8238 //-----------------------------------------------------------------------------
8239 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVPUClockSpeed()
8240 /// @brief \b Function \b Description: set vpu clock speed
8241 /// @return - The result of setting vpu clock speed
8242 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVPUClockSpeed(HVD_EX_ClockSpeed eClockSpeed)8243 HVD_EX_Result MDrv_HVD_EX_SetVPUClockSpeed(HVD_EX_ClockSpeed eClockSpeed)
8244 {
8245 #if defined(CHIP_A3)
8246 HAL_VPU_EX_ClockSpeedType eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_NONE;
8247 switch (eClockSpeed)
8248 {
8249 case E_HVD_EX_CLOCK_SPEED_HIGHEST:
8250 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_HIGHEST;
8251 break;
8252 case E_HVD_EX_CLOCK_SPEED_HIGH:
8253 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_HIGH;
8254 break;
8255 case E_HVD_EX_CLOCK_SPEED_MEDIUM:
8256 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_MEDIUM;
8257 break;
8258 case E_HVD_EX_CLOCK_SPEED_LOW:
8259 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_LOW;
8260 break;
8261 case E_HVD_EX_CLOCK_SPEED_LOWEST:
8262 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_LOWEST;
8263 break;
8264 case E_HVD_EX_CLOCK_SPEED_DEFAULT:
8265 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_DEFAULT;
8266 break;
8267 default:
8268 HVD_EX_MSG_ERR("vpu clock setting is wrong(%d)\n", eVPUClockSpeed);
8269 return E_HVD_EX_FAIL;
8270 break;
8271 }
8272
8273 if(FALSE == HAL_VPU_EX_SetClockSpeedType(eVPUClockSpeed))
8274 {
8275 return E_HVD_EX_FAIL;
8276 }
8277
8278 return E_HVD_EX_OK;
8279 #else
8280 UNUSED(eClockSpeed);
8281 HVD_PRINT("This chip does not support vpu clock presetting~\n");
8282 return E_HVD_EX_RET_UNSUPPORTED;
8283 #endif
8284 }
8285
MDrv_HVD_EX_SetHVDColBBUMode(MS_U32 u32Id,MS_U8 bEnable)8286 HVD_EX_Result MDrv_HVD_EX_SetHVDColBBUMode(MS_U32 u32Id, MS_U8 bEnable)
8287 {
8288 #if (defined(CHIP_EDISON) || defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3)) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MUJI) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET) || defined(CHIP_MANHATTAN) || defined(CHIP_KANO) || defined(CHIP_CURRY)
8289 if(E_HVD_RETURN_SUCCESS != HAL_HVD_EX_SetHVDColBBUMode(u32Id, bEnable))
8290 return E_HVD_EX_FAIL;
8291 #endif
8292 return E_HVD_EX_OK;
8293 }
8294
8295 //-----------------------------------------------------------------------------
8296 /// @brief \b Function \b Name: MDrv_HVD_EX_DSReportDispInfoChange()
8297 /// @brief \b Function \b Description: Setting report display info change info. when DS enabled.
8298 /// @param -bEnable \b IN : turn on / off.
8299 /// @return -The result of command to enable/disable Report display info change info.
8300 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DSReportDispInfoChange(MS_U32 u32Id,MS_BOOL bEnable)8301 HVD_EX_Result MDrv_HVD_EX_DSReportDispInfoChange(MS_U32 u32Id, MS_BOOL bEnable)
8302 {
8303 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8304 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8305
8306 HVD_EX_MSG_TRACE();
8307 _DRV_HVD_Inited(u8DrvId,eRet);
8308 _DRV_HVD_EX_Entry(u8DrvId);
8309
8310 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DS_RESET_XC_DISP_WIN, bEnable);
8311
8312 _DRV_HVD_EX_RET(u8DrvId, eRet);
8313
8314 }
8315
MDrv_HVD_EX_SetSecureMode(MS_U32 u32Id,MS_U32 u32SecureMode)8316 HVD_EX_Result MDrv_HVD_EX_SetSecureMode(MS_U32 u32Id, MS_U32 u32SecureMode)
8317 {
8318 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8319 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8320
8321 HVD_EX_MSG_TRACE();
8322 _DRV_HVD_Inited(u8DrvId,eRet);
8323 _DRV_HVD_EX_Entry(u8DrvId);
8324
8325 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SecureMode = (MS_U8)u32SecureMode;
8326
8327 _DRV_HVD_EX_RET(u8DrvId, eRet);
8328 }
8329
8330
8331 //-----------------------------------------------------------------------------
8332 /// @brief \b Function \b Name: MDrv_HVD_EX_SupportRefNumOverMaxDpbSize()
8333 /// @brief \b Function \b Description: Support h264 FHD ref frame up to 6
8334 /// @param -bEnable \b IN : turn on / off.
8335 /// @return -The result of command to enable/disable support h264 FHD ref frame up to 6
8336 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SupportRefNumOverMaxDpbSize(MS_U32 u32Id,MS_BOOL bEnable)8337 HVD_EX_Result MDrv_HVD_EX_SupportRefNumOverMaxDpbSize(MS_U32 u32Id, MS_BOOL bEnable)
8338 {
8339 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8340 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8341
8342 HVD_EX_MSG_TRACE();
8343 _DRV_HVD_Inited(u8DrvId,eRet);
8344 _DRV_HVD_EX_Entry(u8DrvId);
8345
8346 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_SUPPORT_REF_NUM_OVER_MAX_DPB_SIZE, bEnable);
8347
8348 _DRV_HVD_EX_RET(u8DrvId, eRet);
8349 }
8350
8351 //-----------------------------------------------------------------------------
8352 /// @brief \b Function \b Name: MDrv_HVD_EX_RVU_Setting_Mode()
8353 /// @brief \b Function \b Description: RVU settings
8354 /// @param -u32Param \u32 IN : 0: diable, 1: Drop B-frame and force IDR.
8355 /// @return -The result of command setting E_HVD_CMD_RVU_SETTING_MODE
8356 //-----------------------------------------------------------------------------
MDrv_HVD_EX_RVU_Setting_Mode(MS_U32 u32Id,MS_U32 u32Param)8357 HVD_EX_Result MDrv_HVD_EX_RVU_Setting_Mode(MS_U32 u32Id, MS_U32 u32Param)
8358 {
8359 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8360 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8361
8362 HVD_EX_MSG_TRACE();
8363 _DRV_HVD_Inited(u8DrvId,eRet);
8364 _DRV_HVD_EX_Entry(u8DrvId);
8365
8366 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RVU_SETTING_MODE, u32Param);
8367
8368 _DRV_HVD_EX_RET(u8DrvId, eRet);
8369 }
8370
8371
8372 //-----------------------------------------------------------------------------
8373 /// @brief \b Function \b Name: MDrv_HVD_EX_FramerateHandling()
8374 /// @brief \b Function \b Description: FramerateHandling
8375 /// @brief \b A.Case of (timing_info_present_flag == 1)
8376 /// @brief \b i.Use num_units_in_tick and time_scale
8377 /// @brief \b ii.framerate = time_scale / num_units_in_tick / 2
8378 /// @brief \b iii.If calculated framerate from ii.
8379 /// @brief \b iv.If there is no time_scale or num_units_in_tick, framerate should be 30fps as default vaule.
8380 /// @brief \b B.Case of timing_info_present_flag == 0
8381 /// @brief \b i.Use framerate from application
8382 /// @brief \b C.If there is no VUI information, use framerate from application
8383 /// @param -bu32FrameRate \b IN : framerate from application
8384 /// @return -The result of command for handling framerate
8385 //-----------------------------------------------------------------------------
MDrv_HVD_EX_FramerateHandling(MS_U32 u32Id,MS_U32 u32FrameRate)8386 HVD_EX_Result MDrv_HVD_EX_FramerateHandling(MS_U32 u32Id, MS_U32 u32FrameRate)
8387 {
8388 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8389 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8390
8391 HVD_EX_MSG_TRACE();
8392 _DRV_HVD_Inited(u8DrvId,eRet);
8393 _DRV_HVD_EX_Entry(u8DrvId);
8394
8395 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRAMERATE_HANDLING, u32FrameRate);
8396
8397 _DRV_HVD_EX_RET(u8DrvId, eRet);
8398 }
8399
8400 //-----------------------------------------------------------------------------
8401 /// @brief \b Function \b Name: MDrv_HVD_EX_DualNonBlockMode()
8402 /// @brief \b Function \b Description: handle dual non blocking mode
8403 /// @param -bEnable \b IN : turn on / off.
8404 /// @return -The result of command setting E_HVD_CMD_DUAL_NON_BLOCK_MODE
8405 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DualNonBlockMode(MS_U32 u32Id,MS_BOOL bEnable)8406 HVD_EX_Result MDrv_HVD_EX_DualNonBlockMode(MS_U32 u32Id, MS_BOOL bEnable)
8407 {
8408 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8409 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8410
8411 HVD_EX_MSG_TRACE();
8412 _DRV_HVD_Inited(u8DrvId,eRet);
8413 _DRV_HVD_EX_Entry(u8DrvId);
8414
8415 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DUAL_NON_BLOCK_MODE, bEnable);
8416
8417 _DRV_HVD_EX_RET(u8DrvId, eRet);
8418 }
8419
8420 //-----------------------------------------------------------------------------
8421 /// @brief \b Function \b Name: MDrv_HVD_EX_IgnorePicStructDisplay()
8422 /// @brief \b Function \b Description: Ignore Pic_struct when display progressive frame.
8423 /// @param -bEnable \b IN : turn on / off.
8424 /// @return -The result of command to enable/disable ignore Pic_struct when display progressive frame.
8425 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IgnorePicStructDisplay(MS_U32 u32Id,MS_U32 param)8426 HVD_EX_Result MDrv_HVD_EX_IgnorePicStructDisplay(MS_U32 u32Id, MS_U32 param)
8427 {
8428 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8429 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8430
8431 HVD_EX_MSG_TRACE();
8432 _DRV_HVD_Inited(u8DrvId,eRet);
8433 _DRV_HVD_EX_Entry(u8DrvId);
8434
8435 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_PIC_STRUCT_DISPLAY, param);
8436
8437 _DRV_HVD_EX_RET(u8DrvId, eRet);
8438 }
8439
8440 //-----------------------------------------------------------------------------
8441 /// @brief \b Function \b Name: MDrv_HVD_EX_InputPtsFreerunMode()
8442 /// @brief \b Function \b Description: video free run when the difference between input PTS and current STC is large than E_HVD_CMD_FREERUN_THRESHOLD + 1s.
8443 /// @param -bEnable \b IN : turn on / off.
8444 /// @return -The result of command to enable/disable video free run when the difference between input PTS and current STC is large than E_HVD_CMD_FREERUN_THRESHOLD + 1s.
8445 //-----------------------------------------------------------------------------
MDrv_HVD_EX_InputPtsFreerunMode(MS_U32 u32Id,MS_U32 param)8446 HVD_EX_Result MDrv_HVD_EX_InputPtsFreerunMode(MS_U32 u32Id, MS_U32 param)
8447 {
8448 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8449 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8450
8451 HVD_EX_MSG_TRACE();
8452 _DRV_HVD_Inited(u8DrvId,eRet);
8453 _DRV_HVD_EX_Entry(u8DrvId);
8454
8455 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_INPUT_PTS_FREERUN_MODE, param);
8456
8457 _DRV_HVD_EX_RET(u8DrvId, eRet);
8458 }
8459
8460 //-----------------------------------------------------------------------------
8461 /// @brief \b Function \b Name: MDrv_HVD_EX_ErrConcealStartSlice1stMB()
8462 /// @brief \b Function \b Description: Error concealment from current slice first MB.(Need enable E_HVD_CMD_ERR_CONCEAL)
8463 /// @param -bEnable \b IN : turn on / off.
8464 /// @return -The result of command to enable/disable Error concealment from current slice first MB.(Need enable E_HVD_CMD_ERR_CONCEAL)
8465 //-----------------------------------------------------------------------------
MDrv_HVD_EX_ErrConcealStartSlice1stMB(MS_U32 u32Id,MS_U32 param)8466 HVD_EX_Result MDrv_HVD_EX_ErrConcealStartSlice1stMB(MS_U32 u32Id, MS_U32 param)
8467 {
8468 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8469 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8470
8471 HVD_EX_MSG_TRACE();
8472 _DRV_HVD_Inited(u8DrvId,eRet);
8473 _DRV_HVD_EX_Entry(u8DrvId);
8474
8475 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ERR_CONCEAL_SLICE_1ST_MB, param);
8476
8477 _DRV_HVD_EX_RET(u8DrvId, eRet);
8478 }
8479
8480
8481 //-----------------------------------------------------------------------------
8482 /// @brief \b Function \b Name: MDrv_HVD_EX_SetExternalDSBuffer()
8483 /// @brief \b Function \b Description: Set External DS buffer
8484 /// @param -bEnable \b IN : External DS buffer info.
8485 /// @return -The result of command to set external DS buffer.
8486 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetExternalDSBuffer(MS_U32 u32Id,HVD_EX_ExternalDSBuf * pExternalBuf)8487 HVD_EX_Result MDrv_HVD_EX_SetExternalDSBuffer(MS_U32 u32Id, HVD_EX_ExternalDSBuf *pExternalBuf)
8488 {
8489 #define SIZE_3K 0xC00
8490 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8491 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8492 HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
8493 MS_BOOL bFWInMIU1 = FALSE;
8494 MS_BOOL bExternalInMIU1 = FALSE;
8495 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8496 MS_PHY u32DSBufAddr = pExternalBuf->u32DSBufAddr;
8497
8498 HVD_EX_MSG_TRACE();
8499 _DRV_HVD_Inited(u8DrvId,eRet);
8500 _DRV_HVD_EX_Entry(u8DrvId);
8501
8502 if((pShm == NULL) || (pCtrl == NULL) || (pExternalBuf->u32DSBufSize < SIZE_3K)) /// DS buffer size need more than 3K (0xC00)
8503 {
8504 return E_HVD_EX_FAIL;
8505 }
8506
8507 #if defined(CHIP_MONACO) || defined(CHIP_MUJI) || defined(CHIP_MONET) || defined(CHIP_MANHATTAN) || defined(CHIP_KANO) || defined(CHIP_CURRY)
8508 if(VPU_FORCE_MIU_MODE == 1)
8509 {
8510 HVD_EX_MSG_ERR("this chip does not support set external DS buffer since VPU_FORCE_MIU_MODE == 1 !!\n");
8511 return E_HVD_EX_RET_UNSUPPORTED;
8512 }
8513 #endif
8514
8515 ///HVD_PRINT("[EDS] 0x%lx, 0x%lx.\n",pCtrl->MemMap.u32CodeBufAddr,pCtrl->MemMap.u32MIU1BaseAddr);
8516 if((pCtrl->MemMap.u32CodeBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr) && (pCtrl->MemMap.u32MIU1BaseAddr != 0))
8517 {
8518 bFWInMIU1 = TRUE;
8519 }
8520
8521 if((pExternalBuf->u32DSBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr) && (pCtrl->MemMap.u32MIU1BaseAddr != 0) )
8522 {
8523 bExternalInMIU1 = TRUE;
8524 u32DSBufAddr -= pCtrl->MemMap.u32MIU1BaseAddr;
8525 }
8526 //HVD_PRINT("[EDS] MIU %d, %d.\n",bFWInMIU1,bExternalInMIU1);
8527
8528 /// If FW and external buf is in the same MIU, the External buffer do nothing.
8529 if(bFWInMIU1 == bExternalInMIU1)
8530 {
8531 pShm->u32DSbufferAddr = u32DSBufAddr;
8532 }
8533 else
8534 {
8535 /// If FW and external buf is not in the same MIU, the External buffer add the VPU Miu base size
8536 pShm->u32DSbufferAddr = u32DSBufAddr + HAL_VPU_EX_MIU1BASE();
8537 }
8538 pShm->u32DSBuffSize = pExternalBuf->u32DSBufSize;
8539
8540 MsOS_FlushMemory();
8541 ///HVD_PRINT("[EDS] DS addr = 0x%lx, size = 0x%lx.\n",pShm->u32DSbufferAddr,pShm->u32DSBuffSize);
8542 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_EXTERNAL_DS_BUF, TRUE);
8543
8544 pCtrl->u8SettingMode |= HVD_DRV_MODE_EXTERNAL_DS_BUFFER;
8545 pCtrl->u32ExternalDSbuf = pExternalBuf->u32DSBufAddr;
8546
8547 _DRV_HVD_EX_RET(u8DrvId, eRet);
8548 }
8549
MDrv_HVD_EX_GetESBufferStatus(MS_U32 u32Id)8550 MS_U32 MDrv_HVD_EX_GetESBufferStatus(MS_U32 u32Id)
8551 {
8552 MS_U32 u32Ret = 0;
8553 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8554
8555 _DRV_HVD_Inited(u8DrvId,FALSE);
8556
8557 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_ES_BUF_STATUS);
8558 u32Ret = _HVD_EX_Map2HVDESBufStatus(u32Ret);
8559
8560 return u32Ret;
8561 }
8562
_HVD_EX_CC_Update_UserData_Wptr(MS_U32 u32Id)8563 static MS_U32 _HVD_EX_CC_Update_UserData_Wptr(MS_U32 u32Id)
8564 {
8565
8566 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8567 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8568
8569 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8570 MS_U32 u32UsrDataIdxWptr = MDrv_HVD_EX_GetUserData_Wptr(u32Id);
8571
8572 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
8573 pCCInfo->u32FWUsrDataWIdx = u32UsrDataIdxWptr;
8574
8575 return pCCInfo->u32FWUsrDataWIdx;
8576 }
8577
_HVD_EX_CC_Parse_AFD_data(MS_U8 ** pUserDataBuf)8578 static void _HVD_EX_CC_Parse_AFD_data(MS_U8 **pUserDataBuf)
8579 {
8580
8581 (*pUserDataBuf)++;
8582 (*pUserDataBuf)++;
8583
8584 }
8585
_HVD_EX_CC_Parse_BAR_data(MS_U8 ** pUserDataBuf)8586 static void _HVD_EX_CC_Parse_BAR_data(MS_U8 **pUserDataBuf)
8587 {
8588
8589 MS_BOOL bTopBarFlag, bBottomBarFlag, bLeftBarFlag, bRightBarlag;
8590
8591 bTopBarFlag = (((**pUserDataBuf) & 0x80) == 0x80); //u_f(1,"top_bar_flag");
8592 bBottomBarFlag = (((**pUserDataBuf) & 0x40) == 0x40); //u_f(1,"bottom_bar_flag");
8593 bLeftBarFlag = (((**pUserDataBuf) & 0x20) == 0x20); //u_f(1,"left_bar_flag");
8594 bRightBarlag = ((*((*pUserDataBuf)++) & 0x10) == 0x10); //u_f(1,"right_bar_flag"); u_f(4,"reserved");
8595
8596 if (bTopBarFlag)
8597 {
8598 *pUserDataBuf += 2;
8599 }
8600
8601 if (bBottomBarFlag)
8602 {
8603 *pUserDataBuf += 2;
8604 }
8605
8606 if (bLeftBarFlag)
8607 {
8608 *pUserDataBuf += 2;
8609 }
8610
8611 if (bRightBarlag)
8612 {
8613 *pUserDataBuf += 2;
8614 }
8615
8616 }
8617
_HVD_EX_CC_Parse_CC_data(MS_U32 u32Id,MS_U8 u8CCMode,MS_U8 ** pSrc,MS_U8 * pDst608,MS_U32 * pu32Dst608Len,MS_U8 * pDst708,MS_U32 * pu32Dst708Len,HVD_CC_608EnhanceInfo * pEhInfo608)8618 static void _HVD_EX_CC_Parse_CC_data(MS_U32 u32Id, MS_U8 u8CCMode,MS_U8 **pSrc, MS_U8 *pDst608, MS_U32 *pu32Dst608Len, MS_U8 *pDst708, MS_U32 *pu32Dst708Len, HVD_CC_608EnhanceInfo *pEhInfo608)
8619 {
8620 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8621 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8622
8623 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8624
8625 MS_U32 i,j;
8626 MS_U32 u32CC_Count;
8627 MS_U8 u8CC_Code;
8628 MS_U8 u8CC_Type;
8629 MS_U8 u8CC_Data1, u8CC_Data2;
8630 MS_U32 u32Pad;
8631
8632
8633
8634 u8CC_Code = *((*pSrc)++); //u_f(8,"cc_data_flag cc_count");
8635
8636 u32CC_Count = u8CC_Code & 0x1F; // cc_count
8637 if (!(u8CC_Code & 0x40)) return; // process_cc_data_flag
8638
8639
8640
8641 (*pSrc)++; //u_f(8,"reserved 1");
8642
8643
8644
8645 for (i=0;i<u32CC_Count;i++)
8646 {
8647 MS_U8 u8Code;
8648
8649
8650 u8Code = *((*pSrc)++); // u_f(8,"cc_valid and cc_type");
8651
8652
8653 u8CC_Type = u8Code & 0x03;
8654
8655 u8CC_Data1 = *((*pSrc)++); // u_f(8,"cc_data_1");
8656 u8CC_Data2 = *((*pSrc)++); // u_f(8,"cc_data_2");
8657
8658 if (!(u8Code & 0x04)) continue; // cc_valid
8659
8660 //NTSC CC 608
8661 if ((u8CC_Type == 0) || (u8CC_Type == 1))
8662 {
8663 //g_DTV_CC.ntsc_cc_data[g_DTV_CC.NTSC_element++] = (cc_type << 16) | (cc_data2 << 8) | (cc_data1);
8664
8665 if(pCCInfo->b608InfoEnhance)
8666 {
8667 if( ( (*pu32Dst608Len) + 16) > MAX_608_CC_LEN)
8668 {
8669 HVD_EX_MSG_ERR("u32Dst608Len+16: %d is larger than MAX_608_CC_LEN !! \n",((*pu32Dst608Len)+16));
8670 return;
8671 }
8672 }
8673 else
8674 {
8675 if( ( (*pu32Dst608Len) + 4) > MAX_608_CC_LEN)
8676 {
8677 HVD_EX_MSG_ERR("u32Dst608Len+4: %d is larger than MAX_608_CC_LEN !! \n",((*pu32Dst608Len)+4));
8678 return;
8679 }
8680 }
8681
8682 pDst608[(*pu32Dst608Len)++] = u8CC_Data1;
8683 pDst608[(*pu32Dst608Len)++] = u8CC_Data2;
8684 pDst608[(*pu32Dst608Len)++] = u8CC_Type;
8685 pDst608[(*pu32Dst608Len)++] = 0;
8686
8687 if (pCCInfo->b608InfoEnhance)
8688 {
8689 // PTS searched_pts;
8690 //search_pts(pContext, &searched_pts);
8691 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u16TmpRef&0xff);
8692 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u16TmpRef>>8)&0xff);
8693 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u16PicStruct&0xff);
8694 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u16PicStruct>>8)&0xff);
8695 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u32Pts&0xff);
8696 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>8)&0xff);
8697 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>16)&0xff);
8698 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>24)&0xff);
8699 pDst608[(*pu32Dst608Len)++] = pEhInfo608->u8UsrDataCnt;
8700
8701 // for enhance cc-608 data dump, 16bytes/pkt
8702 u32Pad = (*pu32Dst608Len) & 0xf; //align to 16 byte
8703 if(u32Pad) u32Pad = 16-u32Pad;
8704 for(j=0;j<u32Pad;j++)
8705 pDst608[(*pu32Dst608Len)++] = 0xff;
8706
8707 }
8708
8709
8710
8711
8712 }
8713 else // ATSC_CC 708
8714 {
8715 if( ( (*pu32Dst708Len) + 4) > MAX_708_CC_LEN)
8716 {
8717 HVD_EX_MSG_ERR(" u32Dst708Len+4: %d is larger than MAX_708_CC_LEN !! \n",((*pu32Dst708Len)+4));
8718 return;
8719 }
8720 pDst708[(*pu32Dst708Len)++] = u8CC_Data1;
8721 pDst708[(*pu32Dst708Len)++] = u8CC_Data2;
8722 pDst708[(*pu32Dst708Len)++] = u8CC_Type;
8723 pDst708[(*pu32Dst708Len)++] = 0;
8724
8725 }
8726 //new DTV CC header
8727
8728 }
8729
8730
8731
8732 //padding cc608
8733
8734
8735 if(u8CCMode & (CC_NTSC1|CC_NTSC2))
8736 {
8737 if (pCCInfo->b608InfoEnhance==0)
8738 { // for original cc-608 data dump, 16bytes/pkt
8739
8740
8741 u32Pad = (*pu32Dst608Len) & 0x7;
8742 if(u32Pad) u32Pad = 8 - u32Pad;
8743
8744 if((u32Pad + (*pu32Dst608Len)) > MAX_608_CC_LEN)
8745 {
8746 HVD_EX_MSG_ERR("u32Dst608Len:%d + u32Pad: %d is larger than MAX_608_CC_LEN !! \n",(*pu32Dst608Len), u32Pad);
8747 return;
8748 }
8749 for(i=0;i<u32Pad;i++)
8750 pDst608[(*pu32Dst608Len)++] = 0xff;
8751 }
8752 }
8753
8754
8755 }
8756
8757
_HVD_EX_CC_Extract_CCdata(MS_U32 u32Id,MS_U8 * pDst608Buf,MS_U32 * pu32Dst608Len,MS_U8 * pDst708Buf,MS_U32 * pu32Dst708Len,DTV_BUF_type * pUserData)8758 static void _HVD_EX_CC_Extract_CCdata(MS_U32 u32Id, MS_U8 *pDst608Buf ,MS_U32 *pu32Dst608Len,MS_U8 *pDst708Buf ,MS_U32 *pu32Dst708Len, DTV_BUF_type* pUserData)
8759 {
8760
8761 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8762 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8763 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8764
8765
8766
8767 MS_U8 * pUserDataStartBuf = &pUserData->buf[0];//&pSrcBuf[0];
8768 MS_U8 * pUserDataBuf;
8769
8770 pUserDataBuf = &pUserData->buf[0];
8771
8772
8773 HVD_CC_608EnhanceInfo stEhInfo608;
8774 stEhInfo608.u16TmpRef = pUserData->u16TempRefCnt;
8775 stEhInfo608.u16PicStruct = (MS_U16)pUserData->pic_struct;
8776 stEhInfo608.u32Pts = pUserData->pts;
8777 stEhInfo608.u8UsrDataCnt = 0;
8778
8779
8780 {
8781 MS_U32 dvb_code;
8782
8783 dvb_code = (*pUserDataBuf << 24) | (*(pUserDataBuf+1) << 16) | (*(pUserDataBuf+2) << 8) | *(pUserDataBuf+3); //(u_f(16,"provider_code") << 16) | u_f(16,"provider_code");
8784 pUserDataBuf += 4;
8785
8786 if (dvb_code == DTV_DTB1_CODE)
8787 {
8788 MS_U8 code;
8789
8790 code = *pUserDataBuf++; //u_f(8,"code");
8791
8792 if (code == DTV_CC_CODE)
8793 {
8794 _HVD_EX_CC_Parse_CC_data(u32Id, pCCInfo->u8ParsingStatus,&pUserDataBuf, pDst608Buf, pu32Dst608Len, pDst708Buf, pu32Dst708Len, &stEhInfo608);
8795 }
8796 else if (code == DTV_BAR_CODE)
8797 {
8798 _HVD_EX_CC_Parse_BAR_data(&pUserDataBuf);
8799 }
8800
8801 }
8802 else if (dvb_code == DTV_AFD_CODE)
8803 {
8804 _HVD_EX_CC_Parse_AFD_data(&pUserDataBuf);
8805 }
8806
8807 }
8808
8809
8810 if((pUserDataBuf - pUserDataStartBuf) > pUserData->len)
8811 HVD_EX_MSG_ERR("ERROR!!!! (pUserDataBuf - pUserDataStartBuf) > u32SrcLen\n");
8812
8813
8814 }
8815
8816
_HVD_EX_CC_RB_Have_Avail_Space(MS_U32 u32Id,MS_U8 u8CC608,MS_U32 u32QuerySize)8817 static MS_BOOL _HVD_EX_CC_RB_Have_Avail_Space(MS_U32 u32Id, MS_U8 u8CC608, MS_U32 u32QuerySize)
8818 {
8819 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8820 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8821 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8822
8823 MS_U32 u32RingBufVacancy = pCCInfo->u32RingBufVacancy[u8CC608];
8824 MS_U32 u32AlignCCLen;
8825
8826 if ((u32QuerySize % HVD_CCRB_PACKET_LENGTH) != 0)
8827 {
8828 u32AlignCCLen = HVD_CCRB_PACKET_LENGTH * ((u32QuerySize / HVD_CCRB_PACKET_LENGTH)+1);
8829 }
8830 else
8831 {
8832 u32AlignCCLen = u32QuerySize;
8833 }
8834
8835
8836 if(u32RingBufVacancy >= u32AlignCCLen)
8837 return TRUE;
8838 else
8839 return FALSE;
8840
8841
8842 }
8843
_HVD_EX_CC_Copy_CCdata_To_RB(MS_U32 u32Id,MS_U8 u8CC608,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)8844 static MS_BOOL _HVD_EX_CC_Copy_CCdata_To_RB(MS_U32 u32Id, MS_U8 u8CC608,MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
8845 {
8846 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8847 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8848 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8849
8850 MS_U32 u32RingBufRPAddr = pCCInfo->u32RingBufRPAddr[u8CC608];
8851 MS_U32 u32RingBufWPAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
8852 MS_U32 u32AlignCCLen;
8853
8854
8855
8856 if(u32SrcLen == 0)
8857 return FALSE;
8858
8859
8860
8861 u32AlignCCLen = u32SrcLen;
8862
8863
8864 if(pCCInfo->u32RingBufVacancy[u8CC608] < u32AlignCCLen)
8865 {
8866 HVD_EX_MSG_ERR("overflow !!!, u32RingBufVacancy: %d, u32AlignLen: %d\n",pCCInfo->u32RingBufVacancy[u8CC608], u32AlignCCLen);
8867 return TRUE;
8868 }
8869
8870
8871 if(u32RingBufWPAddr >= u32RingBufRPAddr)
8872 {
8873 if( (u32RingBufWPAddr + u32AlignCCLen) <= (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
8874 {
8875
8876 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)), (void *)pSrcBuf, u32AlignCCLen);
8877
8878
8879 if((pCCInfo->u32RingBufWPAddr[u8CC608] + u32AlignCCLen) == (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
8880 pCCInfo->u32RingBufWPAddr[u8CC608] = pCCInfo->u32RingBufStartPAddr[u8CC608];
8881 else
8882 pCCInfo->u32RingBufWPAddr[u8CC608] += u32AlignCCLen;
8883
8884 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
8885
8886 }
8887 else
8888 {
8889 MS_U32 part1_len = (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]) - u32RingBufWPAddr;
8890 MS_U32 part2_len = u32AlignCCLen - part1_len;
8891
8892
8893
8894
8895 {
8896
8897
8898 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)),(void *)pSrcBuf, part1_len);
8899
8900 pCCInfo->u32RingBufWPAddr[u8CC608] = u32RingBufWPAddr = pCCInfo->u32RingBufStartPAddr[u8CC608];
8901
8902 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)),(void *)(&pSrcBuf[part1_len]), part2_len);
8903
8904 pCCInfo->u32RingBufWPAddr[u8CC608] = u32RingBufWPAddr = pCCInfo->u32RingBufStartPAddr[u8CC608] + part2_len;
8905 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
8906 }
8907
8908 }
8909
8910 }
8911 else
8912 {
8913
8914
8915 {
8916
8917 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)), (void *)pSrcBuf, u32AlignCCLen);
8918 pCCInfo->u32RingBufWPAddr[u8CC608] += u32AlignCCLen;
8919 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
8920 }
8921
8922
8923 }
8924
8925 return FALSE;
8926 }
8927
_HVD_EX_CC_Add_PaddingData_To_608(MS_U32 u32Id,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)8928 static MS_BOOL _HVD_EX_CC_Add_PaddingData_To_608(MS_U32 u32Id, MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
8929 {
8930
8931 MS_U32 u32AlignCCLen;
8932 MS_U32 i;
8933 MS_BOOL b608OverFlow;
8934
8935 if ((u32SrcLen % HVD_CCRB_PACKET_LENGTH) != 0)
8936 {
8937 u32AlignCCLen = HVD_CCRB_PACKET_LENGTH * ((u32SrcLen / HVD_CCRB_PACKET_LENGTH)+1);
8938 }
8939 else
8940 {
8941 u32AlignCCLen = u32SrcLen;
8942 }
8943
8944
8945
8946 if(u32AlignCCLen > MAX_608_CC_LEN)
8947 {
8948 HVD_EX_MSG_ERR("u32AlignCCLen:%d > MAX_608_CC_LEN", u32AlignCCLen);
8949 return TRUE;
8950 }
8951
8952
8953
8954 for(i =0; i < (u32AlignCCLen-u32SrcLen);i++)
8955 pSrcBuf[u32SrcLen+i] = 0xff;// add padinng data
8956
8957 b608OverFlow =_HVD_EX_CC_Copy_CCdata_To_RB(u32Id, 1, &(pSrcBuf[0]), u32AlignCCLen);
8958 return b608OverFlow;
8959
8960 }
8961
_HVD_EX_CC_Add_PaddingData_To_708(MS_U32 u32Id,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)8962 static MS_BOOL _HVD_EX_CC_Add_PaddingData_To_708(MS_U32 u32Id, MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
8963 {
8964 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8965 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8966 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8967
8968 MS_VIRT *u32RingBufWAddr = (MS_VIRT *)(HVD_PA2VA(pCCInfo->u32RingBufWPAddr[0]));
8969
8970 MS_U8 u8CC_Type, u8CC_Data1, u8CC_Data2,u8Temp;
8971 MS_U16 i,j,u16Pad,u16DataCount;
8972 MS_U8 *pAddr;
8973 MS_U8 u8CCPading[MAX_708_CC_LEN];
8974 MS_BOOL b708OverFlow = FALSE;
8975 u16DataCount = 0;
8976
8977 for(j=0;j<u32SrcLen;j+=4)
8978 {
8979 u8CC_Data1 = *pSrcBuf++;
8980 u8CC_Data2 = *pSrcBuf++;
8981 u8CC_Type = *pSrcBuf++;
8982 u8Temp = *pSrcBuf++;
8983
8984 if(u8CC_Type==3) //padd_out();
8985 {
8986 if( pCCInfo->u32PktLen708 > 0 )
8987 {
8988 u16Pad = pCCInfo->u32PktLen708;
8989 for (i=0;i<u16Pad;i++)
8990 u8CCPading[u16DataCount++] = 0xff;
8991 pCCInfo->u32PktLen708 = 0;
8992 #if 1
8993
8994 pAddr = (MS_U8 *)pCCInfo->u32PktHdrAddr708;
8995 if(pAddr)
8996 {
8997 u8Temp = *pAddr;
8998 u16Pad = (u8Temp&0x3f)<<1;
8999 if((i!=0)&&(u16Pad > i))
9000 {
9001 i = i>>1;
9002 u8Temp = u8Temp - i;
9003 *pAddr = (u8Temp&0xff);
9004 }
9005 }
9006 #endif
9007 }
9008
9009 u16Pad = (pCCInfo->u32RingBufWPAddr[0] + u16DataCount) & 7;
9010 if(u16Pad) u16Pad = HVD_CCRB_PACKET_LENGTH-u16Pad;
9011 for(i=0;i<u16Pad;i++)
9012 u8CCPading[u16DataCount++] = 0xff;
9013
9014
9015 b708OverFlow =_HVD_EX_CC_Copy_CCdata_To_RB(u32Id, 0, u8CCPading, u16DataCount);
9016 if(b708OverFlow)
9017 return TRUE;
9018 pCCInfo->u32PktLen708 = (u8CC_Data1 & 0x3f)*2;
9019 if(pCCInfo->u32PktLen708 == 0) pCCInfo->u32PktLen708 = 128;
9020 u16DataCount = 0;
9021
9022 pCCInfo->u32PktHdrAddr708 = (MS_VIRT)(u32RingBufWAddr);
9023 }
9024
9025 if(pCCInfo->u32PktLen708 > 0)
9026 {
9027 u8CCPading[u16DataCount++] = u8CC_Data1;
9028 u8CCPading[u16DataCount++] = u8CC_Data2;
9029 pCCInfo->u32PktLen708 = pCCInfo->u32PktLen708 - 2;
9030 }
9031 else
9032 {
9033 pCCInfo->u32PktLen708 = 0;
9034 }
9035 }
9036
9037 if(u16DataCount > 0)
9038 {
9039 if( pCCInfo->u32PktLen708 ==0 )
9040 {
9041 u16Pad = (pCCInfo->u32RingBufWPAddr[0] + u16DataCount) & 7;
9042 if(u16Pad) u16Pad = HVD_CCRB_PACKET_LENGTH-u16Pad;
9043 for(i=0;i<u16Pad;i++)
9044 u8CCPading[u16DataCount++] = 0xff;
9045
9046 }
9047
9048 b708OverFlow = _HVD_EX_CC_Copy_CCdata_To_RB(u32Id, 0, u8CCPading, u16DataCount);
9049 if(b708OverFlow)
9050 return TRUE;
9051 }
9052
9053 return FALSE;
9054
9055 }
9056
9057
9058 ///////////////////////////////////////////////////////////////////////////////
9059 /// Closed Caption Driver Initialization
9060 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Init(MS_U32 u32Id)9061 HVD_EX_Result MDrv_HVD_EX_CC_Init(MS_U32 u32Id)
9062 {
9063 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9064 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9065 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9066 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9067
9068
9069 HVD_EX_MSG_TRACE();
9070 _DRV_HVD_Inited(u8DrvId,eRet);
9071 _DRV_HVD_EX_Entry(u8DrvId);
9072
9073 pCCInfo->u8UserDataMode = (USER_DATA_MODE_DIRECTTV_CC|USER_DATA_MODE_ATSC_CC_RAW);
9074
9075 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_USERDATA_MODE, pCCInfo->u8UserDataMode);
9076
9077 if (pCCInfo->u8ParsingStatus == 0xff)
9078 pCCInfo->u8ParsingStatus = 0x00;
9079
9080 //eRet = E_HVD_OK;
9081 _DRV_HVD_EX_RET(u8DrvId, eRet);
9082 }
9083
9084 ///////////////////////////////////////////////////////////////////////////////
9085 /// Set Closed Caption config
9086 /// @param u8Operation \b IN Digital Closed Caption Type
9087 /// @param u16BufferSize \b IN buffer size of the given hardware parser
9088 /// @param u8CC608 \b IN
9089 /// - # TRUE for CC608 parser
9090 /// - # FALSE for CC708 parser
9091 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_SetCfg(MS_U32 u32Id,MS_U8 u8Operation,MS_U16 u16BufferSize,MS_U8 u8CC608)9092 HVD_EX_Result MDrv_HVD_EX_CC_SetCfg(MS_U32 u32Id, MS_U8 u8Operation, MS_U16 u16BufferSize, MS_U8 u8CC608)
9093 {
9094
9095 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9096 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9097 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9098 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9099
9100 HVD_EX_MSG_TRACE();
9101 _DRV_HVD_Inited(u8DrvId,eRet);
9102 _DRV_HVD_EX_Entry(u8DrvId);
9103
9104
9105
9106 pCCInfo->u32RingBufLen[u8CC608] = pCCInfo->u32RingBufVacancy[u8CC608] = u16BufferSize;
9107 pCCInfo->u8ParsingStatus |= u8Operation;
9108 pCCInfo->u8ParsingStatus &= 0x07;
9109
9110 HVD_EX_MSG_DBG("u8Operation: %x, u16BufferSize:%x, u8CC608:%d\n",u8Operation, u16BufferSize,u8CC608);
9111
9112
9113 if (u8CC608==0x00)
9114 pCCInfo->b708Enable = TRUE;
9115
9116 eRet = E_HVD_EX_OK;
9117 _DRV_HVD_EX_RET(u8DrvId, eRet);
9118
9119 }
9120
9121
9122 ///////////////////////////////////////////////////////////////////////////////
9123 /// Set HVD Ring Buffer's Start Address
9124 /// @param u32StartAddress \b IN Ring Buffer's Address
9125 /// @param u8CC608 \b IN
9126 /// - # TRUE for CC608 parser
9127 /// - # FALSE for CC708 parser
9128 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Set_RB_StartAddr(MS_U32 u32Id,MS_PHY u32StartPAddress,MS_U8 u8CC608)9129 HVD_EX_Result MDrv_HVD_EX_CC_Set_RB_StartAddr(MS_U32 u32Id, MS_PHY u32StartPAddress, MS_U8 u8CC608)
9130 {
9131 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9132 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9133 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9134 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9135
9136 MS_U8 u8MiuSel;
9137 MS_U32 u32StartOffset;
9138
9139 HVD_EX_MSG_TRACE();
9140 _DRV_HVD_Inited(u8DrvId,eRet);
9141 _DRV_HVD_EX_Entry(u8DrvId);
9142
9143 _phy_to_miu_offset(u8MiuSel,u32StartOffset,u32StartPAddress);
9144
9145 pCCInfo->u8BufMiuSel[u8CC608] = u8MiuSel;
9146 /*
9147 if ( (u32StartPAddress & pCtrl->MemMap.u32MIU1BaseAddr) == pCtrl->MemMap.u32MIU1BaseAddr)
9148 {
9149 pCCInfo->bBufMiu1[u8CC608] = TRUE;
9150 }
9151 else
9152 {
9153 pCCInfo->bBufMiu1[u8CC608] = FALSE;
9154 }*/
9155
9156
9157 HVD_EX_MSG_DBG("u32StartPAddress: 0x%lx ,u8CC608: 0x%x, pCCInfo->u8BufMiuSel[u8CC608]: %d, pCtrl->MemMap.u32MIU1BaseAddr: 0x%lx, pCtrl->MemMap.u32MIU2BaseAddr: 0x%lx\n",
9158 (unsigned long)u32StartPAddress , u8CC608,pCCInfo->u8BufMiuSel[u8CC608], (unsigned long)pCtrl->MemMap.u32MIU1BaseAddr, (unsigned long)pCtrl->MemMap.u32MIU2BaseAddr);
9159
9160
9161 pCCInfo->u32RingBufStartPAddr[u8CC608] = pCCInfo->u32RingBufRPAddr[u8CC608] = pCCInfo->u32RingBufWPAddr[u8CC608] = u32StartPAddress;
9162 if(pCCInfo->u32RingBufLen[u8CC608] > 0)
9163 pCCInfo->u32RingBufVacancy[u8CC608] = pCCInfo->u32RingBufLen[u8CC608];
9164
9165
9166 _HVD_EX_CC_Update_UserData_Wptr(u32Id);
9167 pCCInfo->u32FWUsrDataRIdx = /*pCCInfo->u32FWUsrDataPrevWIdx =*/ pCCInfo->u32FWUsrDataWIdx;
9168
9169
9170 eRet = E_HVD_EX_OK;
9171 _DRV_HVD_EX_RET(u8DrvId, eRet);
9172
9173 }
9174
9175
9176 ///////////////////////////////////////////////////////////////////////////////
9177 /// Set HVD Ring Buffer's Read Address as Write Address
9178 /// @param u8CC608 \b IN
9179 /// - # TRUE for CC608 parser
9180 /// - # FALSE for CC708 parser
9181 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_SyncRB_RdAddr2WrAddr(MS_U32 u32Id,MS_U8 u8CC608)9182 HVD_EX_Result MDrv_HVD_EX_CC_SyncRB_RdAddr2WrAddr(MS_U32 u32Id, MS_U8 u8CC608)
9183 {
9184 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9185 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9186 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9187 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9188
9189
9190 pCCInfo->u32RingBufRPAddr[u8CC608] = pCCInfo->u32RingBufWPAddr[u8CC608];//u32ReadAddress;
9191 _HVD_EX_CC_Update_UserData_Wptr(u32Id);
9192 pCCInfo->u32FWUsrDataRIdx = pCCInfo->u32FWUsrDataWIdx;
9193 if(pCCInfo->u32RingBufLen[u8CC608] > 0)
9194 pCCInfo->u32RingBufVacancy[u8CC608] = pCCInfo->u32RingBufLen[u8CC608];
9195 eRet = E_HVD_EX_OK;
9196 _DRV_HVD_EX_RET(u8DrvId, eRet);
9197
9198 }
9199
9200 ///////////////////////////////////////////////////////////////////////////////
9201 /// Advance Read Address of HVD CC Ring Buffer by u32EachPacketSize
9202 /// @param u32EachPacketSize \b IN
9203 /// @param u8CC608 \b IN
9204 /// - # TRUE for CC608 parser
9205 /// - # FALSE for CC708 parser
9206 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Adv_RB_ReadAddr(MS_U32 u32Id,MS_U32 u32EachPacketSize,MS_U8 u8CC608)9207 HVD_EX_Result MDrv_HVD_EX_CC_Adv_RB_ReadAddr(MS_U32 u32Id, MS_U32 u32EachPacketSize, MS_U8 u8CC608)
9208 {
9209
9210 HVD_EX_Result eRet = E_HVD_EX_FAIL;
9211 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9212 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9213 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9214
9215 MS_U32 u32ParsedDataSize;
9216
9217 // Get the Parsed Data Size
9218 if ((u32EachPacketSize % HVD_CCRB_PACKET_LENGTH) != 0)
9219 {
9220 u32ParsedDataSize = HVD_CCRB_PACKET_LENGTH * ((u32EachPacketSize / HVD_CCRB_PACKET_LENGTH)+1); //HVD_CCRB_PACKET_LENGTH bytes alignment
9221 }
9222 else
9223 {
9224 u32ParsedDataSize = u32EachPacketSize;
9225 }
9226
9227 if(u32ParsedDataSize > (pCCInfo->u32RingBufLen[u8CC608] - pCCInfo->u32RingBufVacancy[u8CC608]))
9228 {
9229 HVD_EX_MSG_ERR("MDrv_HVD_CC_Adv_RB_ReadAddr fail!, no enough data!, vacancy: %d, u32ParsedDataSize: %d, u32RingBufLen:%d, u32RingBufRPAddr: 0x%lx, u32RingBufWPAddr: 0x%lx\n",
9230 pCCInfo->u32RingBufVacancy[u8CC608], u32ParsedDataSize, pCCInfo->u32RingBufLen[u8CC608], (unsigned long)pCCInfo->u32RingBufRPAddr[u8CC608],(unsigned long)pCCInfo->u32RingBufWPAddr[u8CC608]);
9231 return E_HVD_EX_FAIL;
9232 }
9233
9234
9235 if ((pCCInfo->u32RingBufRPAddr[u8CC608] + u32ParsedDataSize) < (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
9236 {
9237 pCCInfo->u32RingBufRPAddr[u8CC608] += u32ParsedDataSize;
9238 }
9239 else
9240 {
9241 pCCInfo->u32RingBufRPAddr[u8CC608] = (u32ParsedDataSize + pCCInfo->u32RingBufRPAddr[u8CC608] - pCCInfo->u32RingBufLen[u8CC608]);
9242 }
9243
9244 pCCInfo->u32RingBufVacancy[u8CC608] += u32ParsedDataSize ;
9245
9246 eRet = E_HVD_EX_OK;
9247 _DRV_HVD_EX_RET(u8DrvId, eRet);
9248
9249 }
9250
9251 ///////////////////////////////////////////////////////////////////////////////
9252 /// Stop HVD CC parsing
9253 /// @param u8CC608 \b IN
9254 /// - # TRUE for CC608 parser
9255 /// - # FALSE for CC708 parser
9256 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_DisableParsing(MS_U32 u32Id,MS_U8 u8CC608)9257 HVD_EX_Result MDrv_HVD_EX_CC_DisableParsing(MS_U32 u32Id, MS_U8 u8CC608)
9258 {
9259
9260 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9261 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9262 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9263 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9264
9265 if (u8CC608==0)
9266 {
9267 pCCInfo->u8ParsingStatus &= ~0x04;
9268 pCCInfo->b708Enable = FALSE;
9269 }
9270 else
9271 pCCInfo->u8ParsingStatus &= ~0x03;
9272
9273 pCCInfo->u8ParsingStatus &= 0x07;
9274
9275 eRet = E_HVD_EX_OK;
9276 _DRV_HVD_EX_RET(u8DrvId, eRet);
9277 }
9278
9279
MDrv_HVD_EX_CC_GetInfo(MS_U32 u32Id,MS_U32 selector,MS_U8 type,MS_U32 * p1,MS_U32 * p2)9280 HVD_EX_Result MDrv_HVD_EX_CC_GetInfo(MS_U32 u32Id, MS_U32 selector, MS_U8 type, MS_U32 *p1, MS_U32 *p2)
9281 {
9282
9283 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9284 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9285 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9286 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9287
9288 // Functionality select
9289 switch (selector)
9290 {
9291 case HVD_EX_CC_SELECTOR_708_SW:
9292 *p1 = (MS_U32)pCCInfo->b708Enable;
9293 break;
9294
9295 #if defined( MSOS_TYPE_LINUX )
9296 case HVD_EX_CC_SELECTOR_RINGBUFFER:
9297 {
9298 MS_U32 u32PAddr;
9299 u32PAddr = pCCInfo->u32RingBufStartPAddr[type];
9300 *p1 = u32PAddr;
9301 *p2 = (MS_U32) pCCInfo->u32RingBufLen[type];
9302 }
9303 break;
9304 #endif
9305
9306 default:
9307 *p1 = *p2 = 0;
9308 break;
9309 }
9310 eRet = E_HVD_EX_OK;
9311 _DRV_HVD_EX_RET(u8DrvId, eRet);
9312 }
9313
9314
MDrv_HVD_EX_CC_IsHvdRstDone(MS_U32 u32Id,MS_U8 type)9315 MS_BOOL MDrv_HVD_EX_CC_IsHvdRstDone(MS_U32 u32Id, MS_U8 type)
9316 {
9317 MS_BOOL bRet = FALSE;
9318
9319 bRet = TRUE;
9320
9321 return bRet;
9322 }
9323
9324 ///////////////////////////////////////////////////////////////////////////////
9325 /// Get Overflow Status of HVD CC Ring Buffer
9326 /// @param u8CC608 \b IN
9327 /// - # TRUE for CC608 parser
9328 /// - # FALSE for CC708 parser
9329 /// Return value:: Overflow Status Flag
9330 ////////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_GetOverflowStatus(MS_U32 u32Id,MS_U8 u8CC608)9331 MS_U8 MDrv_HVD_EX_CC_GetOverflowStatus(MS_U32 u32Id, MS_U8 u8CC608)
9332 {
9333
9334 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9335 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9336 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9337
9338 MS_BOOL bOverFlow = pCCInfo->bOverFlow[u8CC608];
9339 pCCInfo->bOverFlow[u8CC608] = FALSE;
9340 return (bOverFlow);
9341 }
9342
9343
9344
9345
9346
9347 ///////////////////////////////////////////////////////////////////////////////
9348 /// Get Write Address of HVD CC Ring Buffer
9349 /// @param u8CC608 \b IN
9350 /// - # TRUE for CC608 parser
9351 /// - # FALSE for CC708 parser
9352 /// Return value:: Write Address
9353 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Get_RB_WriteAddr(MS_U32 u32Id,MS_U8 u8CC608)9354 MS_U32 MDrv_HVD_EX_CC_Get_RB_WriteAddr(MS_U32 u32Id, MS_U8 u8CC608)
9355 {
9356
9357 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9358 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9359 MS_U32 u32UserDataIdxSize = 0;
9360 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
9361 MS_U32 u32UserDataSize = 0;
9362 MS_VIRT u32UserDataAddr = 0;
9363 DTV_BUF_type* pHVD_User_Data = NULL;
9364
9365 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9366 MS_U32 u32FwParseCnt;
9367 MS_U32 u32PAddr;
9368
9369
9370 if ((pCCInfo->u8ParsingStatus == 0xff) || (pCCInfo->u8ParsingStatus == 0x00))
9371 {
9372
9373 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
9374 /*
9375 if(!pCCInfo->bBufMiu1[u8CC608])
9376 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9377 */
9378 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
9379 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9380
9381
9382 return u32PAddr;
9383 }
9384
9385 u32UserDataIdxSize = (MS_U32)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
9386
9387 u32UsrDataIdxWptr =_HVD_EX_CC_Update_UserData_Wptr(u32Id);
9388
9389
9390
9391 if (pCCInfo->u32FWUsrDataRIdx == u32UsrDataIdxWptr)
9392 {
9393 // User Data Buffer Empty
9394 HVD_EX_MSG_DBG("RIdx(%d) == WIdx(%d) , empty !!!\n", pCCInfo->u32FWUsrDataRIdx,u32UsrDataIdxWptr);
9395 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
9396
9397 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
9398 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9399
9400 return u32PAddr;
9401
9402 }
9403 else if (u32UsrDataIdxWptr > pCCInfo->u32FWUsrDataRIdx)
9404 {
9405 u32FwParseCnt = u32UsrDataIdxWptr - pCCInfo->u32FWUsrDataRIdx;
9406 }
9407 else// pCCInfo->u32FWUsrDataWIdx < pCCInfo->u32FWUsrDataRIdx
9408 {
9409 u32FwParseCnt = u32UserDataIdxSize - (pCCInfo->u32FWUsrDataRIdx - u32UsrDataIdxWptr);
9410 }
9411
9412 HVD_EX_MSG_DBG("u32FwParseCnt(%d) !!!, pCCInfo->u32RingBufWPAddr[%d]: 0x%lx\n", u32FwParseCnt, u8CC608,(unsigned long)pCCInfo->u32RingBufWPAddr[u8CC608] );
9413
9414 MS_BOOL b608OverFlow = FALSE, b708OverFlow = FALSE;
9415 MS_U8 *pCC608buf = &(pCCInfo->u8CC608buf[0]);
9416 MS_U8 *pCC708buf = &(pCCInfo->u8CC708buf[0]);
9417 MS_U32 u32CC608Len = 0;
9418 MS_U32 u32CC708Len = 0;
9419
9420
9421
9422
9423 while(u32FwParseCnt)
9424 {
9425
9426
9427
9428 if( (!_HVD_EX_CC_RB_Have_Avail_Space(u32Id, 1, MAX_608_CC_LEN)) || (!_HVD_EX_CC_RB_Have_Avail_Space(u32Id, 0, MAX_708_CC_LEN)))
9429 {
9430 HVD_EX_MSG_DBG("not have available space!!!\n");
9431 break;
9432 }
9433 u32UserDataAddr = MDrv_HVD_EX_GetUserData_Packet(u32Id, pCCInfo->u32FWUsrDataRIdx, (MS_U32*)&u32UserDataSize);
9434 u32UserDataAddr += pCtrl->MemMap.u32CodeBufVAddr; // change to virtual address
9435
9436 pHVD_User_Data = (DTV_BUF_type*)u32UserDataAddr;
9437
9438 u32CC608Len = 0;
9439 u32CC708Len = 0;
9440
9441
9442
9443 _HVD_EX_CC_Extract_CCdata(u32Id, pCC608buf, &u32CC608Len, pCC708buf, &u32CC708Len, pHVD_User_Data);
9444
9445 if(u32CC608Len > 0)
9446 b608OverFlow =_HVD_EX_CC_Add_PaddingData_To_608(u32Id, &(pCCInfo->u8CC608buf[0]), u32CC608Len);
9447
9448
9449
9450
9451 if(u32CC708Len > 0)
9452 b708OverFlow = _HVD_EX_CC_Add_PaddingData_To_708(u32Id, &(pCCInfo->u8CC708buf[0]), u32CC708Len);
9453 //b708OverFlow =_HVD_CC_Copy_CCdata_To_RB(0, &CC708buf[0], u32CC708Len);
9454
9455
9456
9457
9458 if(b608OverFlow)
9459 {
9460 HVD_EX_MSG_ERR("##### Critical error!!!! b608OverFlow: %d!!!\n",b608OverFlow);
9461 pCCInfo->bOverFlow[1] = TRUE;
9462 }
9463
9464 if(b708OverFlow)
9465 {
9466 HVD_EX_MSG_ERR("##### Critical error!!!! b708OverFlow:%d !!!\n",b708OverFlow);
9467 pCCInfo->bOverFlow[0] = TRUE;
9468 }
9469
9470
9471
9472 pCCInfo->u32FWUsrDataRIdx++;
9473
9474 if (pCCInfo->u32FWUsrDataRIdx >= u32UserDataIdxSize)
9475 {
9476 pCCInfo->u32FWUsrDataRIdx = 0;
9477 }
9478
9479
9480 u32FwParseCnt--;
9481 }
9482
9483
9484 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
9485 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
9486 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9487
9488 return u32PAddr;
9489
9490
9491
9492 }
9493
9494
9495 ///////////////////////////////////////////////////////////////////////////////
9496 /// Get Read Address of HVD CC Ring Buffer
9497 /// @param u8CC608 \b IN
9498 /// - # TRUE for CC608 parser
9499 /// - # FALSE for CC708 parser
9500 /// Return value:: Read Address
9501 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Get_RB_ReadAddr(MS_U32 u32Id,MS_U8 u8CC608)9502 MS_U32 MDrv_HVD_EX_CC_Get_RB_ReadAddr(MS_U32 u32Id, MS_U8 u8CC608)
9503 {
9504
9505 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9506 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9507 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9508
9509 MS_U32 u32PAddr = pCCInfo->u32RingBufRPAddr[u8CC608];
9510 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
9511 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
9512
9513 return u32PAddr;
9514
9515 }
9516
9517 ///////////////////////////////////////////////////////////////////////////////
9518 /// Enhance CC info mode, only support cc608
9519 /// @param bEnable \b IN
9520 /// - # TRUE for enhance to dump the pts/tmp_ref info
9521 /// - # FALSE for original
9522 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_InfoEnhanceMode(MS_U32 u32Id,MS_BOOL bEnable)9523 MS_BOOL MDrv_HVD_EX_CC_InfoEnhanceMode(MS_U32 u32Id, MS_BOOL bEnable)
9524 {
9525
9526 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9527 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9528 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
9529
9530 pCCInfo->b608InfoEnhance = bEnable;
9531
9532 return TRUE;
9533 }
9534
9535
9536
9537
MDrv_HVD_EX_SetExternal_CC608_Buffer(MS_U32 u32Id,MS_PHY u32Addr,MS_U32 u32Len)9538 HVD_EX_Result MDrv_HVD_EX_SetExternal_CC608_Buffer(MS_U32 u32Id, MS_PHY u32Addr, MS_U32 u32Len)
9539 {
9540 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9541 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9542 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9543 MS_U8 u8UserDataMode = (USER_DATA_MODE_DIRECTTV_CC|USER_DATA_MODE_ATSC_CC_RAW|USER_DATA_MODE_EXTERNAL_CC_BUFFER);
9544 MS_U32 u32CCinfo;
9545
9546 HVD_EX_MSG_TRACE();
9547 _DRV_HVD_Inited(u8DrvId,eRet);
9548 _DRV_HVD_EX_Entry(u8DrvId);
9549
9550 u32Addr <<= 10;// 1kbytes unit
9551 u32Len <<= 10; // 1kbytes unit
9552
9553 // Read Ptr (4 bytes), Write Ptr (4 bytes), Latch Bit (2 bytes), overflow (2 bytes), Miu Base Address (4 bytes)
9554 MS_U32 *u32ReadPtr = (MS_U32 *)(HVD_PA2VA(u32Addr));
9555 MS_U32 *u32WritePtr = (MS_U32 *)(HVD_PA2VA(u32Addr+4));
9556 MS_U32 *u32LatchOverflow = (MS_U32 *)(HVD_PA2VA(u32Addr+8));
9557 MS_U32 *u32FWBinaryAddr = (MS_U32 *)(HVD_PA2VA(u32Addr+12));
9558
9559 *u32ReadPtr = *u32WritePtr = u32Addr+EXT_608_CC_DATA_ALIGN;
9560 *u32LatchOverflow = 0;
9561
9562
9563 u32Addr -= pCtrl->MemMap.u32FWBinaryAddr;
9564 *u32FWBinaryAddr = pCtrl->MemMap.u32FWBinaryAddr;
9565
9566 u32CCinfo = ((u32Addr >> 10) << 8) & 0xffffff00; //arg[31:8] * 1kbytes
9567 u32CCinfo |= ((u32Len >> 10) & 0xff); //arg[7:0] *1kbytes
9568
9569 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_USERDATA_MODE, u8UserDataMode);
9570
9571 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_EXTERNAL_CC_608_BUF, u32CCinfo);
9572
9573 _DRV_HVD_EX_RET(u8DrvId, eRet);
9574
9575
9576 }
9577
MDrv_HVD_EX_SetExternal_CC708_Buffer(MS_U32 u32Id,MS_PHY u32Addr,MS_U32 u32Len)9578 HVD_EX_Result MDrv_HVD_EX_SetExternal_CC708_Buffer(MS_U32 u32Id, MS_PHY u32Addr, MS_U32 u32Len)
9579 {
9580
9581 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9582 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9583 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9584 MS_U8 u8UserDataMode = (USER_DATA_MODE_DIRECTTV_CC|USER_DATA_MODE_ATSC_CC_RAW|USER_DATA_MODE_EXTERNAL_CC_BUFFER);
9585 MS_U32 u32CCinfo;
9586
9587 HVD_EX_MSG_TRACE();
9588 _DRV_HVD_Inited(u8DrvId,eRet);
9589 _DRV_HVD_EX_Entry(u8DrvId);
9590
9591 u32Addr <<= 10;// 1kbytes unit
9592 u32Len <<= 10; // 1kbytes unit
9593
9594 // Read Ptr (4 bytes), Write Ptr (4 bytes), Latch Bit (2 bytes), overflow (2 bytes), Miu Base Address (4 bytes)
9595 MS_U32 *u32ReadPtr = (MS_U32 *)(HVD_PA2VA(u32Addr));
9596 MS_U32 *u32WritePtr = (MS_U32 *)(HVD_PA2VA(u32Addr+4));
9597 MS_U32 *u32LatchOverflow = (MS_U32 *)(HVD_PA2VA(u32Addr+8));
9598 MS_U32 *u32FWBinaryAddr = (MS_U32 *)(HVD_PA2VA(u32Addr+12));
9599
9600
9601 MS_U32 i;
9602 MS_U8 *u8ResvAddr = (MS_U8 *)((HVD_PA2VA(u32Addr))+EXT_CC_INFO_LENGTH);
9603 for(i=0;i< (EXT_708_CC_DATA_ALIGN- EXT_CC_INFO_LENGTH) ;i++)
9604 {
9605 u8ResvAddr[i] = 0xff;
9606 }
9607
9608
9609
9610 *u32ReadPtr = *u32WritePtr = u32Addr+EXT_708_CC_DATA_ALIGN;
9611 *u32LatchOverflow = 0;
9612
9613 u32Addr -= pCtrl->MemMap.u32FWBinaryAddr;
9614 *u32FWBinaryAddr = pCtrl->MemMap.u32FWBinaryAddr;
9615
9616
9617 u32CCinfo = ((u32Addr >> 10) << 8) & 0xffffff00; //arg[31:8] * 1kbytes
9618 u32CCinfo |= ((u32Len >> 10) & 0xff); //arg[7:0] *1kbytes
9619
9620 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_USERDATA_MODE, u8UserDataMode);
9621
9622 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_EXTERNAL_CC_708_BUF, u32CCinfo);
9623
9624 _DRV_HVD_EX_RET(u8DrvId, eRet);
9625 }
9626
9627
9628 //-----------------------------------------------------------------------------
9629 /// @brief \b Function \b Name: MDrv_HVD_EX_ShowFirstFrameDirect()
9630 /// @brief \b Function \b Description: Push First Frame to Display Queue Directly
9631 /// @param -bEnable \b IN : Enable/Disable
9632 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
9633 //-----------------------------------------------------------------------------
MDrv_HVD_EX_ShowFirstFrameDirect(MS_U32 u32Id,MS_BOOL bEnable)9634 HVD_EX_Result MDrv_HVD_EX_ShowFirstFrameDirect(MS_U32 u32Id, MS_BOOL bEnable)
9635 {
9636 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9637 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9638
9639 HVD_EX_MSG_TRACE();
9640 _DRV_HVD_Inited(u8DrvId,eRet);
9641 _DRV_HVD_EX_Entry(u8DrvId);
9642
9643 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SHOW_FIRST_FRAME_DIRECT, bEnable);
9644
9645 _DRV_HVD_EX_RET(u8DrvId, eRet);
9646 }
9647
9648 //-----------------------------------------------------------------------------
9649 /// @brief \b Function \b Name: MDrv_HVD_EX_AVCResizeDosDispPendBuf()
9650 /// @brief \b Function \b Description: Resize disp pending buffer size for display outside mode(dos),
9651 /// @param -u32Size \b IN : size of display pending buffer
9652 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
9653 //-----------------------------------------------------------------------------
MDrv_HVD_EX_AVCResizeDosDispPendBuf(MS_U32 u32Id,MS_U32 u32Size)9654 HVD_EX_Result MDrv_HVD_EX_AVCResizeDosDispPendBuf(MS_U32 u32Id, MS_U32 u32Size)
9655 {
9656 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9657 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9658
9659 HVD_EX_MSG_TRACE();
9660 _DRV_HVD_Inited(u8DrvId,eRet);
9661 _DRV_HVD_EX_Entry(u8DrvId);
9662
9663 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_RESIZE_DOS_DISP_PEND_BUF, u32Size);
9664
9665 _DRV_HVD_EX_RET(u8DrvId, eRet);
9666 }
9667 //-----------------------------------------------------------------------------
9668 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDmxFrameRate()
9669 /// @brief \b Function \b Description: set the demuxer prefered frame rate.
9670 /// @param -eMode \b IN : mode type
9671 /// @return -The result is successful or not
9672 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDmxFrameRate(MS_U32 u32Id,MS_U32 u32Value)9673 HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRate(MS_U32 u32Id, MS_U32 u32Value)
9674 {
9675 return (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DMX_FRAMERATE, u32Value);
9676 }
9677
9678 //-----------------------------------------------------------------------------
9679 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDmxFrameRateBase()
9680 /// @brief \b Function \b Description: set the demuxer prefered frame rate.
9681 /// @param -eMode \b IN : mode type
9682 /// @return -The result is successful or not
9683 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDmxFrameRateBase(MS_U32 u32Id,MS_U32 u32Value)9684 HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRateBase(MS_U32 u32Id, MS_U32 u32Value)
9685 {
9686 return (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DMX_FRAMERATEBASE, u32Value);
9687 }
9688
9689 //-----------------------------------------------------------------------------
9690 /// @brief \b Function \b Name: MDrv_HVD_EX_GetSupport2ndMVOPInterface()
9691 /// @brief \b Function \b Description: Get if support 2nd MVOP interface.
9692 /// @param : none
9693 /// @return -The result is true or false
9694 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetSupport2ndMVOPInterface(void)9695 MS_BOOL MDrv_HVD_EX_GetSupport2ndMVOPInterface(void)
9696 {
9697 return HAL_HVD_EX_GetSupport2ndMVOPInterface();
9698 }
9699
9700 //-----------------------------------------------------------------------------
9701 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVPUSecureMode()
9702 /// @brief \b Function \b Description: Set secure mode for HVD Drv.
9703 /// @param : none
9704 /// @return -The result is true or false
9705 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVPUSecureMode(MS_BOOL bEnable)9706 MS_BOOL MDrv_HVD_EX_SetVPUSecureMode(MS_BOOL bEnable)
9707 {
9708 pHVDDrvContext->bVPUIsSecureMode = bEnable;
9709 return TRUE;
9710 }
9711
MDrv_HVD_EX_OnePendingBufferMode(MS_U32 u32Id,MS_BOOL bEnable)9712 HVD_EX_Result MDrv_HVD_EX_OnePendingBufferMode(MS_U32 u32Id,MS_BOOL bEnable)
9713 {
9714 HVD_EX_Result eRet = E_HVD_EX_OK;
9715
9716 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9717
9718 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bOnePendingBuffer = bEnable;
9719 _DRV_HVD_EX_RET(u8DrvId, eRet);
9720 }
9721
MDrv_HVD_EX_TsInBbuMode(MS_U32 u32Id,MS_BOOL bDisable)9722 HVD_EX_Result MDrv_HVD_EX_TsInBbuMode(MS_U32 u32Id,MS_BOOL bDisable)
9723 {
9724 HVD_EX_Result eRet = E_HVD_EX_OK;
9725
9726 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9727
9728 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bDisableTspInBbuMode = bDisable;
9729 _DRV_HVD_EX_RET(u8DrvId, eRet);
9730 }
9731
MDrv_HVD_EX_IapGnBufShareBWMode(MS_U32 u32Id,MS_BOOL bEnable,MS_PHY u32IapGnBufAddr,MS_U32 u32IapGnBufSize)9732 HVD_EX_Result MDrv_HVD_EX_IapGnBufShareBWMode(MS_U32 u32Id,MS_BOOL bEnable, MS_PHY u32IapGnBufAddr, MS_U32 u32IapGnBufSize)
9733 {
9734 HVD_EX_Result eRet = E_HVD_EX_OK;
9735
9736 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9737
9738 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stIapGnShBWMode.bEnable = bEnable;
9739 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stIapGnShBWMode.u32IapGnBufAddr = u32IapGnBufAddr;
9740 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stIapGnShBWMode.u32IapGnBufSize = u32IapGnBufSize;
9741 _DRV_HVD_EX_RET(u8DrvId, eRet);
9742 }
9743
9744 //-----------------------------------------------------------------------------
9745 /// @brief \b Function \b Name: MDrv_HVD_EX_FRC_OnlyShowTopField()
9746 /// @brief \b Function \b Description: enable/disable only show top filed for FRC mode
9747 /// @param -bEnable \b IN :enable/disable
9748 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
9749 //-----------------------------------------------------------------------------
MDrv_HVD_EX_FRC_OnlyShowTopField(MS_U32 u32Id,MS_BOOL bEnable)9750 HVD_EX_Result MDrv_HVD_EX_FRC_OnlyShowTopField(MS_U32 u32Id, MS_BOOL bEnable)
9751 {
9752 HVD_EX_Result eRet = E_HVD_EX_OK;
9753 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9754
9755 HVD_EX_MSG_TRACE();
9756 _DRV_HVD_Inited(u8DrvId,eRet);
9757 _DRV_HVD_EX_Entry(u8DrvId);
9758
9759 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_ONLY_SHOW_TOP_FIELD, bEnable);
9760
9761 _DRV_HVD_EX_RET(u8DrvId, eRet);
9762 }
9763
9764 //-----------------------------------------------------------------------------
9765 /// @brief \b Function \b Name: MDrv_HVD_EX_DisableEsFullStop()
9766 /// @brief \b Function \b Description: enable/disable es full stop mode
9767 /// @param -bDisable \b IN :enable/disable
9768 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
9769 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DisableEsFullStop(MS_U32 u32Id,MS_BOOL bDisable)9770 HVD_EX_Result MDrv_HVD_EX_DisableEsFullStop(MS_U32 u32Id, MS_BOOL bDisable)
9771 {
9772 HVD_EX_Result eRet = E_HVD_EX_OK;
9773 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9774
9775 if(bDisable)
9776 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, FALSE);
9777 else
9778 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, TRUE);
9779
9780 _DRV_HVD_EX_RET(u8DrvId, eRet);
9781 }
9782
9783 //-----------------------------------------------------------------------------
9784 /// @brief \b Function \b Name: MDrv_HVD_EX_DirectSTCMode()
9785 /// @brief \b Function \b Description: enable/disable direct stc mode with u32StcInMs
9786 /// @param -u32StcInMs \b IN : enable with stc value/disable
9787 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
9788 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DirectSTCMode(MS_U32 u32Id,MS_U32 u32StcInMs)9789 HVD_EX_Result MDrv_HVD_EX_DirectSTCMode(MS_U32 u32Id, MS_U32 u32StcInMs)
9790 {
9791 HVD_EX_Result eRet = E_HVD_EX_OK;
9792 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9793 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
9794 HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
9795
9796 HVD_EX_MSG_TRACE();
9797 _DRV_HVD_Inited(u8DrvId,eRet);
9798 _DRV_HVD_EX_Entry(u8DrvId);
9799
9800 if (HWDEC_EVD_LITE == HAL_HVD_EX_GetCidx(u32Id))
9801 {
9802 if (u32StcInMs == 0xFFFFFFFF)
9803 {
9804 HVD_EX_MSG_DBG("[EVD LITE] disable direct stc mode \n");
9805 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIRECT_STC_MODE, FALSE);
9806 pCtrl->bDirectSTCModeEnabled = FALSE;
9807 }
9808 else
9809 {
9810 pShm->u32DirectStcInMs = u32StcInMs;
9811 MsOS_FlushMemory();
9812
9813 if (pCtrl->bDirectSTCModeEnabled == FALSE)
9814 {
9815 HVD_EX_MSG_DBG("[EVD LITE] enable direct stc mode \n");
9816 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIRECT_STC_MODE, TRUE);
9817 pCtrl->bDirectSTCModeEnabled = TRUE;
9818 }
9819 }
9820 }
9821 else
9822 {
9823 // only Kano HWDEC_EVD_LITE need this patch
9824 }
9825
9826 _DRV_HVD_EX_RET(u8DrvId, eRet);
9827 }
9828
MDrv_HVD_EX_PreSetMFCodecMode(MS_U32 u32Id,HVD_EX_MFCodec_mode eMFCodecMode)9829 HVD_EX_Result MDrv_HVD_EX_PreSetMFCodecMode(MS_U32 u32Id, HVD_EX_MFCodec_mode eMFCodecMode)
9830 {
9831 HVD_EX_Result eRet = E_HVD_EX_OK;
9832
9833 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9834
9835 switch(eMFCodecMode)
9836 {
9837 case E_HVD_EX_MFCODEC_DEFAULT:
9838 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eMFCodecMode = E_HVD_DEF_MFCODEC_DEFAULT;
9839 break;
9840 case E_HVD_EX_MFCODEC_FORCE_ENABLE:
9841 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eMFCodecMode = E_HVD_DEF_MFCODEC_FORCE_ENABLE;
9842 break;
9843 case E_HVD_EX_MFCODEC_FORCE_DISABLE:
9844 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eMFCodecMode = E_HVD_DEF_MFCODEC_FORCE_DISABLE;
9845 break;
9846 default:
9847 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eMFCodecMode = E_HVD_DEF_MFCODEC_DEFAULT;
9848 break;
9849 }
9850
9851 _DRV_HVD_EX_RET(u8DrvId, eRet);
9852 }
9853
MDrv_HVD_EX_PreSetDisplayMode(MS_U32 u32Id,HVD_EX_Display_mode eDisplayMode)9854 HVD_EX_Result MDrv_HVD_EX_PreSetDisplayMode(MS_U32 u32Id, HVD_EX_Display_mode eDisplayMode)
9855 {
9856 HVD_EX_Result eRet = E_HVD_EX_OK;
9857
9858 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9859
9860 switch(eDisplayMode)
9861 {
9862 case E_HVD_EX_DISPLAY_MODE_MCU:
9863 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eDisplayMode = E_HVD_DISPLAY_MODE_MCU;
9864 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE);
9865 break;
9866 case E_HVD_EX_DISPLAY_MODE_HARDWIRE:
9867 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eDisplayMode = E_HVD_DISPLAY_MODE_HARDWIRE;
9868 break;
9869 default:
9870 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eDisplayMode = E_HVD_DISPLAY_MODE_DEFAULT;
9871 break;
9872 }
9873
9874 _DRV_HVD_EX_RET(u8DrvId, eRet);
9875 }
9876
MDrv_HVD_EX_PreSetForce8BitMode(MS_U32 u32Id,MS_BOOL bForce8BitMode)9877 HVD_EX_Result MDrv_HVD_EX_PreSetForce8BitMode(MS_U32 u32Id, MS_BOOL bForce8BitMode)
9878 {
9879 HVD_EX_Result eRet = E_HVD_EX_OK;
9880 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9881
9882 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bForce8BitMode = bForce8BitMode;
9883 _DRV_HVD_EX_RET(u8DrvId, eRet);
9884 }
9885
MDrv_HVD_EX_PreSetVdecFeature(MS_U32 u32Id,HVD_EX_Feature eVdecFeature)9886 HVD_EX_Result MDrv_HVD_EX_PreSetVdecFeature(MS_U32 u32Id, HVD_EX_Feature eVdecFeature)
9887 {
9888 HVD_EX_Result eRet = E_HVD_EX_OK;
9889 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9890
9891 pHVDDrvContext->gHVDPreCtrl[u8DrvId].eVdecFeature = eVdecFeature;
9892 HVD_EX_MSG_DBG("MDrv_HVD_EX_PreSetVdecFeature 0x%x\n", eVdecFeature);
9893 _DRV_HVD_EX_RET(u8DrvId, eRet);
9894 }
9895 //-----------------------------------------------------------------------------
9896 /// @brief \b Function \b Name: MDrv_HVD_EX_SetPTSUsecMode()
9897 /// @brief \b Function \b Description: enable/disable PTS output by micro second level,
9898 /// @param -bEnable \b IN :enable/disable
9899 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
9900 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetPTSUsecMode(MS_U32 u32Id,MS_BOOL bEnable)9901 HVD_EX_Result MDrv_HVD_EX_SetPTSUsecMode(MS_U32 u32Id, MS_BOOL bEnable)
9902 {
9903 HVD_EX_Result eRet = E_HVD_EX_OK;
9904 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9905
9906 HVD_EX_MSG_TRACE();
9907 _DRV_HVD_Inited(u8DrvId,eRet);
9908 _DRV_HVD_EX_Entry(u8DrvId);
9909
9910 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_PTS_US_MODE, bEnable);
9911
9912 _DRV_HVD_EX_RET(u8DrvId, eRet);
9913 }
9914
9915 //-----------------------------------------------------------------------------
9916 /// @brief \b Function \b Name: MDrv_HVD_EX_PVRTimeShiftSeamlessMode()
9917 /// @brief \b Function \b Description:
9918 /// @param -bEnable \b IN :
9919 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
9920 //-----------------------------------------------------------------------------
MDrv_HVD_EX_PVRTimeShiftSeamlessMode(MS_U32 u32Id,MS_U8 u8Arg)9921 HVD_EX_Result MDrv_HVD_EX_PVRTimeShiftSeamlessMode(MS_U32 u32Id, MS_U8 u8Arg)
9922 {
9923 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
9924 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
9925
9926 HVD_EX_MSG_TRACE();
9927 _DRV_HVD_Inited(u8DrvId,eRet);
9928 _DRV_HVD_EX_Entry(u8DrvId);
9929
9930 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PVR_SEAMLESS_TIMESHIFT, u8Arg);
9931
9932 if ((u8Arg == 1) || (u8Arg == 2)) //u8Arg=1 needs about 50ms, u8Arg=2 needs about 30ms
9933 {
9934 MS_U32 u32Status = (u8Arg==1)?(E_HVD_SEAMLESS_PAUSE_DECODE):(E_HVD_SEAMLESS_RESET_HW_DONE);
9935 MS_U32 u32Times = 0;
9936
9937 HVD_EX_MSG_DBG("TS Seamless. Arg=%d, polling status start at %d \n", u8Arg, HVD_GetSysTime_ms());
9938
9939 while (1)
9940 {
9941 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TS_SEAMLESS_STATUS) & u32Status)
9942 {
9943 HVD_EX_MSG_DBG("TS Seamless status change done. Arg=%d. Status=0x%x at %d \n", u8Arg, u32Status, HVD_GetSysTime_ms());
9944 break;
9945 }
9946
9947 u32Times++;
9948 HVD_Delay_ms(1);
9949
9950 if (u32Times > 500)
9951 {
9952 HVD_EX_MSG_ERR("Timeout!!! TS Seamless status change is not finished. Arg=%d. Status=0x%x at %d \n", u8Arg, u32Status, HVD_GetSysTime_ms());
9953 eRet = E_HVD_EX_FAIL;
9954 break;
9955 }
9956 }
9957 }
9958
9959 if (u8Arg > 0)
9960 {
9961 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag = (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & ~HVD_INIT_MAIN_MASK) | HVD_INIT_MAIN_FILE_TS;
9962 }
9963
9964
9965 if (u8Arg == 2)
9966 {
9967 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_VDEAD, TRUE);
9968 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
9969
9970 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVOID_PTS_TBL_OVERFLOW, TRUE);
9971
9972 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, TRUE);
9973 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, TRUE);
9974 }
9975
9976 _DRV_HVD_EX_RET(u8DrvId, eRet);
9977 }
9978
MDrv_HVD_EX_CHIP_Capability(void * pHWCap)9979 MS_U8 MDrv_HVD_EX_CHIP_Capability(void* pHWCap)
9980 {
9981 return HAL_VPU_EX_CHIP_Capability(pHWCap);
9982 }
9983
MDrv_HVD_EX_GetDVSupportProfiles(MS_U32 * pu32DVSupportProfiles)9984 HVD_EX_Result MDrv_HVD_EX_GetDVSupportProfiles(MS_U32 *pu32DVSupportProfiles)
9985 {
9986 HVD_EX_Result eRet = E_HVD_EX_FAIL;
9987
9988 if (pu32DVSupportProfiles == NULL)
9989 {
9990 //E_HVD_EX_FAIL
9991 }
9992 else
9993 {
9994 *pu32DVSupportProfiles = HAL_HVD_EX_GetDVSupportProfiles();
9995 return E_HVD_EX_OK;
9996 }
9997
9998 return eRet;
9999 }
10000
MDrv_HVD_EX_GetDVSupportHighestLevel(MS_U32 u32DVProfile,MS_U32 * pu32DVLevel)10001 HVD_EX_Result MDrv_HVD_EX_GetDVSupportHighestLevel(MS_U32 u32DVProfile, MS_U32 *pu32DVLevel)
10002 {
10003 HVD_EX_Result eRet = E_HVD_EX_FAIL;
10004
10005 if (pu32DVLevel == NULL)
10006 {
10007 //E_HVD_EX_FAIL
10008 }
10009 else
10010 {
10011 *pu32DVLevel = HAL_HVD_EX_GetDVSupportHighestLevel(u32DVProfile);
10012 eRet = E_HVD_EX_OK;
10013 }
10014
10015 return eRet;
10016 }
10017
MDrv_HVD_EX_BBU_Proc(MS_U32 u32Id)10018 void MDrv_HVD_EX_BBU_Proc(MS_U32 u32Id)
10019 {
10020 HAL_HVD_EX_BBU_Proc(u32Id);
10021 }
MDrv_HVD_EX_BBU_StopProc(MS_U32 u32Id)10022 void MDrv_HVD_EX_BBU_StopProc(MS_U32 u32Id)
10023 {
10024 HAL_HVD_EX_BBU_StopProc(u32Id);
10025 }
MDrv_HVD_EX_SetCMAInformation(void * cmaInitParam)10026 void MDrv_HVD_EX_SetCMAInformation(void* cmaInitParam)
10027 {
10028 pHVDDrvContext->bCMAUsed = TRUE;
10029 #if defined(MSOS_TYPE_LINUX) && defined(SUPPORT_CMA)
10030 memcpy((void*)(pHVDDrvContext->cmaInitParam),cmaInitParam,sizeof(struct CMA_Pool_Init_Param)*2);
10031 #endif
10032 }
10033
MDrv_HVD_EX_GetFrameBufferDefaultSize(HVD_EX_CodecType eCodecType)10034 MS_SIZE MDrv_HVD_EX_GetFrameBufferDefaultSize(HVD_EX_CodecType eCodecType)
10035 {
10036 return HAL_VPU_EX_GetFrameBufferDefaultSize((VPU_EX_CodecType)eCodecType);
10037 }
10038
10039 #ifdef CMA_DRV_DIRECT_INIT
MDrv_HVD_EX_GetCMAMemSize(HVD_EX_CodecType eCodecType,HVD_EX_SrcMode eSrcMode,MS_U64 * offset,MS_SIZE * length,MS_U64 total_length,MS_SIZE unUseSize)10040 MS_BOOL MDrv_HVD_EX_GetCMAMemSize(HVD_EX_CodecType eCodecType, HVD_EX_SrcMode eSrcMode,
10041 MS_U64 *offset, MS_SIZE *length, MS_U64 total_length, MS_SIZE unUseSize)
10042 {
10043 return HAL_VPU_EX_GetCMAMemSize((VPU_EX_CodecType)eCodecType, (VPU_EX_SrcMode)eSrcMode, offset, length, total_length, unUseSize);
10044 }
10045 #endif
10046
MDrv_HVD_EX_GetFbMemUsageSize(HVD_EX_FbMemUsage_Param * pInfo)10047 HVD_EX_Result MDrv_HVD_EX_GetFbMemUsageSize(HVD_EX_FbMemUsage_Param *pInfo)
10048 {
10049 HVD_EX_Result eRet = E_HVD_EX_FAIL;
10050
10051 #if SUPPORT_EVD
10052 if (pInfo->eCodecType == E_HVD_EX_HEVC)
10053 {
10054 MS_U32 _u32MemUsageSize = 0;
10055 eRet = _HVD_EX_DemuxTS_ParseHEVCSPS(pInfo->u32DataVAddr, pInfo->u16DataSize, &_u32MemUsageSize);
10056 if (eRet == E_HVD_EX_OK)
10057 {
10058 pInfo->u32MemUsageSize = _u32MemUsageSize;
10059 }
10060 }
10061 #endif
10062 return eRet;
10063 }
10064
10065 /******************************************************************************/
10066 ///Description
10067 ///@param in \b IN in parameter
10068 ///@param out \b OUT out parameter
10069 ///@return status
10070 /******************************************************************************/
MDrv_HVD_EX_IsDispQueueEmpty(MS_U32 u32Id)10071 MS_BOOL MDrv_HVD_EX_IsDispQueueEmpty(MS_U32 u32Id)
10072 {
10073 if(HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB) == 0)
10074 return TRUE;
10075 else
10076 return FALSE;
10077 }
10078
10079 #else
MDrv_HVD_EX_LoadCodeInSecure(MS_U32 addr)10080 MS_BOOL MDrv_HVD_EX_LoadCodeInSecure(MS_U32 addr)
10081 {
10082 return HAL_VPU_EX_LoadCodeInSecure(addr);
10083 }
10084
MDrv_HVD_EX_SetLockDownRegister(void * param,MS_U8 u8IsHVD)10085 MS_BOOL MDrv_HVD_EX_SetLockDownRegister(void* param,MS_U8 u8IsHVD)
10086 {
10087 if(param == NULL)
10088 {
10089 return FALSE;
10090 }
10091 return HAL_VPU_EX_SetLockDownRegister(param,u8IsHVD);
10092 }
10093
10094 #if (defined(MSOS_TYPE_OPTEE))
MDrv_HVD_EX_OPTEE_SetRegister(void * param)10095 MS_BOOL MDrv_HVD_EX_OPTEE_SetRegister(void* param)
10096 {
10097 if(param == NULL)
10098 {
10099 return FALSE;
10100 }
10101 return HAL_HVD_EX_SetLockDownOpteeRegister(param);
10102 }
10103 #endif
10104
10105 #endif
10106