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Searched refs:OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/audio/hal/M7821/audio/
H A Dddr_config.h70 #define OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR 0x1F0000 macro
H A DsndR2_proj.h121 #define BUF_DDENC_MCH_ADDR (OFFSET_R2_TO_ASNDDSP + OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR)
H A Daudio_comm2.h824 ….const DSP2_DDE_PCM_DRAM_BASE = (OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR / BYTES_IN_M…
/utopia/UTPA2-700.0.x/modules/audio/hal/maserati/audio/
H A Dddr_config.h70 #define OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR 0x1F0000 macro
H A DsndR2_proj.h123 #define BUF_DDENC_MCH_ADDR (OFFSET_R2_TO_ASNDDSP + OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR)
H A Daudio_comm2.h858 ….const DSP2_DDE_PCM_DRAM_BASE = (OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR / BYTES_IN_M…
/utopia/UTPA2-700.0.x/modules/audio/hal/M7621/audio/
H A Dddr_config.h70 #define OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR 0x1F0000 macro
H A DsndR2_proj.h140 #define BUF_DDENC_MCH_ADDR (OFFSET_R2_TO_ASNDDSP + OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR)
H A Daudio_comm2.h840 ….const DSP2_DDE_PCM_DRAM_BASE = (OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR / BYTES_IN_M…
/utopia/UTPA2-700.0.x/modules/audio/hal/mustang/audio/
H A Dddr_config.h66 #define OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR 0x1F0000 macro
H A DsndR2_proj.h140 #define BUF_DDENC_MCH_ADDR (OFFSET_R2_TO_ASNDDSP + OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR)
H A Daudio_comm2.h846 ….const DSP2_DDE_PCM_DRAM_BASE = (OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR / BYTES_IN_M…
/utopia/UTPA2-700.0.x/modules/audio/hal/k6/audio/
H A Dddr_config.h59 #define OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR 0x00D5000 macro
H A DsndR2_proj.h141 #define BUF_DDENC_MCH_ADDR (OFFSET_R2_TO_ASNDDSP + OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR)
H A Daudio_comm2.h664 ….const DSP2_DDE_PCM_DRAM_BASE = (OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR / BYTES_IN_M…
/utopia/UTPA2-700.0.x/modules/audio/hal/maxim/audio/
H A Dddr_config.h70 #define OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR 0x1F0000 macro
H A DsndR2_proj.h140 #define BUF_DDENC_MCH_ADDR (OFFSET_R2_TO_ASNDDSP + OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR)
H A Daudio_comm2.h883 ….const DSP2_DDE_PCM_DRAM_BASE = (OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR / BYTES_IN_MIU_L…
/utopia/UTPA2-700.0.x/modules/audio/hal/kano/audio/
H A Dddr_config.h59 #define OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR 0x0162000 macro
H A DsndR2_proj.h141 #define BUF_DDENC_MCH_ADDR (OFFSET_R2_TO_ASNDDSP + OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR)
H A Daudio_comm2.h689 ….const DSP2_DDE_PCM_DRAM_BASE = (OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR / BYTES_IN_MIU_…
/utopia/UTPA2-700.0.x/modules/audio/hal/macan/audio/
H A Dddr_config.h66 #define OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR 0x1F0000 macro
H A DsndR2_proj.h140 #define BUF_DDENC_MCH_ADDR (OFFSET_R2_TO_ASNDDSP + OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR)
H A Daudio_comm2.h849 ….const DSP2_DDE_PCM_DRAM_BASE = (OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR / BYTES_IN_M…
/utopia/UTPA2-700.0.x/modules/audio/hal/curry/audio/
H A DsndR2_proj.h141 #define BUF_DDENC_MCH_ADDR (OFFSET_R2_TO_ASNDDSP + OFFSET_SER2_DDENC_MCHOUT_DRAM_ADDR)