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Searched refs:OFFSET_CH6_INPUT_DLY_DRAM_BASE (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/audio/hal/manhattan/audio/
H A Dddr_config.h44 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0138000 macro
H A Daudio_comm2.h741 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LINE…
/utopia/UTPA2-700.0.x/modules/audio/hal/maldives/audio/
H A Dddr_config.h50 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0000000 macro
H A Daudio_comm2.h788 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LINE…
/utopia/UTPA2-700.0.x/modules/audio/hal/mooney/audio/
H A Dddr_config.h50 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0000000 macro
H A Daudio_comm2.h788 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LINE…
/utopia/UTPA2-700.0.x/modules/audio/hal/M7821/audio/
H A Dddr_config.h46 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0138000 macro
H A Daudio_comm2.h836 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = (OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LIN…
/utopia/UTPA2-700.0.x/modules/audio/hal/maserati/audio/
H A Dddr_config.h46 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0138000 macro
H A Daudio_comm2.h870 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = (OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LIN…
/utopia/UTPA2-700.0.x/modules/audio/hal/M7621/audio/
H A Dddr_config.h46 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0138000 macro
H A Daudio_comm2.h852 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = (OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LIN…
/utopia/UTPA2-700.0.x/modules/audio/hal/mustang/audio/
H A Dddr_config.h46 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0138000 macro
H A Daudio_comm2.h858 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = (OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LIN…
/utopia/UTPA2-700.0.x/modules/audio/hal/k6/audio/
H A Dddr_config.h96 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0000000 macro
H A Daudio_comm2.h681 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = (OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LIN…
/utopia/UTPA2-700.0.x/modules/audio/hal/maxim/audio/
H A Dddr_config.h46 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0138000 macro
H A Daudio_comm2.h900 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = (OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LINE)…
/utopia/UTPA2-700.0.x/modules/audio/hal/kano/audio/
H A Dddr_config.h96 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0000000 macro
H A Daudio_comm2.h706 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = (OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LINE)…
/utopia/UTPA2-700.0.x/modules/audio/hal/macan/audio/
H A Dddr_config.h46 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0138000 macro
H A Daudio_comm2.h861 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = (OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LIN…
/utopia/UTPA2-700.0.x/modules/audio/hal/k6lite/audio/
H A Dddr_config.h84 #define OFFSET_CH6_INPUT_DLY_DRAM_BASE 0x0000000 macro
H A Daudio_comm2.h745 ….const DSP2_CH6_INPUT_DLY_DRAM_BASE = (OFFSET_CH6_INPUT_DLY_DRAM_BASE / BYTES_IN_MIU_LINE)…