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Searched refs:NI_NSK2_CLK_ENABLE (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DhalNSK2.c937 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
2364 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2384 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2403 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2421 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2488 NI_REG(REG_NI_NSK2_CTRL) = u32Data & (~NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_PushSlowClock()
2495 if( (u32Data & NI_NSK2_CLK_ENABLE) == 0) in HAL_NSK2_PushSlowClock()
2497 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_CLK_ENABLE ; in HAL_NSK2_PushSlowClock()
3130 NI_REG(REG_NI_NSK2_CTRL) |= (NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
3136 NI_REG(REG_NI_NSK2_CTRL) &= ~(NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
H A DregNSK2.h191 #define NI_NSK2_CLK_ENABLE __BITE macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DhalNSK2.c922 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
2342 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2362 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2381 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2399 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2467 NI_REG(REG_NI_NSK2_CTRL) = u32Data & (~NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_PushSlowClock()
2474 if( (u32Data & NI_NSK2_CLK_ENABLE) == 0) in HAL_NSK2_PushSlowClock()
2476 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_CLK_ENABLE ; in HAL_NSK2_PushSlowClock()
3114 NI_REG(REG_NI_NSK2_CTRL) |= (NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
3120 NI_REG(REG_NI_NSK2_CTRL) &= ~(NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
H A DregNSK2.h190 #define NI_NSK2_CLK_ENABLE __BITE macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DhalNSK2.c937 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
2361 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2381 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2400 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2418 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2485 NI_REG(REG_NI_NSK2_CTRL) = u32Data & (~NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_PushSlowClock()
2492 if( (u32Data & NI_NSK2_CLK_ENABLE) == 0) in HAL_NSK2_PushSlowClock()
2494 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_CLK_ENABLE ; in HAL_NSK2_PushSlowClock()
3127 NI_REG(REG_NI_NSK2_CTRL) |= (NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
3133 NI_REG(REG_NI_NSK2_CTRL) &= ~(NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
H A DregNSK2.h191 #define NI_NSK2_CLK_ENABLE __BITE macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DhalNSK2.c937 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
2366 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2386 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2405 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2423 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2490 NI_REG(REG_NI_NSK2_CTRL) = u32Data & (~NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_PushSlowClock()
2497 if( (u32Data & NI_NSK2_CLK_ENABLE) == 0) in HAL_NSK2_PushSlowClock()
2499 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_CLK_ENABLE ; in HAL_NSK2_PushSlowClock()
3132 NI_REG(REG_NI_NSK2_CTRL) |= (NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
3138 NI_REG(REG_NI_NSK2_CTRL) &= ~(NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
H A DregNSK2.h191 #define NI_NSK2_CLK_ENABLE __BITE macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/curry/nsk2/
H A DhalNSK2.c857 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_Init()
909 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
2403 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2423 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2442 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2460 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2528 NI_REG(REG_NI_NSK2_CTRL) = u32Data & (~NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_PushSlowClock()
2533 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_CLK_ENABLE ; in HAL_NSK2_PushSlowClock()
H A DregNSK2.h189 #define NI_NSK2_CLK_ENABLE __BITE macro