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Searched refs:MIU_SC_G0REQUEST_MASK (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_frc.c618 MDrv_Write2ByteMask((REG_MIU0_BASE + 0xF0), 0x00, MIU_SC_G0REQUEST_MASK); // MIU select (Group0) in MHal_FRC_set_miusel()
623 …MDrv_Write2ByteMask((REG_MIU1_BASE + 0xF0), MIU_SC_G0REQUEST_MASK, MIU_SC_G0REQUEST_MASK); // MIU … in MHal_FRC_set_miusel()
H A Dmhal_sc.c2833 pXCResourcePrivate->sthal_SC.Miu0Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
2842 pXCResourcePrivate->sthal_SC.Miu1Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
2850 pXCResourcePrivate->sthal_SC.Miu2Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_frc.c796 MDrv_Write2ByteMask((REG_MIU0_BASE + 0xF0), 0x00, MIU_SC_G0REQUEST_MASK); // MIU select (Group0) in MHal_FRC_set_miusel()
801 …MDrv_Write2ByteMask((REG_MIU1_BASE + 0xF0), MIU_SC_G0REQUEST_MASK, MIU_SC_G0REQUEST_MASK); // MIU … in MHal_FRC_set_miusel()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_frc.c779 MDrv_Write2ByteMask((REG_MIU0_BASE + 0xF0), 0x00, MIU_SC_G0REQUEST_MASK); // MIU select (Group0) in MHal_FRC_set_miusel()
784 …MDrv_Write2ByteMask((REG_MIU1_BASE + 0xF0), MIU_SC_G0REQUEST_MASK, MIU_SC_G0REQUEST_MASK); // MIU … in MHal_FRC_set_miusel()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c1862 pXCResourcePrivate->sthal_SC.Miu0Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
1868 pXCResourcePrivate->sthal_SC.Miu1Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
1873 pXCResourcePrivate->sthal_SC.Miu2Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
1927 … MDrv_Write2ByteMask((REG_MIU0_BASE + 0xF0), 0x00, MIU_SC_G0REQUEST_MASK); // MIU select (Group0) in Hal_SC_set_miusel()
1932 …MDrv_Write2ByteMask((REG_MIU1_BASE + 0xF0), MIU_SC_G0REQUEST_MASK, MIU_SC_G0REQUEST_MASK); // MIU … in Hal_SC_set_miusel()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dmhal_xc_chip_config.h661 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dmhal_xc_chip_config.h661 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_frc.c757 MDrv_Write2ByteMask((REG_MIU0_BASE + 0xF0), 0x00, MIU_SC_G0REQUEST_MASK); // MIU select (Group0) in MHal_FRC_set_miusel()
762 …MDrv_Write2ByteMask((REG_MIU1_BASE + 0xF0), MIU_SC_G0REQUEST_MASK, MIU_SC_G0REQUEST_MASK); // MIU … in MHal_FRC_set_miusel()
H A Dmhal_sc.c3217 pXCResourcePrivate->sthal_SC.Miu0Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
3226 pXCResourcePrivate->sthal_SC.Miu1Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
3234 pXCResourcePrivate->sthal_SC.Miu2Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_frc.c757 MDrv_Write2ByteMask((REG_MIU0_BASE + 0xF0), 0x00, MIU_SC_G0REQUEST_MASK); // MIU select (Group0) in MHal_FRC_set_miusel()
762 …MDrv_Write2ByteMask((REG_MIU1_BASE + 0xF0), MIU_SC_G0REQUEST_MASK, MIU_SC_G0REQUEST_MASK); // MIU … in MHal_FRC_set_miusel()
H A Dmhal_sc.c3217 pXCResourcePrivate->sthal_SC.Miu0Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
3226 pXCResourcePrivate->sthal_SC.Miu1Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
3234 pXCResourcePrivate->sthal_SC.Miu2Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h941 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h923 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c1988 pXCResourcePrivate->sthal_SC.Miu0Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
1994 pXCResourcePrivate->sthal_SC.Miu1Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
1999 pXCResourcePrivate->sthal_SC.Miu2Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
2053 … MDrv_Write2ByteMask((REG_MIU0_BASE + 0xF0), 0x00, MIU_SC_G0REQUEST_MASK); // MIU select (Group0) in Hal_SC_set_miusel()
2058 …MDrv_Write2ByteMask((REG_MIU1_BASE + 0xF0), MIU_SC_G0REQUEST_MASK, MIU_SC_G0REQUEST_MASK); // MIU … in Hal_SC_set_miusel()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h989 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h1106 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h1069 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h1126 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h1063 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h1131 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h1110 #define MIU_SC_G0REQUEST_MASK (0x0000) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_sc.c1319 Miu0Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
1324 Miu1Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_sc.c1370 Miu0Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
1375 Miu1Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c2553 pXCResourcePrivate->sthal_SC.Miu0Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
2562 pXCResourcePrivate->sthal_SC.Miu1Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
2570 pXCResourcePrivate->sthal_SC.Miu2Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c2438 pXCResourcePrivate->sthal_SC.Miu0Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()
2446 pXCResourcePrivate->sthal_SC.Miu1Mask.u16MiuG0Mask |= MIU_SC_G0REQUEST_MASK; in Hal_SC_Enable_MiuMask()

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