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Searched refs:HVD_REG_RESET_HK_RV9_DEC_MODE (Results 1 – 25 of 68) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/hvd/
H A DhalHVD_sub.c1048 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
1052 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
H A DhalHVD.c1094 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
1098 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
H A DregHVD.h231 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/hvd/
H A DhalHVD_sub.c1048 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
1052 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
H A DhalHVD.c1094 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
1098 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
H A DregHVD.h231 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/hvd/
H A DhalHVD_sub.c1048 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
1052 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
H A DhalHVD.c1094 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
1098 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
H A DregHVD.h231 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/hvd/
H A DhalHVD_sub.c1048 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
1052 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
H A DhalHVD.c1094 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
1098 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
H A DregHVD.h231 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/hvd/
H A DhalHVD_sub.c1048 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
1052 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
H A DhalHVD.c1094 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
1098 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
H A DregHVD.h231 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/hvd/
H A DhalHVD_sub.c1048 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
1052 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_Sub_SetRegCPU()
H A DhalHVD.c1094 …_HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_HK_RV9_DEC_MODE , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
1098 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_HK_RV9_DEC_MODE ); in _HAL_HVD_SetRegCPU()
H A DregHVD.h231 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/hvd_ex/
H A DregHVD_EX.h243 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/hvd_ex/
H A DregHVD_EX.h243 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/hvd_ex/
H A DregHVD_EX.h232 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/hvd_ex/
H A DregHVD_EX.h232 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/hvd_ex/
H A DregHVD_EX.h232 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/hvd_v3/
H A DregHVD_EX.h243 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/hvd_ex/
H A DregHVD_EX.h232 #define HVD_REG_RESET_HK_RV9_DEC_MODE BIT(10) macro

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