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Searched refs:HDCPREG (Results 1 – 13 of 13) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/hdcp/
H A DhalHDCP.c149 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
179 return HDCPREG(bank, address); in MHalHdcpRegRead()
184 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
191 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
192 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/hdcp/
H A DhalHDCP.c149 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
167 return HDCPREG(bank, address); in MHalHdcpRegRead()
172 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
179 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
180 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/hdcp/
H A DhalHDCP.c149 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
167 return HDCPREG(bank, address); in MHalHdcpRegRead()
172 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
179 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
180 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/hdcp/
H A DhalHDCP.c149 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
167 return HDCPREG(bank, address); in MHalHdcpRegRead()
172 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
179 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
180 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/hdcp/
H A DhalHDCP.c149 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
167 return HDCPREG(bank, address); in MHalHdcpRegRead()
172 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
179 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
180 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/hdcp/
H A DhalHDCP.c149 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
167 return HDCPREG(bank, address); in MHalHdcpRegRead()
172 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
179 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
180 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/hdcp/
H A DhalHDCP.c149 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
167 return HDCPREG(bank, address); in MHalHdcpRegRead()
172 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
179 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
180 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdcp/
H A DhalHDCP.c150 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
176 return HDCPREG(bank, address); in MHalHdcpRegRead()
181 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
188 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
189 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdcp/
H A DhalHDCP.c150 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
176 return HDCPREG(bank, address); in MHalHdcpRegRead()
181 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
188 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
189 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdcp/
H A DhalHDCP.c150 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
176 return HDCPREG(bank, address); in MHalHdcpRegRead()
181 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
188 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
189 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdcp/
H A DhalHDCP.c150 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
176 return HDCPREG(bank, address); in MHalHdcpRegRead()
181 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
188 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
189 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdcp/
H A DhalHDCP.c150 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
176 return HDCPREG(bank, address); in MHalHdcpRegRead()
181 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
188 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
189 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdcp/
H A DhalHDCP.c150 #define HDCPREG(bank, addr) (*((volatile MS_U16 *)((_gHDCPRegBase + (bank << 1U)) + (addr << 2U… macro
176 return HDCPREG(bank, address); in MHalHdcpRegRead()
181 HDCPREG(bank, address) = reg_data; in MHalHdcpRegWrite()
188 reg_value = (HDCPREG(bank, address) & (~reg_mask)) | (reg_data & reg_mask); in MHalHdcpRegMaskWrite()
189 HDCPREG(bank, address) = reg_value; in MHalHdcpRegMaskWrite()