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Searched refs:F1_WRITE_LIMIT_MIN (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_scaling.c735 …Scaling._u32DNRBaseAddr0[eWindow]) / BYTE_PER_WORD - 1) | (F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN); in MDrv_XC_init_fbn_win()
746 …caling._u32FRCMBaseAddr0[eWindow]) / BYTE_PER_WORD - 1) | (F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN); in MDrv_XC_init_fbn_win()
758 …._u32DualMiuDNRBaseAddr0[eWindow]) / BYTE_PER_WORD - 1) | (F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN); in MDrv_XC_init_fbn_win()
6586 u32WritelimitBase= u32WritelimitBase | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN; in MDrv_SC_set_dnrsetting()
7469 u32WritelimitBase= u32WritelimitBase | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN; in MDrv_SC_set_frcmwsetting()
8776 u32WritelimitBase= u32WritelimitBase | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN; in _MDrv_SC_set_fetch_number_limit_impl()
9717 … u32WritelimitBase = (MS_IPM_BASE0(eWindow) - 1) | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN; in MDrv_SC_set_mirror()
9743 … u32WritelimitBase = (MS_IPM_BASE0(eWindow) - 1) | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN; in MDrv_SC_set_mirror()
9765 … u32WritelimitBase = (MS_FRCM_BASE0(eWindow) - 1) | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN; in MDrv_SC_set_mirror()
9910 … u32WritelimitBase = (MS_IPM_BASE0(eWindow) - 1) | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN; in MDrv_SC_set_mirrorEx()
[all …]
H A Dmdrv_sc_scaling.c.0735 …Scaling._u32DNRBaseAddr0[eWindow]) / BYTE_PER_WORD - 1) | (F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN);
746 …caling._u32FRCMBaseAddr0[eWindow]) / BYTE_PER_WORD - 1) | (F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN);
758 …._u32DualMiuDNRBaseAddr0[eWindow]) / BYTE_PER_WORD - 1) | (F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN);
6567 u32WritelimitBase= u32WritelimitBase | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN;
7446 u32WritelimitBase= u32WritelimitBase | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN;
8751 u32WritelimitBase= u32WritelimitBase | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN;
9688 … u32WritelimitBase = (MS_IPM_BASE0(eWindow) - 1) | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN;
9714 … u32WritelimitBase = (MS_IPM_BASE0(eWindow) - 1) | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN;
9736 … u32WritelimitBase = (MS_FRCM_BASE0(eWindow) - 1) | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN;
9881 … u32WritelimitBase = (MS_IPM_BASE0(eWindow) - 1) | F1_WRITE_LIMIT_EN | F1_WRITE_LIMIT_MIN;
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dmhal_xc_chip_config.h138 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dmhal_xc_chip_config.h138 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h145 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h145 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dmhal_xc_chip_config.h155 #define F1_WRITE_LIMIT_MIN BIT(30) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dmhal_xc_chip_config.h155 #define F1_WRITE_LIMIT_MIN BIT(30) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dmhal_xc_chip_config.h153 #define F1_WRITE_LIMIT_MIN BIT(30) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dmhal_xc_chip_config.h153 #define F1_WRITE_LIMIT_MIN BIT(30) macro
H A Dmhal_xc_chip_config.h.0153 #define F1_WRITE_LIMIT_MIN BIT(30)
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h141 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h156 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h153 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h158 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h150 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h158 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h160 #define F1_WRITE_LIMIT_MIN BIT(30) //BK12_5b[14] macro