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Searched refs:E_INT_FIQ_MIPS_VPE0_TO_8051 (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/mbx/hal/maldives/mbx/
H A DhalMBXINT.c174 MsOS_AttachInterrupt(E_INT_FIQ_MIPS_VPE0_TO_8051, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
176 MsOS_EnableInterrupt(E_INT_FIQ_MIPS_VPE0_TO_8051); in _MHAL_MBXINT_SetHostCPU()
242 MsOS_DisableInterrupt(E_INT_FIQ_MIPS_VPE0_TO_8051); in MHAL_MBXINT_DeInit()
244 MsOS_DetachInterrupt(E_INT_FIQ_MIPS_VPE0_TO_8051); in MHAL_MBXINT_DeInit()
/utopia/UTPA2-700.0.x/modules/mbx/hal/mustang/mbx/
H A DhalMBXINT.c174 MsOS_AttachInterrupt(E_INT_FIQ_MIPS_VPE0_TO_8051, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
176 MsOS_EnableInterrupt(E_INT_FIQ_MIPS_VPE0_TO_8051); in _MHAL_MBXINT_SetHostCPU()
242 MsOS_DisableInterrupt(E_INT_FIQ_MIPS_VPE0_TO_8051); in MHAL_MBXINT_DeInit()
244 MsOS_DetachInterrupt(E_INT_FIQ_MIPS_VPE0_TO_8051); in MHAL_MBXINT_DeInit()
/utopia/UTPA2-700.0.x/mxlib/hal/mustang/
H A DhalIRQTBL.h493 HAL_UpdateIrqTable(E_FIQ_46, E_INT_FIQ_MIPS_VPE0_TO_8051); //reg_hst2to0_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/projects/tmplib/include/
H A DMsIRQ.h263 E_INT_FIQ_MIPS_VPE0_TO_8051 = E_INT_FIQ_0x70_START+2, //T3, E_INT_FIQ_BEON_TO_8051 enumerator
/utopia/UTPA2-700.0.x/mxlib/include/
H A DMsIRQ.h263 E_INT_FIQ_MIPS_VPE0_TO_8051 = E_INT_FIQ_0x70_START+2, //T3, E_INT_FIQ_BEON_TO_8051 enumerator
/utopia/UTPA2-700.0.x/mxlib/hal/manhattan/
H A DhalIRQTBL.h633 HAL_UpdateIrqTable(E_FIQ_42, E_INT_FIQ_MIPS_VPE0_TO_8051); //reg_hst1to0_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/marcus/
H A DhalIRQTBL.h647 HAL_UpdateIrqTable(E_FIQ_42, E_INT_FIQ_MIPS_VPE0_TO_8051); //reg_hst1to0_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/maxim/
H A DhalIRQTBL.h647 HAL_UpdateIrqTable(E_FIQ_42, E_INT_FIQ_MIPS_VPE0_TO_8051); //reg_hst1to0_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/maserati/
H A DhalIRQTBL.h647 HAL_UpdateIrqTable(E_FIQ_42, E_INT_FIQ_MIPS_VPE0_TO_8051); //reg_hst1to0_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/M7821/
H A DhalIRQTBL.h658 HAL_UpdateIrqTable(E_FIQ_42, E_INT_FIQ_MIPS_VPE0_TO_8051); //reg_hst1to0_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/M7621/
H A DhalIRQTBL.h658 HAL_UpdateIrqTable(E_FIQ_42, E_INT_FIQ_MIPS_VPE0_TO_8051); //reg_hst1to0_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/projects/build/
H A Dpreprocess.txt31406 E_INT_FIQ_MIPS_VPE0_TO_8051 = E_INT_FIQ_0x70_START+2,