Home
last modified time | relevance | path

Searched refs:E_INT_FIQ_AEON_TO_MIPS_VPE0 (Results 1 – 17 of 17) sorted by relevance

/utopia/UTPA2-700.0.x/modules/mbx/hal/maldives/mbx/
H A DhalMBXINT.c260 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); in MHAL_MBXINT_DeInit()
262 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); in MHAL_MBXINT_DeInit()
/utopia/UTPA2-700.0.x/modules/mbx/hal/mustang/mbx/
H A DhalMBXINT.c260 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); in MHAL_MBXINT_DeInit()
262 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); in MHAL_MBXINT_DeInit()
/utopia/UTPA2-700.0.x/modules/cpu/hal/manhattan/cpu/
H A DhalCPU.c678 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); //should be secure-R2 in HAL_COPRO_Init_End()
/utopia/UTPA2-700.0.x/modules/cpu/hal/maserati/cpu/
H A DhalCPU.c683 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); //should be secure-R2 in HAL_COPRO_Init_End()
/utopia/UTPA2-700.0.x/modules/cpu/hal/maxim/cpu/
H A DhalCPU.c681 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); //should be secure-R2 in HAL_COPRO_Init_End()
/utopia/UTPA2-700.0.x/modules/cpu/hal/macan/cpu/
H A DhalCPU.c678 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); //should be secure-R2 in HAL_COPRO_Init_End()
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7821/cpu/
H A DhalCPU.c682 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); //should be secure-R2 in HAL_COPRO_Init_End()
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7621/cpu/
H A DhalCPU.c682 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_MIPS_VPE0); //should be secure-R2 in HAL_COPRO_Init_End()
/utopia/UTPA2-700.0.x/projects/tmplib/include/
H A DMsIRQ.h250 E_INT_FIQ_AEON_TO_MIPS_VPE0 = E_INT_FIQ_0x60_START+8, //T3, enumerator
/utopia/UTPA2-700.0.x/mxlib/include/
H A DMsIRQ.h250 E_INT_FIQ_AEON_TO_MIPS_VPE0 = E_INT_FIQ_0x60_START+8, //T3, enumerator
/utopia/UTPA2-700.0.x/mxlib/hal/manhattan/
H A DhalIRQTBL.h641 HAL_UpdateIrqTable(E_FIQ_49, E_INT_FIQ_AEON_TO_MIPS_VPE0); //reg_hst3to1_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/marcus/
H A DhalIRQTBL.h655 HAL_UpdateIrqTable(E_FIQ_49, E_INT_FIQ_AEON_TO_MIPS_VPE0); //reg_hst3to1_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/maxim/
H A DhalIRQTBL.h655 HAL_UpdateIrqTable(E_FIQ_49, E_INT_FIQ_AEON_TO_MIPS_VPE0); //reg_hst3to1_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/maserati/
H A DhalIRQTBL.h655 HAL_UpdateIrqTable(E_FIQ_49, E_INT_FIQ_AEON_TO_MIPS_VPE0); //reg_hst3to1_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/M7821/
H A DhalIRQTBL.h666 HAL_UpdateIrqTable(E_FIQ_49, E_INT_FIQ_AEON_TO_MIPS_VPE0); //reg_hst3to1_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/M7621/
H A DhalIRQTBL.h666 HAL_UpdateIrqTable(E_FIQ_49, E_INT_FIQ_AEON_TO_MIPS_VPE0); //reg_hst3to1_int in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/projects/build/
H A Dpreprocess.txt31393 E_INT_FIQ_AEON_TO_MIPS_VPE0 = E_INT_FIQ_0x60_START+8,