Searched refs:E_INT_FIQ_0x60_START (Results 1 – 3 of 3) sorted by relevance
| /utopia/UTPA2-700.0.x/projects/tmplib/include/ |
| H A D | MsIRQ.h | 240 E_INT_FIQ_0x60_START = 0x60, enumerator
241 E_INT_FIQ_IR_INT_RC = E_INT_FIQ_0x60_START+0, //U3
242 E_INT_FIQ_HDMITX_IRQ_EDGE = E_INT_FIQ_0x60_START+1, //U3
243 E_INT_FIQ_UP_IRQ_UART_CA = E_INT_FIQ_0x60_START+2, //U3
244 E_INT_FIQ_UP_IRQ_EMM_ECM = E_INT_FIQ_0x60_START+3, //U3
245 E_INT_FIQ_PVR2MI_INT0 = E_INT_FIQ_0x60_START+4, //U3
246 E_INT_IRQ_CA_RSA_INT0 = E_INT_FIQ_0x60_START+4, //Keltic / Kaiser / keres
247 E_INT_FIQ_PVR2MI_INT1 = E_INT_FIQ_0x60_START+5, //U3
248 E_INT_IRQ_FIQ_INT = E_INT_FIQ_0x60_START+6, //Kappa
249 E_INT_IRQ_UART3 = E_INT_FIQ_0x60_START+7, //Kappa
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| /utopia/UTPA2-700.0.x/mxlib/include/ |
| H A D | MsIRQ.h | 240 E_INT_FIQ_0x60_START = 0x60, enumerator
241 E_INT_FIQ_IR_INT_RC = E_INT_FIQ_0x60_START+0, //U3
242 E_INT_FIQ_HDMITX_IRQ_EDGE = E_INT_FIQ_0x60_START+1, //U3
243 E_INT_FIQ_UP_IRQ_UART_CA = E_INT_FIQ_0x60_START+2, //U3
244 E_INT_FIQ_UP_IRQ_EMM_ECM = E_INT_FIQ_0x60_START+3, //U3
245 E_INT_FIQ_PVR2MI_INT0 = E_INT_FIQ_0x60_START+4, //U3
246 E_INT_IRQ_CA_RSA_INT0 = E_INT_FIQ_0x60_START+4, //Keltic / Kaiser / keres
247 E_INT_FIQ_PVR2MI_INT1 = E_INT_FIQ_0x60_START+5, //U3
248 E_INT_IRQ_FIQ_INT = E_INT_FIQ_0x60_START+6, //Kappa
249 E_INT_IRQ_UART3 = E_INT_FIQ_0x60_START+7, //Kappa
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| /utopia/UTPA2-700.0.x/projects/build/ |
| H A D | preprocess.txt | 31383 E_INT_FIQ_0x60_START = 0x60,
31384 E_INT_FIQ_IR_INT_RC = E_INT_FIQ_0x60_START+0,
31385 E_INT_FIQ_HDMITX_IRQ_EDGE = E_INT_FIQ_0x60_START+1,
31386 E_INT_FIQ_UP_IRQ_UART_CA = E_INT_FIQ_0x60_START+2,
31387 E_INT_FIQ_UP_IRQ_EMM_ECM = E_INT_FIQ_0x60_START+3,
31388 E_INT_FIQ_PVR2MI_INT0 = E_INT_FIQ_0x60_START+4,
31389 E_INT_IRQ_CA_RSA_INT0 = E_INT_FIQ_0x60_START+4,
31390 E_INT_FIQ_PVR2MI_INT1 = E_INT_FIQ_0x60_START+5,
31391 E_INT_IRQ_FIQ_INT = E_INT_FIQ_0x60_START+6,
31392 E_INT_IRQ_UART3 = E_INT_FIQ_0x60_START+7,
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