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Searched refs:ENABLE_48_MHZ_CF_CLK_MASK (Results 1 – 4 of 4) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/tcf/
H A DhalTCF.c155 …_REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)&~ENABLE_48_MHZ_CF_CLK_MASK) | ENABLE_48_MHZ_CF_CL… in HAL_CF_Clk()
160 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)|ENABLE_48_MHZ_CF_CLK_MASK)); in HAL_CF_Clk()
H A DregTCF.h137 #define ENABLE_48_MHZ_CF_CLK_MASK 0x00000010 //[4] 0: enable 48MHz TCG clock macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/tcf/
H A DhalTCF.c155 …_REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)&~ENABLE_48_MHZ_CF_CLK_MASK) | ENABLE_48_MHZ_CF_CL… in HAL_CF_Clk()
160 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)|ENABLE_48_MHZ_CF_CLK_MASK)); in HAL_CF_Clk()
H A DregTCF.h137 #define ENABLE_48_MHZ_CF_CLK_MASK 0x00000010 //[4] 0: enable 48MHz TCG clock macro