Searched refs:ENABLE_48_MHZ_CF_CLK (Results 1 – 4 of 4) sorted by relevance
138 #define ENABLE_48_MHZ_CF_CLK 0x00000000 macro
155 …EG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)&~ENABLE_48_MHZ_CF_CLK_MASK) | ENABLE_48_MHZ_CF_CLK); in HAL_CF_Clk()