| /utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/ |
| H A D | halAVD.c | 6373 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6437 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6516 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6555 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6564 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
6607 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
6835 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
6847 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
6908 RIU_WriteRegBit (L_BK_CLKGEN0(0x21), DISABLE, BIT(0)); // CLK_VDMCU, 0:Enable 1:Disable in HAL_AVD_AFEC_SetClock()
6931 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/ |
| H A D | halAVD.c | 6361 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6419 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6498 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6537 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6546 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
6585 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
6806 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
6811 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
6856 RIU_WriteRegBit (L_BK_CLKGEN0(0x21), DISABLE, BIT(0)); // CLK_VDMCU, 0:Enable 1:Disable in HAL_AVD_AFEC_SetClock()
6879 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/ |
| H A D | halAVD.c | 3015 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
3073 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
3129 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
3168 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
3177 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
3216 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
3434 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
3439 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
3484 RIU_WriteRegBit (L_BK_CLKGEN0(0x21), DISABLE, BIT(0)); // CLK_VDMCU, 0:Enable 1:Disable in HAL_AVD_AFEC_SetClock()
3507 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/ |
| H A D | halAVD.c | 6359 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6417 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6496 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6535 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6544 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
6582 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
6790 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
6795 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
6840 RIU_WriteRegBit (L_BK_CLKGEN0(0x21), DISABLE, BIT(0)); // CLK_VDMCU, 0:Enable 1:Disable in HAL_AVD_AFEC_SetClock()
6863 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/ |
| H A D | halAVD.c | 6374 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6438 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6517 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6556 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6565 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
6608 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
6836 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
6848 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
6984 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
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| /utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/ |
| H A D | halAVD.c | 6374 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6438 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6517 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6556 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6565 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
6608 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
6836 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
6848 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
6984 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/ |
| H A D | halAVD.c | 6374 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6438 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6517 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6556 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6565 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
6608 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
6836 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
6848 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
6984 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/ |
| H A D | halAVD.c | 6359 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6417 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6496 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6535 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6544 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
6582 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
6790 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
6795 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
6840 RIU_WriteRegBit (L_BK_CLKGEN0(0x21), DISABLE, BIT(0)); // CLK_VDMCU, 0:Enable 1:Disable in HAL_AVD_AFEC_SetClock()
6863 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/ |
| H A D | halAVD.c | 3015 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
3073 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
3129 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
3168 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
3177 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
3216 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
3434 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
3439 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
3484 RIU_WriteRegBit (L_BK_CLKGEN0(0x21), DISABLE, BIT(0)); // CLK_VDMCU, 0:Enable 1:Disable in HAL_AVD_AFEC_SetClock()
3507 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/ |
| H A D | halAVD.c | 6374 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6438 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6517 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6556 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6565 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
6608 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
6836 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
6848 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
6984 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/ |
| H A D | halAVD.c | 6374 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6438 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
6517 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6556 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
6565 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
6608 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
6836 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
6848 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
6984 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/ |
| H A D | halAVD.c | 3014 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
3072 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_SetClock()
3128 RIU_WriteRegBit(VD_MCU_SRAM_EN, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
3167 RIU_WriteRegBit(VD_MCU_ADDR_AUTO_INC, DISABLE, BIT(0)); in HAL_AVD_VDMCU_LoadDSP()
3176 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_VDMCU_LoadDSP()
3215 RIU_WriteRegBit(BK_AFEC_14, DISABLE, BIT(7)); in HAL_AVD_RegInit()
3433 RIU_WriteRegBit(BK_AFEC_16, DISABLE, BIT(7)); in HAL_AVD_AFEC_McuReset()
3438 HAL_AVD_VDMCU_SetFreeze(DISABLE); in HAL_AVD_AFEC_McuReset()
3483 RIU_WriteRegBit (L_BK_CLKGEN0(0x21), DISABLE, BIT(0)); // CLK_VDMCU, 0:Enable 1:Disable in HAL_AVD_AFEC_SetClock()
3506 RIU_WriteRegBit(L_BK_CLKGEN0(0x00), DISABLE, BIT(4)); in HAL_AVD_AFEC_SetClockSource()
[all …]
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| /utopia/UTPA2-700.0.x/modules/pm/hal/macan/pm/ |
| H A D | halPM.c | 364 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RtcInit()
365 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RtcInit()
379 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RtcInit()
380 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RtcInit()
401 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
402 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
405 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
406 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
535 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
537 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
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| /utopia/UTPA2-700.0.x/modules/pm/hal/mainz/pm/ |
| H A D | halPM.c | 401 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
402 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
405 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
406 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
535 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
537 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
539 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
599 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
601 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
605 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
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| /utopia/UTPA2-700.0.x/modules/pm/hal/maserati/pm/ |
| H A D | halPM.c | 399 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
400 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
403 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
404 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
533 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
535 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
537 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
597 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
599 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
603 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
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| /utopia/UTPA2-700.0.x/modules/pm/hal/manhattan/pm/ |
| H A D | halPM.c | 399 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
400 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
403 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
404 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
533 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
535 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
537 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
597 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
599 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
603 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
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| /utopia/UTPA2-700.0.x/modules/pm/hal/M7621/pm/ |
| H A D | halPM.c | 399 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
400 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
403 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
404 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
533 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
535 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
537 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
597 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
599 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
603 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
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| /utopia/UTPA2-700.0.x/modules/pm/hal/maxim/pm/ |
| H A D | halPM.c | 399 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
400 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
403 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
404 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
533 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
535 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
537 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
597 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
599 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
603 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
[all …]
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| /utopia/UTPA2-700.0.x/modules/pm/hal/mooney/pm/ |
| H A D | halPM.c | 399 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
400 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
403 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
404 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
533 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
535 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
537 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
597 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
599 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
603 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
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| /utopia/UTPA2-700.0.x/modules/pm/hal/M7821/pm/ |
| H A D | halPM.c | 399 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
400 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
403 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
404 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
533 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
535 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
537 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
597 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
599 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
603 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
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| /utopia/UTPA2-700.0.x/modules/pm/hal/messi/pm/ |
| H A D | halPM.c | 401 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
402 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
405 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
406 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
535 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
537 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
539 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
599 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
601 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
605 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
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| /utopia/UTPA2-700.0.x/modules/pm/hal/maldives/pm/ |
| H A D | halPM.c | 400 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
401 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
404 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
405 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
534 HAL_PM_WriteRegBit(0x000e41, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
536 HAL_PM_WriteRegBit(0x000e40, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
538 HAL_PM_WriteRegBit(0x001018, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
598 HAL_PM_WriteRegBit(0x000e40, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
600 HAL_PM_WriteRegBit(0x001018, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
604 HAL_PM_WriteRegBit(0x001018, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
[all …]
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| /utopia/UTPA2-700.0.x/modules/pm/hal/mustang/pm/ |
| H A D | halPM.c | 400 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
401 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
404 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
405 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
534 HAL_PM_WriteRegBit(0x000e41, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
536 HAL_PM_WriteRegBit(0x000e40, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
538 HAL_PM_WriteRegBit(0x001018, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
598 HAL_PM_WriteRegBit(0x000e40, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
600 HAL_PM_WriteRegBit(0x001018, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
604 HAL_PM_WriteRegBit(0x001018, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
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| /utopia/UTPA2-700.0.x/modules/pm/hal/k6lite/pm/ |
| H A D | halPM.c | 532 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
533 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
536 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
537 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
669 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
671 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
673 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
719 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
721 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
725 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
[all …]
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| /utopia/UTPA2-700.0.x/modules/pm/hal/k6/pm/ |
| H A D | halPM.c | 531 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
532 HAL_PM_WriteRegBit(REG_PMRTC_CTRL, DISABLE, PMRTC_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
535 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_CNT_EN); // Disable init in HAL_PM_RTC_DisableInit()
536 HAL_PM_WriteRegBit(REG_PMRTC1_CTRL, DISABLE, PMRTC1_CTRL_NOT_RSTZ); // Disable RSTZ in HAL_PM_RTC_DisableInit()
668 HAL_PM_WriteRegBit(0x000e41UL, DISABLE, __BIT6); //spi_clk=xtal in HAL_PM_SetSPIOffsetForMCU()
670 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSPIOffsetForMCU()
672 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSPIOffsetForMCU()
718 HAL_PM_WriteRegBit(0x000e40UL, DISABLE, __BIT7); //mcu51 clk=xtal in HAL_PM_SetSRAMOffsetForMCU()
720 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT3); // i_cache rstz in HAL_PM_SetSRAMOffsetForMCU()
724 HAL_PM_WriteRegBit(0x001018UL, DISABLE, __BIT1); //SPI disable in HAL_PM_SetSRAMOffsetForMCU()
[all …]
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