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Searched refs:CKG_VBY1_VMODE_LPLL_FIFO_DIV2 (Results 1 – 2 of 2) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A DhalPNL.h251 #define CKG_VBY1_VMODE_LPLL_FIFO_DIV2 (0x09) macro
H A DhalPNL.c2486 … u16_fifo_odclk_data = (CKG_VBY1_VMODE_LPLL_FIFO_DIV2 | CKG_ODCLK_A_GATED | CKG_NOSSC_ODCLK_GATED); in MHal_PNL_Init_XC_Clk()