Searched refs:CKG_VBY1_VMODE_LPLL_CLK (Results 1 – 2 of 2) sorted by relevance
249 #define CKG_VBY1_VMODE_LPLL_CLK (0 << 3) // clk from scaler macro
2497 … u16_fifo_odclk_data = (CKG_VBY1_VMODE_LPLL_CLK | CKG_ODCLK_A_GATED | CKG_NOSSC_ODCLK_GATED); in MHal_PNL_Init_XC_Clk()