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Searched refs:CKG_EDCLK_F2_GATED (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h629 #define CKG_EDCLK_F2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h627 #define CKG_EDCLK_F2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h609 #define CKG_EDCLK_F2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h709 #define CKG_EDCLK_F2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h669 #define CKG_EDCLK_F2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h721 #define CKG_EDCLK_F2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h659 #define CKG_EDCLK_F2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h726 #define CKG_EDCLK_F2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h713 #define CKG_EDCLK_F2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c5054 … MDrv_WriteByteMask(REG_CKG_EDCLK_F2, (bEnable? 0x00 : CKG_EDCLK_F2_GATED), CKG_EDCLK_F2_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c5190 … MDrv_WriteByteMask(REG_CKG_EDCLK_F2, (bEnable? 0x00 : CKG_EDCLK_F2_GATED), CKG_EDCLK_F2_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c6296 … MDrv_WriteByteMask(REG_CKG_EDCLK_F2, (bEnable? 0x00 : CKG_EDCLK_F2_GATED), CKG_EDCLK_F2_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c7019 … MDrv_WriteByteMask(REG_CKG_EDCLK_F2, (bEnable? 0x00 : CKG_EDCLK_F2_GATED), CKG_EDCLK_F2_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c7057 … MDrv_WriteByteMask(REG_CKG_EDCLK_F2, (bEnable? 0x00 : CKG_EDCLK_F2_GATED), CKG_EDCLK_F2_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c7587 … MDrv_WriteByteMask(REG_CKG_EDCLK_F2, (bEnable? 0x00 : CKG_EDCLK_F2_GATED), CKG_EDCLK_F2_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c7610 … MDrv_WriteByteMask(REG_CKG_EDCLK_F2, (bEnable? 0x00 : CKG_EDCLK_F2_GATED), CKG_EDCLK_F2_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c7822 … MDrv_WriteByteMask(REG_CKG_EDCLK_F2, (bEnable? 0x00 : CKG_EDCLK_F2_GATED), CKG_EDCLK_F2_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c7823 … MDrv_WriteByteMask(REG_CKG_EDCLK_F2, (bEnable? 0x00 : CKG_EDCLK_F2_GATED), CKG_EDCLK_F2_GATED); in Hal_SC_set_edclk()