Home
last modified time | relevance | path

Searched refs:CFG6_7F_REG_MIU_CLK_GATING_PATH0 (Results 1 – 5 of 5) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h2491 #define CFG6_7F_REG_MIU_CLK_GATING_PATH0 0x0001 // no use macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h2491 #define CFG6_7F_REG_MIU_CLK_GATING_PATH0 0x0001 // no use macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h2529 #define CFG6_7F_REG_MIU_CLK_GATING_PATH0 0x0001 // no use macro
H A DhalTSP.c8386 REG16_SET(&_RegCtrl6->CFG6_7F,CFG6_7F_REG_MIU_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
8474 REG16_CLR(&_RegCtrl6->CFG6_7F,CFG6_7F_REG_MIU_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c5792 REG16_SET(&_RegCtrl6->CFG6_7F,CFG6_7F_REG_MIU_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
5880 REG16_CLR(&_RegCtrl6->CFG6_7F,CFG6_7F_REG_MIU_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()