Searched refs:ADDR_PVR_HEAD21 (Results 1 – 11 of 11) sorted by relevance
1083 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08) in HAL_TSP_PVR_SetBuffer() macro1089 …REG16_T(ADDR_PVR_HEAD21)= (MS_U16)((phyBufStart1-_phyPVRBufMiuOffset[0])>> (MIU_BUS+ 16)) & 0xFF… in HAL_TSP_PVR_SetBuffer()1093 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()
1087 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08) in HAL_TSP_PVR_SetBuffer() macro1093 …REG16_T(ADDR_PVR_HEAD21)= (MS_U16)((phyBufStart1-_phyPVRBufMiuOffset[0])>> (MIU_BUS+ 16)) & 0xFF… in HAL_TSP_PVR_SetBuffer()1097 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()
1084 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08) in HAL_TSP_PVR_SetBuffer() macro1090 …REG16_T(ADDR_PVR_HEAD21)= (MS_U16)((phyBufStart1-_phyPVRBufMiuOffset[0])>> (MIU_BUS+ 16)) & 0xFF… in HAL_TSP_PVR_SetBuffer()1094 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()
1483 #define ADDR_PVR_HEAD21 (_u32RegBase+ 0x2a08) in HAL_TSP_PVR_SetBuffer() macro1489 REG16_T(ADDR_PVR_HEAD21)= (u32BufStart1>> (MIU_BUS+ 16)) & TSP_HW_PVR_BUF_HEAD21_MASK; in HAL_TSP_PVR_SetBuffer()1493 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()
1512 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08UL) in HAL_TSP_PVR_SetBuffer() macro1518 …REG16_T(ADDR_PVR_HEAD21)= (MS_U16)(((phyBufStart1-_phyPVRBufMiuOffset[0])>> (MIU_BUS+ 16UL)) & T… in HAL_TSP_PVR_SetBuffer()1522 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()
1530 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08UL) in HAL_TSP_PVR_SetBuffer() macro1536 …REG16_T(ADDR_PVR_HEAD21)= (MS_U16)(((phyBufStart1-_phyPVRBufMiuOffset[0])>> (MIU_BUS+ 16UL)) & T… in HAL_TSP_PVR_SetBuffer()1540 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()
1479 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08UL) in HAL_TSP_PVR_SetBuffer() macro1485 …REG16_T(ADDR_PVR_HEAD21)= (MS_U16)(((phyBufStart1-_phyPVRBufMiuOffset[0])>> (MIU_BUS+ 16UL)) & T… in HAL_TSP_PVR_SetBuffer()1489 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()
1552 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08UL) in HAL_TSP_PVR_SetBuffer() macro1558 …REG16_T(ADDR_PVR_HEAD21)= (MS_U16)(((phyBufStart1-_phyPVRBufMiuOffset[0])>> (MIU_BUS+ 16UL)) & T… in HAL_TSP_PVR_SetBuffer()1562 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()
1609 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08UL) in HAL_TSP_PVR_SetBuffer() macro1615 …REG16_T(ADDR_PVR_HEAD21)= (MS_U16)(((phyBufStart1-_phyPVRBufMiuOffset[0])>> (MIU_BUS+ 16UL)) & T… in HAL_TSP_PVR_SetBuffer()1619 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()
1570 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08UL) in HAL_TSP_PVR_SetBuffer() macro1576 …REG16_T(ADDR_PVR_HEAD21)= (MS_U16)(((phyBufStart1-_phyPVRBufMiuOffset[0])>> (MIU_BUS+ 16UL)) & T… in HAL_TSP_PVR_SetBuffer()1580 #undef ADDR_PVR_HEAD21 in HAL_TSP_PVR_SetBuffer()