Searched refs:reg68_hor_virstride (Results 1 – 11 of 11) sorted by relevance
25 RK_U32 reg68_hor_virstride; member
27 RK_U32 reg68_hor_virstride; member
26 RK_U32 reg68_hor_virstride; member
324 RK_U32 reg68_hor_virstride; member
995 hw_regs->h265d_paras.reg68_hor_virstride = fbc_hdr_stride / 64; in hal_h265d_vdpu383_gen_regs()1001 hw_regs->h265d_paras.reg68_hor_virstride = stride_y * 4 / 16; in hal_h265d_vdpu383_gen_regs()1003 hw_regs->h265d_paras.reg68_hor_virstride = stride_y * 8 / 16; in hal_h265d_vdpu383_gen_regs()1005 hw_regs->h265d_paras.reg68_hor_virstride = stride_y * 12 / 16; in hal_h265d_vdpu383_gen_regs()1007 hw_regs->h265d_paras.reg68_hor_virstride = stride_y * 6 / 16; in hal_h265d_vdpu383_gen_regs()1012 hw_regs->h265d_paras.reg68_hor_virstride = stride_y >> 4; in hal_h265d_vdpu383_gen_regs()1016 … hw_regs->h265d_paras.reg80_error_ref_hor_virstride = hw_regs->h265d_paras.reg68_hor_virstride; in hal_h265d_vdpu383_gen_regs()
387 regs->avs2d_paras.reg68_hor_virstride = fbc_hdr_stride / 64; in fill_registers()388 fbd_offset = regs->avs2d_paras.reg68_hor_virstride * MPP_ALIGN(ver_virstride, 64) * 4; in fill_registers()392 regs->avs2d_paras.reg68_hor_virstride = hor_virstride * 6 / 16; in fill_registers()397 regs->avs2d_paras.reg68_hor_virstride = hor_virstride / 16; in fill_registers()
862 vp9_hw_regs->vp9d_paras.reg68_hor_virstride = fbc_hdr_stride / 64; in hal_vp9d_vdpu383_gen_regs()863 fbd_offset = vp9_hw_regs->vp9d_paras.reg68_hor_virstride * h * 4; in hal_vp9d_vdpu383_gen_regs()876 vp9_hw_regs->vp9d_paras.reg68_hor_virstride = sw_y_hor_virstride * 6; in hal_vp9d_vdpu383_gen_regs()880 vp9_hw_regs->vp9d_paras.reg68_hor_virstride = sw_y_hor_virstride; in hal_vp9d_vdpu383_gen_regs()
2345 regs->av1d_paras.reg68_hor_virstride = fbc_hdr_stride / 64; in vdpu383_av1d_gen_regs()2346 fbd_offset = regs->av1d_paras.reg68_hor_virstride * h * 4; in vdpu383_av1d_gen_regs()2350 regs->av1d_paras.reg68_hor_virstride = MPP_ALIGN(hor_virstride * 6, 16) >> 4; in vdpu383_av1d_gen_regs()2354 regs->av1d_paras.reg68_hor_virstride = hor_virstride >> 4; in vdpu383_av1d_gen_regs()2359 regs->av1d_paras.reg80_error_ref_hor_virstride = regs->av1d_paras.reg68_hor_virstride; in vdpu383_av1d_gen_regs()
446 regs->h264d_paras.reg68_hor_virstride = fbc_hdr_stride / 64; in set_registers()450 regs->h264d_paras.reg68_hor_virstride = hor_virstride * 6 / 16; in set_registers()454 regs->h264d_paras.reg68_hor_virstride = hor_virstride / 16; in set_registers()