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Searched refs:reg5 (Results 1 – 11 of 11) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu1.c183 reg->reg5.sw_strm0_start_bit = bit_pos_in_byte; in jpegd_set_stream_offset()
190 reg->reg5.sw_jpeg_stream_all = 1; in jpegd_set_stream_offset()
208 reg->reg5.sw_cb_ac_vlctable = s->ac_index[1]; in jpegd_set_chroma_table_id()
209 reg->reg5.sw_cr_ac_vlctable = s->ac_index[2]; in jpegd_set_chroma_table_id()
212 reg->reg5.sw_cb_ac_vlctable = 0; in jpegd_set_chroma_table_id()
214 reg->reg5.sw_cb_ac_vlctable = 1; in jpegd_set_chroma_table_id()
217 reg->reg5.sw_cr_ac_vlctable = 0; in jpegd_set_chroma_table_id()
219 reg->reg5.sw_cr_ac_vlctable = 1; in jpegd_set_chroma_table_id()
224 reg->reg5.sw_cb_dc_vlctable = s->dc_index[1]; in jpegd_set_chroma_table_id()
225 reg->reg5.sw_cr_dc_vlctable = s->dc_index[2]; in jpegd_set_chroma_table_id()
[all …]
H A Dhal_jpegd_vdpu1_reg.h335 } reg5; member
H A Dhal_jpegd_vdpu2_reg.h66 } reg5; member
H A Dhal_jpegd_vdpu2.c581 reg->reg5.sw_scale_hratio = (outh << 16) / inh; in jpegd_setup_pp()
/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp_common.c689 dmsr->reg5.sw_dmsr_edge_low_thre_5 = p_dmsr_param->dmsr_edge_th_low_arr[5]; in set_dmsr_to_vdpp_reg()
690 dmsr->reg5.sw_dmsr_edge_high_thre_5 = p_dmsr_param->dmsr_edge_th_high_arr[5]; in set_dmsr_to_vdpp_reg()
863 zme->common.reg5.yrgb_src_width = yrgb_scl_info.act_width - 1; in set_zme_to_vdpp_reg()
864 zme->common.reg5.yrgb_src_height = yrgb_scl_info.act_height - 1; in set_zme_to_vdpp_reg()
H A Dvdpp_reg.h66 } reg5; // 0x0014 member
H A Dvdpp_common.h93 } reg5; /* 0x0094 */ member
288 } reg5; /* 0x0014 */ member
632 } reg5; /* 0x0214 */ member
976 } reg5; /* 0x0414 */ member
1320 } reg5; /* 0x0614 */ member
1674 } reg5; /* 0x0814 */ member
H A Dvdpp2_reg.h76 } reg5; // 0x0014 member
266 } reg5; // 0x0114 member
439 RK_U32 reg5; member
H A Dvdpp2.c453 dst_reg->es.reg5.diff_gain1 = p_es_param->es_iK2; in set_es_to_vdpp2_reg()
454 dst_reg->es.reg5.lut_x0 = p_es_param->es_iDiff2conf_lut_x[0]; in set_es_to_vdpp2_reg()
/rockchip-linux_mpp/mpp/hal/vpu/vp8d/
H A Dhal_vp8d_vdpu1.c274 regs->reg5.sw_strm1_start_bit = pic_param->stream_start_bit; in hal_vp8d_dct_partition_cfg()
318 regs->reg5.sw_strm0_start_bit = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
565 regs->reg5.sw_boolean_value = pic_param->bool_value; in hal_vp8d_vdpu1_gen_regs()
566 regs->reg5.sw_boolean_range = pic_param->bool_range; in hal_vp8d_vdpu1_gen_regs()
H A Dhal_vp8d_vdpu1_reg.h122 } reg5; member