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Searched refs:pre_intra_cla5_B0 (Results 1 – 4 of 4) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu541.c278 reg->pre_intra_cla5_B0.pre_intra_cla5_m0 = 27; in vepu540_h265_set_l2_regs()
279 reg->pre_intra_cla5_B0.pre_intra_cla5_m1 = 26; in vepu540_h265_set_l2_regs()
280 reg->pre_intra_cla5_B0.pre_intra_cla5_m2 = 28; in vepu540_h265_set_l2_regs()
281 reg->pre_intra_cla5_B0.pre_intra_cla5_m3 = 29; in vepu540_h265_set_l2_regs()
282 reg->pre_intra_cla5_B0.pre_intra_cla5_m4 = 30; in vepu540_h265_set_l2_regs()
H A Dhal_h265e_vepu54x_reg_l2.h396 } pre_intra_cla5_B0; member
H A Dhal_h265e_vepu580.c459 reg->pre_intra_cla5_B0.pre_intra_cla5_m0 = 27; in vepu580_h265_sobel_cfg()
460 reg->pre_intra_cla5_B0.pre_intra_cla5_m1 = 26; in vepu580_h265_sobel_cfg()
461 reg->pre_intra_cla5_B0.pre_intra_cla5_m2 = 28; in vepu580_h265_sobel_cfg()
462 reg->pre_intra_cla5_B0.pre_intra_cla5_m3 = 29; in vepu580_h265_sobel_cfg()
463 reg->pre_intra_cla5_B0.pre_intra_cla5_m4 = 30; in vepu580_h265_sobel_cfg()
H A Dhal_h265e_vepu580_reg.h1288 } pre_intra_cla5_B0; member