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Searched refs:g_buf (Results 1 – 10 of 10) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkdec/vp9d/
H A Dhal_vp9d_rkv.c35 Vp9dRegBuf g_buf[MAX_GEN_REG]; member
63 hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(VP9_REGS)); in hal_vp9d_alloc_res()
65 &hw_ctx->g_buf[i].probe_base, PROB_SIZE); in hal_vp9d_alloc_res()
71 &hw_ctx->g_buf[i].count_base, COUNT_SIZE); in hal_vp9d_alloc_res()
77 &hw_ctx->g_buf[i].segid_cur_base, MAX_SEGMAP_SIZE); in hal_vp9d_alloc_res()
83 &hw_ctx->g_buf[i].segid_last_base, MAX_SEGMAP_SIZE); in hal_vp9d_alloc_res()
124 if (hw_ctx->g_buf[i].probe_base) { in hal_vp9d_release_res()
125 ret = mpp_buffer_put(hw_ctx->g_buf[i].probe_base); in hal_vp9d_release_res()
131 if (hw_ctx->g_buf[i].count_base) { in hal_vp9d_release_res()
132 ret = mpp_buffer_put(hw_ctx->g_buf[i].count_base); in hal_vp9d_release_res()
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H A Dhal_vp9d_vdpu383.c41 Vp9dRegBuf g_buf[MAX_GEN_REG]; member
145 hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu383Vp9dRegSet)); in hal_vp9d_alloc_res()
147 &hw_ctx->g_buf[i].global_base, GBL_SIZE); in hal_vp9d_alloc_res()
148 mpp_buffer_attach_dev(hw_ctx->g_buf[i].global_base, p_hal->dev); in hal_vp9d_alloc_res()
154 &hw_ctx->g_buf[i].probe_base, PROB_KF_SIZE); in hal_vp9d_alloc_res()
159 mpp_buffer_attach_dev(hw_ctx->g_buf[i].probe_base, p_hal->dev); in hal_vp9d_alloc_res()
161 &hw_ctx->g_buf[i].count_base, COUNT_SIZE); in hal_vp9d_alloc_res()
166 mpp_buffer_attach_dev(hw_ctx->g_buf[i].count_base, p_hal->dev); in hal_vp9d_alloc_res()
233 if (hw_ctx->g_buf[i].global_base) { in hal_vp9d_release_res()
234 ret = mpp_buffer_put(hw_ctx->g_buf[i].global_base); in hal_vp9d_release_res()
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H A Dhal_vp9d_vdpu34x.c47 Vp9dRegBuf g_buf[MAX_GEN_REG]; member
108 hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu34xVp9dRegSet)); in hal_vp9d_alloc_res()
109 … ret = mpp_buffer_get(p_hal->group, &hw_ctx->g_buf[i].probe_base, VDPU34X_PROBE_BUFFER_SIZE); in hal_vp9d_alloc_res()
156 if (hw_ctx->g_buf[i].probe_base) { in hal_vp9d_release_res()
157 ret = mpp_buffer_put(hw_ctx->g_buf[i].probe_base); in hal_vp9d_release_res()
163 if (hw_ctx->g_buf[i].hw_regs) { in hal_vp9d_release_res()
164 mpp_free(hw_ctx->g_buf[i].hw_regs); in hal_vp9d_release_res()
165 hw_ctx->g_buf[i].hw_regs = NULL; in hal_vp9d_release_res()
167 if (hw_ctx->g_buf[i].rcb_buf) { in hal_vp9d_release_res()
168 ret = mpp_buffer_put(hw_ctx->g_buf[i].rcb_buf); in hal_vp9d_release_res()
[all …]
H A Dhal_vp9d_vdpu382.c47 Vp9dRegBuf g_buf[MAX_GEN_REG]; member
108 hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu382Vp9dRegSet)); in hal_vp9d_alloc_res()
109 … ret = mpp_buffer_get(p_hal->group, &hw_ctx->g_buf[i].probe_base, VDPU382_PROBE_BUFFER_SIZE); in hal_vp9d_alloc_res()
157 if (hw_ctx->g_buf[i].probe_base) { in hal_vp9d_release_res()
158 ret = mpp_buffer_put(hw_ctx->g_buf[i].probe_base); in hal_vp9d_release_res()
164 if (hw_ctx->g_buf[i].hw_regs) { in hal_vp9d_release_res()
165 mpp_free(hw_ctx->g_buf[i].hw_regs); in hal_vp9d_release_res()
166 hw_ctx->g_buf[i].hw_regs = NULL; in hal_vp9d_release_res()
168 if (hw_ctx->g_buf[i].rcb_buf) { in hal_vp9d_release_res()
169 ret = mpp_buffer_put(hw_ctx->g_buf[i].rcb_buf); in hal_vp9d_release_res()
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/rockchip-linux_mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_rkv.c48 reg_ctx->g_buf[i].hw_regs = in hal_h265d_alloc_res()
51 &reg_ctx->g_buf[i].scaling_list_data, in hal_h265d_alloc_res()
58 ret = mpp_buffer_get(reg_ctx->group, &reg_ctx->g_buf[i].pps_data, in hal_h265d_alloc_res()
65 ret = mpp_buffer_get(reg_ctx->group, &reg_ctx->g_buf[i].rps_data, in hal_h265d_alloc_res()
104 if (reg_ctx->g_buf[i].scaling_list_data) { in hal_h265d_release_res()
105 ret = mpp_buffer_put(reg_ctx->g_buf[i].scaling_list_data); in hal_h265d_release_res()
111 if (reg_ctx->g_buf[i].pps_data) { in hal_h265d_release_res()
112 ret = mpp_buffer_put(reg_ctx->g_buf[i].pps_data); in hal_h265d_release_res()
119 if (reg_ctx->g_buf[i].rps_data) { in hal_h265d_release_res()
120 ret = mpp_buffer_put(reg_ctx->g_buf[i].rps_data); in hal_h265d_release_res()
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H A Dhal_h265d_vdpu382.c142 reg_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu382H265dRegSet)); in hal_h265d_vdpu382_init()
150 reg_ctx->hw_regs = reg_ctx->g_buf[0].hw_regs; in hal_h265d_vdpu382_init()
177 RK_U32 loop = reg_ctx->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->g_buf) : 1; in hal_h265d_vdpu382_deinit()
199 MPP_FREE(reg_ctx->g_buf[i].hw_regs); in hal_h265d_vdpu382_deinit()
560 RK_U32 loop = reg_ctx->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->g_buf) : 1; in hal_h265d_rcb_info_update()
677 if (!reg_ctx->g_buf[i].use_flag) { in hal_h265d_vdpu382_gen_regs()
684 reg_ctx->hw_regs = reg_ctx->g_buf[i].hw_regs; in hal_h265d_vdpu382_gen_regs()
685 reg_ctx->g_buf[i].use_flag = 1; in hal_h265d_vdpu382_gen_regs()
963 p = (RK_U8*)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu382_start()
964 hw_regs = ( Vdpu382H265dRegSet *)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu382_start()
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H A Dhal_h265d_vdpu384a.c131 reg_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu384aH265dRegSet)); in hal_h265d_vdpu384a_init()
140 reg_ctx->hw_regs = reg_ctx->g_buf[0].hw_regs; in hal_h265d_vdpu384a_init()
157 RK_U32 loop = reg_ctx->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->g_buf) : 1; in hal_h265d_vdpu384a_deinit()
179 MPP_FREE(reg_ctx->g_buf[i].hw_regs); in hal_h265d_vdpu384a_deinit()
741 RK_U32 loop = reg_ctx->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->g_buf) : 1; in hal_h265d_rcb_info_update()
807 if (!reg_ctx->g_buf[i].use_flag) { in hal_h265d_vdpu384a_gen_regs()
813 reg_ctx->hw_regs = reg_ctx->g_buf[i].hw_regs; in hal_h265d_vdpu384a_gen_regs()
814 reg_ctx->g_buf[i].use_flag = 1; in hal_h265d_vdpu384a_gen_regs()
1188 p = (RK_U8*)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu384a_start()
1189 hw_regs = ( Vdpu384aH265dRegSet *)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu384a_start()
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H A Dhal_h265d_vdpu34x.c144 reg_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu34xH265dRegSet)); in hal_h265d_vdpu34x_init()
152 reg_ctx->hw_regs = reg_ctx->g_buf[0].hw_regs; in hal_h265d_vdpu34x_init()
179 RK_U32 loop = reg_ctx->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->g_buf) : 1; in hal_h265d_vdpu34x_deinit()
206 MPP_FREE(reg_ctx->g_buf[i].hw_regs); in hal_h265d_vdpu34x_deinit()
789 RK_U32 loop = reg_ctx->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->g_buf) : 1; in hal_h265d_rcb_info_update()
871 if (!reg_ctx->g_buf[i].use_flag) { in hal_h265d_vdpu34x_gen_regs()
878 reg_ctx->hw_regs = reg_ctx->g_buf[i].hw_regs; in hal_h265d_vdpu34x_gen_regs()
879 reg_ctx->g_buf[i].use_flag = 1; in hal_h265d_vdpu34x_gen_regs()
1170 p = (RK_U8*)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu34x_start()
1171 hw_regs = ( Vdpu34xH265dRegSet *)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu34x_start()
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H A Dhal_h265d_vdpu383.c154 reg_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu383H265dRegSet)); in hal_h265d_vdpu383_init()
164 reg_ctx->hw_regs = reg_ctx->g_buf[0].hw_regs; in hal_h265d_vdpu383_init()
188 RK_U32 loop = reg_ctx->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->g_buf) : 1; in hal_h265d_vdpu383_deinit()
210 MPP_FREE(reg_ctx->g_buf[i].hw_regs); in hal_h265d_vdpu383_deinit()
745 RK_U32 loop = reg_ctx->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->g_buf) : 1; in hal_h265d_rcb_info_update()
887 if (!reg_ctx->g_buf[i].use_flag) { in hal_h265d_vdpu383_gen_regs()
894 reg_ctx->hw_regs = reg_ctx->g_buf[i].hw_regs; in hal_h265d_vdpu383_gen_regs()
895 reg_ctx->g_buf[i].use_flag = 1; in hal_h265d_vdpu383_gen_regs()
1250 p = (RK_U8*)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu383_start()
1251 hw_regs = ( Vdpu383H265dRegSet *)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu383_start()
[all …]
H A Dhal_h265d_ctx.h57 H265dRegBuf g_buf[MAX_GEN_REG]; member