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Searched refs:first_free_bit (Results 1 – 6 of 6) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/h264e/
H A Dhal_h264e_vepu1_v2.c303 RK_U32 first_free_bit = 0; in hal_h264e_vepu1_gen_regs_v2() local
326 first_free_bit = setup_output_packet(ctx, reg, task->output, offset); in hal_h264e_vepu1_gen_regs_v2()
329 hw_mbrc->hdr_free_size = first_free_bit / 8; in hal_h264e_vepu1_gen_regs_v2()
385 val = VEPU_REG_STREAM_START_OFFSET(first_free_bit); in hal_h264e_vepu1_gen_regs_v2()
H A Dhal_h264e_vepu2_v2.c353 RK_U32 first_free_bit = 0; in hal_h264e_vepu2_gen_regs_v2() local
375 first_free_bit = setup_output_packet(ctx, reg, task->output, offset); in hal_h264e_vepu2_gen_regs_v2()
379 hw_mbrc->hdr_free_size = first_free_bit / 8; in hal_h264e_vepu2_gen_regs_v2()
423 val = VEPU_REG_STREAM_START_OFFSET(first_free_bit) | in hal_h264e_vepu2_gen_regs_v2()
/rockchip-linux_mpp/mpp/hal/vpu/vp8e/
H A Dhal_vp8e_base.h225 RK_U32 first_free_bit; member
H A Dhal_vp8e_base.c447 hw_cfg->first_free_bit = (hw_cfg->output_strm_offset & 0x07) * 8; in set_new_frame()
450 if (hw_cfg->first_free_bit != 0) { in set_new_frame()
454 for (val = 6; val >= hw_cfg->first_free_bit / 8; val--) { in set_new_frame()
465 if (hw_cfg->first_free_bit > 32) { in set_new_frame()
1537 const RK_U32 hw_offset = ctx->hw_cfg.first_free_bit / 8; in hal_vp8e_update_buffers()
H A Dhal_vp8e_vepu1_v2.c158 regs->sw37.start_offset = hw_cfg->first_free_bit; in vp8e_vpu_frame_start()
H A Dhal_vp8e_vepu2_v2.c161 regs->sw60.start_offset = hw_cfg->first_free_bit; in vp8e_vpu_frame_start()