| /rk3399_rockchip-uboot/drivers/watchdog/ |
| H A D | omap_wdt.c | 54 struct wd_timer *wdt = (struct wd_timer *)WDT_BASE; in hw_watchdog_reset() local
57 while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WTGR) in hw_watchdog_reset()
61 writel(wdt_trgr_pattern, &wdt->wdtwtgr); in hw_watchdog_reset()
64 while ((readl(&wdt->wdtwwps) & WDT_WWPS_PEND_WTGR)) in hw_watchdog_reset()
70 struct wd_timer *wdt = (struct wd_timer *)WDT_BASE; in omap_wdt_set_timeout() local
74 while (readl(&wdt->wdtwwps) & WDT_WWPS_PEND_WLDR) in omap_wdt_set_timeout()
77 writel(pre_margin, &wdt->wdtwldr); in omap_wdt_set_timeout()
78 while (readl(&wdt->wdtwwps) & WDT_WWPS_PEND_WLDR) in omap_wdt_set_timeout()
86 struct wd_timer *wdt = (struct wd_timer *)WDT_BASE; in hw_watchdog_disable() local
91 writel(0xAAAA, &wdt->wdtwspr); in hw_watchdog_disable()
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| H A D | s5p_wdt.c | 16 struct s5p_watchdog *wdt = in wdt_stop() local
20 wtcon = readl(&wdt->wtcon); in wdt_stop()
23 writel(wtcon, &wdt->wtcon); in wdt_stop()
28 struct s5p_watchdog *wdt = in wdt_start() local
34 wtcon = readl(&wdt->wtcon); in wdt_start()
40 writel(timeout, &wdt->wtdat); in wdt_start()
41 writel(timeout, &wdt->wtcnt); in wdt_start()
42 writel(wtcon, &wdt->wtcon); in wdt_start()
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| H A D | sandbox_wdt.c | 18 state->wdt.counter = timeout; in sandbox_wdt_start()
19 state->wdt.running = true; in sandbox_wdt_start()
28 state->wdt.running = false; in sandbox_wdt_stop()
37 state->wdt.reset_count++; in sandbox_wdt_reset()
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| H A D | Makefile | 19 obj-$(CONFIG_WDT) += wdt-uclass.o
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| H A D | wdt-uclass.c | 69 UCLASS_DRIVER(wdt) = {
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| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf52x2/ |
| H A D | cpu.c | 55 wdog_t *wdt = (wdog_t *)(MMAP_WDOG); in watchdog_reset() local
57 out_be16(&wdt->sr, 0x5555); in watchdog_reset()
58 out_be16(&wdt->sr, 0xaaaa); in watchdog_reset()
63 wdog_t *wdt = (wdog_t *)(MMAP_WDOG); in watchdog_disable() local
66 out_be16(&wdt->sr, 0x5555); in watchdog_disable()
67 out_be16(&wdt->sr, 0xaaaa); in watchdog_disable()
69 out_be16(&wdt->cr, 0); in watchdog_disable()
77 wdog_t *wdt = (wdog_t *)(MMAP_WDOG); in watchdog_init() local
80 out_be16(&wdt->cr, 0); in watchdog_init()
83 out_be16(&wdt->mr, in watchdog_init()
[all …]
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| /rk3399_rockchip-uboot/test/dm/ |
| H A D | wdt.c | 24 ut_asserteq(0, state->wdt.counter); in dm_test_wdt_base()
25 ut_asserteq(false, state->wdt.running); in dm_test_wdt_base()
28 ut_asserteq(timeout, state->wdt.counter); in dm_test_wdt_base()
29 ut_asserteq(true, state->wdt.running); in dm_test_wdt_base()
31 uint reset_count = state->wdt.reset_count; in dm_test_wdt_base()
33 ut_asserteq(reset_count + 1, state->wdt.reset_count); in dm_test_wdt_base()
34 ut_asserteq(true, state->wdt.running); in dm_test_wdt_base()
37 ut_asserteq(false, state->wdt.running); in dm_test_wdt_base()
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| /rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/lpc32xx/ |
| H A D | cpu.c | 16 static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE; variable
28 writel(13000, &wdt->pulse); in reset_cpu()
32 | WDTIM_MCTRL_M_RES2, &wdt->mctrl); in reset_cpu()
35 writel(0x01, &wdt->emr); in reset_cpu()
38 writel(WDTIM_MCTRL_M_RES1, &wdt->mctrl); in reset_cpu()
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| /rk3399_rockchip-uboot/drivers/sysreset/ |
| H A D | sysreset_ast.c | 18 struct udevice *wdt; in ast_sysreset_request() local
20 int ret = uclass_first_device(UCLASS_WDT, &wdt); in ast_sysreset_request()
36 ret = wdt_expire_now(wdt, reset_mode); in ast_sysreset_request()
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| H A D | sysreset_watchdog.c | 14 struct udevice *wdt; member
22 ret = wdt_expire_now(priv->wdt, 0); in wdt_reboot_request()
39 "wdt", &priv->wdt); in wdt_reboot_probe()
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| /rk3399_rockchip-uboot/board/work-microwave/work_92105/ |
| H A D | work_92105.c | 24 static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE; variable
29 writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl); in reset_periph()
31 writel(0, &wdt->mctrl); in reset_periph()
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| /rk3399_rockchip-uboot/arch/mips/dts/ |
| H A D | brcm,bcm6338.dtsi | 83 wdt: watchdog@fffe021c { label
84 compatible = "brcm,bcm6345-wdt";
89 wdt-reboot {
90 compatible = "wdt-reboot";
91 wdt = <&wdt>;
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| H A D | brcm,bcm6348.dtsi | 83 wdt: watchdog@fffe021c { label
84 compatible = "brcm,bcm6345-wdt";
89 wdt-reboot {
90 compatible = "wdt-reboot";
91 wdt = <&wdt>;
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| H A D | brcm,bcm3380.dtsi | 98 wdt: watchdog@14e000dc { label
99 compatible = "brcm,bcm6345-wdt";
105 wdt-reboot {
106 compatible = "wdt-reboot";
107 wdt = <&wdt>;
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| H A D | brcm,bcm6358.dtsi | 90 wdt: watchdog@fffe005c { label
91 compatible = "brcm,bcm6345-wdt";
96 wdt-reboot {
97 compatible = "wdt-reboot";
98 wdt = <&wdt>;
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| H A D | brcm,bcm6328.dtsi | 81 wdt: watchdog@1000005c { label
82 compatible = "brcm,bcm6345-wdt";
87 wdt-reboot {
88 compatible = "wdt-reboot";
89 wdt = <&wdt>;
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| H A D | brcm,bcm63268.dtsi | 87 wdt: watchdog@1000009c { label
88 compatible = "brcm,bcm6345-wdt";
93 wdt-reboot {
94 compatible = "wdt-reboot";
95 wdt = <&wdt>;
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| /rk3399_rockchip-uboot/drivers/reset/ |
| H A D | ast2500-reset.c | 21 struct udevice *wdt; member
31 &priv->wdt); in ast2500_ofdata_to_platdata()
60 ret = wdt_expire_now(priv->wdt, reset_ctl->id); in ast2500_reset_assert()
65 ret = wdt_expire_now(priv->wdt, reset_ctl->id); in ast2500_reset_assert()
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| /rk3399_rockchip-uboot/board/timll/devkit3250/ |
| H A D | devkit3250.c | 21 static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE; variable
27 writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl); in reset_periph()
30 writel(0, &wdt->mctrl); in reset_periph()
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| /rk3399_rockchip-uboot/arch/arm/mach-at91/ |
| H A D | spl.c | 20 struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT; in at91_disable_wdt() local
22 writel(AT91_WDT_MR_WDDIS, &wdt->mr); in at91_disable_wdt()
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc86xx/ |
| H A D | cpu.c | 148 volatile ccsr_wdt_t *wdt = &immap->im_wdt; in watchdog_reset() local
153 wdt->swsrr = 0x556c; in watchdog_reset()
154 wdt->swsrr = 0xaa39; in watchdog_reset()
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | keystone.dtsi | 92 ti,wdt-list = <0>;
209 wdt: wdt@022f0080 { label
210 compatible = "ti,keystone-wdt","ti,davinci-wdt";
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc83xx/ |
| H A D | cpu.c | 192 immr->wdt.swsrr = 0x556c; in watchdog_reset()
193 immr->wdt.swsrr = 0xaa39; in watchdog_reset()
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-armv7/ |
| H A D | wdt.h | 16 struct wdt { struct
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| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | immap_83xx.h | 632 wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ member
686 wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ member
721 wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ member
766 wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ member
810 wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ member
850 wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ member
886 wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ member
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