Searched refs:tmp_count (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_init.c | 214 u32 reg, tmp_count, cs, ui; in ddr3_save_and_set_training_windows() local 244 tmp_count = 0; in ddr3_save_and_set_training_windows() 264 reg_write(win_ctrl_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows() 266 reg = (((SDRAM_CS_SIZE + 1) * (tmp_count)) & in ddr3_save_and_set_training_windows() 268 reg_write(win_base_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows() 273 win_jump_index * tmp_count, 0); in ddr3_save_and_set_training_windows() 275 tmp_count++; in ddr3_save_and_set_training_windows()
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| /rk3399_rockchip-uboot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_init.c | 200 u32 reg, tmp_count, cs, ui; in ddr3_save_and_set_training_windows() local 231 tmp_count = 0; in ddr3_save_and_set_training_windows() 251 reg_write(win_ctrl_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows() 253 reg = ((SDRAM_CS_SIZE + 1) * (tmp_count)) & 0xFFFF0000; in ddr3_save_and_set_training_windows() 254 reg_write(win_base_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows() 259 win_jump_index * tmp_count, 0); in ddr3_save_and_set_training_windows() 262 tmp_count++; in ddr3_save_and_set_training_windows()
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| H A D | ddr3_write_leveling.c | 188 u32 tmp_count, ecc, reg; in ddr3_wl_supplement() local 228 tmp_count = 0; in ddr3_wl_supplement() 265 tmp_count * (SDRAM_CS_SIZE + 1) + in ddr3_wl_supplement() 421 tmp_count++; in ddr3_wl_supplement()
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