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Searched refs:tgcr (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-davinci/
H A Dreset.c19 writel(0x08, &wdttimer->tgcr); in reset_cpu()
20 writel(readl(&wdttimer->tgcr) | 0x03, &wdttimer->tgcr); in reset_cpu()
H A Dtimer.c42 writel(0x0, &timer->tgcr); in timer_init()
43 writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr); in timer_init()
109 writel(0x0, &wdttimer->tgcr); in davinci_hw_watchdog_enable()
111 writel(0x08 | 0x03 | ((TIM_CLK_DIV - 1) << 8), &wdttimer->tgcr); in davinci_hw_watchdog_enable()
/rk3399_rockchip-uboot/arch/arm/mach-davinci/include/mach/
H A Dtimer_defs.h20 u_int32_t tgcr; member
/rk3399_rockchip-uboot/
H A DREADME4765 …tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0…
4772 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
4775 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
4778 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
4781 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0