1*601fbec7SMasahiro Yamada /*
2*601fbec7SMasahiro Yamada * Processor reset using WDT.
3*601fbec7SMasahiro Yamada *
4*601fbec7SMasahiro Yamada * Copyright (C) 2012 Dmitry Bondar <bond@inmys.ru>
5*601fbec7SMasahiro Yamada * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6*601fbec7SMasahiro Yamada *
7*601fbec7SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+
8*601fbec7SMasahiro Yamada */
9*601fbec7SMasahiro Yamada
10*601fbec7SMasahiro Yamada #include <common.h>
11*601fbec7SMasahiro Yamada #include <asm/io.h>
12*601fbec7SMasahiro Yamada #include <asm/arch/timer_defs.h>
13*601fbec7SMasahiro Yamada #include <asm/arch/hardware.h>
14*601fbec7SMasahiro Yamada
reset_cpu(unsigned long a)15*601fbec7SMasahiro Yamada void reset_cpu(unsigned long a)
16*601fbec7SMasahiro Yamada {
17*601fbec7SMasahiro Yamada struct davinci_timer *const wdttimer =
18*601fbec7SMasahiro Yamada (struct davinci_timer *)DAVINCI_WDOG_BASE;
19*601fbec7SMasahiro Yamada writel(0x08, &wdttimer->tgcr);
20*601fbec7SMasahiro Yamada writel(readl(&wdttimer->tgcr) | 0x03, &wdttimer->tgcr);
21*601fbec7SMasahiro Yamada writel(0, &wdttimer->tim12);
22*601fbec7SMasahiro Yamada writel(0, &wdttimer->tim34);
23*601fbec7SMasahiro Yamada writel(0, &wdttimer->prd12);
24*601fbec7SMasahiro Yamada writel(0, &wdttimer->prd34);
25*601fbec7SMasahiro Yamada writel(readl(&wdttimer->tcr) | 0x40, &wdttimer->tcr);
26*601fbec7SMasahiro Yamada writel(readl(&wdttimer->wdtcr) | 0x4000, &wdttimer->wdtcr);
27*601fbec7SMasahiro Yamada writel(0xa5c64000, &wdttimer->wdtcr);
28*601fbec7SMasahiro Yamada writel(0xda7e4000, &wdttimer->wdtcr);
29*601fbec7SMasahiro Yamada writel(0x4000, &wdttimer->wdtcr);
30*601fbec7SMasahiro Yamada while (1)
31*601fbec7SMasahiro Yamada /*nothing*/;
32*601fbec7SMasahiro Yamada }
33