Searched refs:soft (Results 1 – 19 of 19) sorted by relevance
3 The soft SPI bus implementation allows the use of GPIO pins to simulate a7 The soft SPI node requires the following properties:9 compatible: "u-boot,soft-spi"23 soft-spi {24 compatible = "u-boot,soft-spi";
13 CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul14 CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div
32 struct fp_soft_struct soft; member
60 nand-ecc-mode = "soft";
102 nand-ecc-mode = "soft";
111 nand-ecc-mode = "soft";
94 nand-ecc-mode = "soft";
67 nand-ecc-mode = "soft";
128 nand-ecc-mode = "soft";
132 nand-ecc-mode = "soft";
73 nand-ecc-mode = "soft";
69 nand-ecc-mode = "soft";
22 soft-spi {
252 nand-ecc-mode = "soft";
166 nand-ecc-mode = "soft";
1 N1213 is a configurable hard/soft core of NDS32's N12 CPU family.
27 4. In case of soft failure, appropriate error is dumped on console.
167 @ Disable CORE soft reset
13 connected with the "soft reset switch"