xref: /rk3399_rockchip-uboot/arch/arm/dts/ethernut5.dts (revision 94db5120d874821e5fd1847e1825759aaf74290b)
1*94db5120SWenyou.Yang@microchip.com/*
2*94db5120SWenyou.Yang@microchip.com * ethernut5.dts - Device Tree file for Ethernut 5 board
3*94db5120SWenyou.Yang@microchip.com *
4*94db5120SWenyou.Yang@microchip.com * Copyright (C) 2012 egnite GmbH <info@egnite.de>
5*94db5120SWenyou.Yang@microchip.com *
6*94db5120SWenyou.Yang@microchip.com * Licensed under GPLv2.
7*94db5120SWenyou.Yang@microchip.com */
8*94db5120SWenyou.Yang@microchip.com/dts-v1/;
9*94db5120SWenyou.Yang@microchip.com#include "at91sam9xe.dtsi"
10*94db5120SWenyou.Yang@microchip.com
11*94db5120SWenyou.Yang@microchip.com/ {
12*94db5120SWenyou.Yang@microchip.com	model = "Ethernut 5";
13*94db5120SWenyou.Yang@microchip.com	compatible = "egnite,ethernut5", "atmel,at91sam9260", "atmel,at91sam9";
14*94db5120SWenyou.Yang@microchip.com
15*94db5120SWenyou.Yang@microchip.com	chosen {
16*94db5120SWenyou.Yang@microchip.com		bootargs = "console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2";
17*94db5120SWenyou.Yang@microchip.com	};
18*94db5120SWenyou.Yang@microchip.com
19*94db5120SWenyou.Yang@microchip.com	memory {
20*94db5120SWenyou.Yang@microchip.com		reg = <0x20000000 0x08000000>;
21*94db5120SWenyou.Yang@microchip.com	};
22*94db5120SWenyou.Yang@microchip.com
23*94db5120SWenyou.Yang@microchip.com	clocks {
24*94db5120SWenyou.Yang@microchip.com		slow_xtal {
25*94db5120SWenyou.Yang@microchip.com			clock-frequency = <32768>;
26*94db5120SWenyou.Yang@microchip.com		};
27*94db5120SWenyou.Yang@microchip.com
28*94db5120SWenyou.Yang@microchip.com		main_xtal {
29*94db5120SWenyou.Yang@microchip.com			clock-frequency = <18432000>;
30*94db5120SWenyou.Yang@microchip.com		};
31*94db5120SWenyou.Yang@microchip.com	};
32*94db5120SWenyou.Yang@microchip.com
33*94db5120SWenyou.Yang@microchip.com	ahb {
34*94db5120SWenyou.Yang@microchip.com		apb {
35*94db5120SWenyou.Yang@microchip.com			dbgu: serial@fffff200 {
36*94db5120SWenyou.Yang@microchip.com				status = "okay";
37*94db5120SWenyou.Yang@microchip.com			};
38*94db5120SWenyou.Yang@microchip.com
39*94db5120SWenyou.Yang@microchip.com			usart0: serial@fffb0000 {
40*94db5120SWenyou.Yang@microchip.com				status = "okay";
41*94db5120SWenyou.Yang@microchip.com			};
42*94db5120SWenyou.Yang@microchip.com
43*94db5120SWenyou.Yang@microchip.com			usart1: serial@fffb4000 {
44*94db5120SWenyou.Yang@microchip.com				status = "okay";
45*94db5120SWenyou.Yang@microchip.com			};
46*94db5120SWenyou.Yang@microchip.com
47*94db5120SWenyou.Yang@microchip.com			macb0: ethernet@fffc4000 {
48*94db5120SWenyou.Yang@microchip.com				phy-mode = "rmii";
49*94db5120SWenyou.Yang@microchip.com				status = "okay";
50*94db5120SWenyou.Yang@microchip.com			};
51*94db5120SWenyou.Yang@microchip.com
52*94db5120SWenyou.Yang@microchip.com			usb1: gadget@fffa4000 {
53*94db5120SWenyou.Yang@microchip.com				atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
54*94db5120SWenyou.Yang@microchip.com				status = "okay";
55*94db5120SWenyou.Yang@microchip.com			};
56*94db5120SWenyou.Yang@microchip.com		};
57*94db5120SWenyou.Yang@microchip.com
58*94db5120SWenyou.Yang@microchip.com		nand0: nand@40000000 {
59*94db5120SWenyou.Yang@microchip.com			nand-bus-width = <8>;
60*94db5120SWenyou.Yang@microchip.com			nand-ecc-mode = "soft";
61*94db5120SWenyou.Yang@microchip.com			nand-on-flash-bbt;
62*94db5120SWenyou.Yang@microchip.com			status = "okay";
63*94db5120SWenyou.Yang@microchip.com
64*94db5120SWenyou.Yang@microchip.com			gpios = <0
65*94db5120SWenyou.Yang@microchip.com				 &pioC 14 GPIO_ACTIVE_HIGH
66*94db5120SWenyou.Yang@microchip.com				 0
67*94db5120SWenyou.Yang@microchip.com				>;
68*94db5120SWenyou.Yang@microchip.com
69*94db5120SWenyou.Yang@microchip.com			root@0 {
70*94db5120SWenyou.Yang@microchip.com				label = "root";
71*94db5120SWenyou.Yang@microchip.com				reg = <0x0 0x08000000>;
72*94db5120SWenyou.Yang@microchip.com			};
73*94db5120SWenyou.Yang@microchip.com
74*94db5120SWenyou.Yang@microchip.com			data@20000 {
75*94db5120SWenyou.Yang@microchip.com				label = "data";
76*94db5120SWenyou.Yang@microchip.com				reg = <0x08000000 0x38000000>;
77*94db5120SWenyou.Yang@microchip.com			};
78*94db5120SWenyou.Yang@microchip.com		};
79*94db5120SWenyou.Yang@microchip.com
80*94db5120SWenyou.Yang@microchip.com		usb0: ohci@00500000 {
81*94db5120SWenyou.Yang@microchip.com			num-ports = <2>;
82*94db5120SWenyou.Yang@microchip.com			status = "okay";
83*94db5120SWenyou.Yang@microchip.com		};
84*94db5120SWenyou.Yang@microchip.com	};
85*94db5120SWenyou.Yang@microchip.com
86*94db5120SWenyou.Yang@microchip.com	i2c-gpio-0 {
87*94db5120SWenyou.Yang@microchip.com		status = "okay";
88*94db5120SWenyou.Yang@microchip.com
89*94db5120SWenyou.Yang@microchip.com		pcf8563@50 {
90*94db5120SWenyou.Yang@microchip.com			compatible = "nxp,pcf8563";
91*94db5120SWenyou.Yang@microchip.com			reg = <0x51>;
92*94db5120SWenyou.Yang@microchip.com		};
93*94db5120SWenyou.Yang@microchip.com	};
94*94db5120SWenyou.Yang@microchip.com};
95