Searched refs:reg_num (Results 1 – 5 of 5) sorted by relevance
| /rk3399_rockchip-uboot/drivers/qe/ |
| H A D | uccf.c | 39 u8 *reg_num, u8 *shift) in ucc_get_cmxucr_reg() argument
44 *reg_num = 1; in ucc_get_cmxucr_reg()
49 *reg_num = 1; in ucc_get_cmxucr_reg()
54 *reg_num = 2; in ucc_get_cmxucr_reg()
59 *reg_num = 2; in ucc_get_cmxucr_reg()
64 *reg_num = 3; in ucc_get_cmxucr_reg()
69 *reg_num = 3; in ucc_get_cmxucr_reg()
74 *reg_num = 4; in ucc_get_cmxucr_reg()
79 *reg_num = 4; in ucc_get_cmxucr_reg()
90 u8 reg_num = 0; in ucc_set_clk_src() local
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| /rk3399_rockchip-uboot/drivers/pinctrl/aspeed/ |
| H A D | pinctrl_ast2500.c | 39 unsigned reg_num; member
93 if (config->reg_num > 6) in ast2500_pinctrl_group_set()
94 ctrl_reg = &priv->scu->pinmux_ctrl1[config->reg_num - 7]; in ast2500_pinctrl_group_set()
96 ctrl_reg = &priv->scu->pinmux_ctrl[config->reg_num - 1]; in ast2500_pinctrl_group_set()
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| /rk3399_rockchip-uboot/drivers/net/ |
| H A D | davinci_emac.h | 294 int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data);
295 int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data);
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| H A D | davinci_emac.c | 207 int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data) in davinci_eth_phy_read() argument
216 ((reg_num & 0x1f) << 21) | in davinci_eth_phy_read()
233 int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data) in davinci_eth_phy_write() argument
241 ((reg_num & 0x1f) << 21) | in davinci_eth_phy_write()
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| /rk3399_rockchip-uboot/drivers/net/phy/ |
| H A D | marvell.c | 286 u8 reg_num, u16 offset, u16 len, u16 data) in m88e1518_phy_writebits() argument
295 reg = phy_read(phydev, MDIO_DEVAD_NONE, reg_num); in m88e1518_phy_writebits()
300 phy_write(phydev, MDIO_DEVAD_NONE, reg_num, reg); in m88e1518_phy_writebits()
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