| /rk3399_rockchip-uboot/drivers/ddr/fsl/ |
| H A D | ddr3_dimm_params.c | 142 u8 rcw = spd->mod_section.registered.rcw[i/2]; in ddr_compute_dimm_parameters() local
143 pdimm->rcw[i] = (rcw >> 0) & 0x0F; in ddr_compute_dimm_parameters()
144 pdimm->rcw[i+1] = (rcw >> 4) & 0x0F; in ddr_compute_dimm_parameters()
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| H A D | ctrl_regs.c | 737 common_dimm->rcw[0] << 28 | \ in set_ddr_sdram_rcw()
738 common_dimm->rcw[1] << 24 | \ in set_ddr_sdram_rcw()
739 common_dimm->rcw[2] << 20 | \ in set_ddr_sdram_rcw()
740 common_dimm->rcw[3] << 16 | \ in set_ddr_sdram_rcw()
741 common_dimm->rcw[4] << 12 | \ in set_ddr_sdram_rcw()
742 common_dimm->rcw[5] << 8 | \ in set_ddr_sdram_rcw()
743 common_dimm->rcw[6] << 4 | \ in set_ddr_sdram_rcw()
744 common_dimm->rcw[7]; in set_ddr_sdram_rcw()
746 common_dimm->rcw[8] << 28 | \ in set_ddr_sdram_rcw()
747 common_dimm->rcw[9] << 24 | \ in set_ddr_sdram_rcw()
[all …]
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| H A D | lc_common_dimm_params.c | 430 outpdimm->rcw[j] = dimm_params[0].rcw[j]; in compute_lowest_common_dimm_parameters()
434 if (dimm_params[i].rcw[j] != dimm_params[0].rcw[j]) { in compute_lowest_common_dimm_parameters()
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| H A D | interactive.c | 1357 spd->mod_section.registered.rcw[i-69], i-69); in ddr3_spd_dump()
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.qspi | 26 => sf erase 0 +<size of rcw image>
28 => sf write <rcw image in memory> 0 <size of rcw image>
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| H A D | README.lsch3 | 181 nand write <rcw image in memory> 0 <size of rcw image>
198 nand write <rcw image in memory> 0 <size of rcw image>
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.pblimage | 63 1. Configuration files rcw.cfg and pbi.cfg must present in the
64 board/freescale/corenet_ds/, rcw.cfg is for RCW, pbi.cfg is for
70 Typical example of rcw.cfg file:
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| H A D | README.b4860qds | 270 2)Flash vbank2 with b4420 rcw and U-Boot
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| /rk3399_rockchip-uboot/include/ |
| H A D | common_timing_params.h | 65 unsigned char rcw[16]; /* Register Control Word 0-15 */ member
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| H A D | fsl_ddr_dimm_params.h | 106 unsigned char rcw[16]; /* Register Control Word 0-15 */ member
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| H A D | ddr_spd.h | 264 unsigned char rcw[8]; member
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/ls102xa/ |
| H A D | cpu.c | 279 u32 rcw = in_be32(&gur->rcwsr[i]); in print_cpuinfo() local
283 printf(" %08x", rcw); in print_cpuinfo()
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| /rk3399_rockchip-uboot/configs/ |
| H A D | ls1046ardb_qspi_SECURE_BOOT_defconfig | 13 …oot=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(ke…
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| H A D | ls1046ardb_qspi_defconfig | 12 …oot=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(ke…
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| H A D | ls1046ardb_sdcard_SECURE_BOOT_defconfig | 13 …oot=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(ke…
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| H A D | ls1046ardb_sdcard_defconfig | 13 …oot=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(ke…
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| H A D | ls1046ardb_emmc_defconfig | 11 …oot=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(ke…
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | cpu.c | 413 u32 type, rcw, svr = gur_in32(&gur->svr); in print_cpuinfo() local
454 rcw = gur_in32(&gur->rcwsr[i]); in print_cpuinfo()
457 printf(" %08x", rcw); in print_cpuinfo()
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cpu.c | 279 u32 rcw = in_be32(&gur->rcwsr[i]); in checkcpu() local
283 printf(" %08x", rcw); in checkcpu()
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| /rk3399_rockchip-uboot/board/freescale/p2041rdb/ |
| H A D | README | 25 => tftp 1000000 rcw.bin
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| /rk3399_rockchip-uboot/board/freescale/t104xrdb/ |
| H A D | README | 334 By default PBI_SRC=14 (which is for IFC-NAND/NOR) in rcw.cfg file
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