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Searched refs:pll_misc (Results 1 – 7 of 7) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Dclock.c106 data = readl(&pll->pll_misc); in clock_ll_read_pll()
140 misc_data = readl(&pll->pll_misc); in clock_start_pll()
142 misc_data = readl(&simple_pll->pll_misc); in clock_start_pll()
153 writel(misc_data, &pll->pll_misc); in clock_start_pll()
156 writel(misc_data, &simple_pll->pll_misc); in clock_start_pll()
627 misc_reg = readl(&pll->pll_misc); in clock_set_rate()
630 writel(misc_reg, &pll->pll_misc); in clock_set_rate()
H A Dcpu.c205 writel(reg, &pll->pll_misc); in pllx_set_rate()
214 reg = readl(&pll->pll_misc); in pllx_set_rate()
217 writel(reg, &pll->pll_misc); in pllx_set_rate()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra/
H A Dclk_rst.h16 uint pll_misc; /* other misc things */ member
22 uint pll_misc; /* other misc things */ member
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra114/
H A Dclock.c666 clrbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, PLLC_IDDQ); in clock_early_init()
703 setbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, (1 << pllinfo->lock_ena)); in clock_early_init()
710 writel(data, &clkrst->crc_pll[CLOCK_ID_DISPLAY].pll_misc); in clock_early_init()
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/
H A Dwarmboot_avp.c188 writel(pllx_misc.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_misc); in wb_start()
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra124/
H A Dclock.c846 clrbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, PLLC_IDDQ); in clock_early_init()
883 setbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, (1 << pllinfo->lock_ena)); in clock_early_init()
890 writel(data, &clkrst->crc_pll[CLOCK_ID_DISPLAY].pll_misc); in clock_early_init()
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1016 clrbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, in clock_early_init()
1030 writel(data, &clkrst->crc_pll[CLOCK_ID_DISPLAY].pll_misc); in clock_early_init()