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/rk3399_rockchip-uboot/drivers/video/
H A Dati_radeon_fb.c199 static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *mode) in radeon_write_pll_regs() argument
215 if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) && in radeon_write_pll_regs()
216 (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) & in radeon_write_pll_regs()
222 mode->clk_cntl_index & PPLL_DIV_SEL_MASK, in radeon_write_pll_regs()
242 mode->clk_cntl_index & PPLL_DIV_SEL_MASK, in radeon_write_pll_regs()
250 if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { in radeon_write_pll_regs()
254 OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, 0); in radeon_write_pll_regs()
258 (mode->ppll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT), in radeon_write_pll_regs()
262 OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, ~PPLL_REF_DIV_MASK); in radeon_write_pll_regs()
265 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK); in radeon_write_pll_regs()
[all …]
H A Dmxsfb.c51 struct ctfb_res_modes *mode, int bpp) in mxs_lcd_init() argument
58 mxs_set_lcdclk(MXS_LCDIF_BASE, PS2KHZ(mode->pixclock)); in mxs_lcd_init()
95 writel((mode->yres << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) | mode->xres, in mxs_lcd_init()
101 mode->vsync_len, &regs->hw_lcdif_vdctrl0); in mxs_lcd_init()
102 writel(mode->upper_margin + mode->lower_margin + in mxs_lcd_init()
103 mode->vsync_len + mode->yres, in mxs_lcd_init()
105 writel((mode->hsync_len << LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_OFFSET) | in mxs_lcd_init()
106 (mode->left_margin + mode->right_margin + in mxs_lcd_init()
107 mode->hsync_len + mode->xres), in mxs_lcd_init()
109 writel(((mode->left_margin + mode->hsync_len) << in mxs_lcd_init()
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H A Dvideomodes.c163 int mode; in video_get_params() local
183 mode = 0; /* default */ in video_get_params()
186 GET_OPTION ("mode:", mode) in video_get_params()
192 if (mode >= RES_MODES_COUNT) in video_get_params()
193 mode = 0; in video_get_params()
195 *pPar = res_mode_init[mode]; /* copy default values */ in video_get_params()
196 bpp = 24 - ((mode % 3) * 8); in video_get_params()
389 struct ctfb_res_modes *mode) in video_edid_dtd_to_ctfb_res_modes() argument
407 mode->xres = EDID_DETAILED_TIMING_HORIZONTAL_ACTIVE(*t); in video_edid_dtd_to_ctfb_res_modes()
408 mode->yres = EDID_DETAILED_TIMING_VERTICAL_ACTIVE(*t); in video_edid_dtd_to_ctfb_res_modes()
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/rk3399_rockchip-uboot/drivers/video/drm/
H A Drockchip_display_helper.c69 int drm_mode_vrefresh(const struct drm_display_mode *mode) in drm_mode_vrefresh() argument
74 if (mode->vrefresh > 0) { in drm_mode_vrefresh()
75 refresh = mode->vrefresh; in drm_mode_vrefresh()
76 } else if (mode->htotal > 0 && mode->vtotal > 0) { in drm_mode_vrefresh()
79 vtotal = mode->vtotal; in drm_mode_vrefresh()
81 calc_val = (mode->clock * 1000); in drm_mode_vrefresh()
82 calc_val /= mode->htotal; in drm_mode_vrefresh()
85 if (mode->flags & DRM_MODE_FLAG_INTERLACE) in drm_mode_vrefresh()
87 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) in drm_mode_vrefresh()
89 if (mode->vscan > 1) in drm_mode_vrefresh()
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H A Drk1000_tve.c135 struct drm_display_mode *mode = &conn_state->mode; in rk1000_tve_bridge_enable() local
144 if (mode->vdisplay == 576) { in rk1000_tve_bridge_enable()
169 struct drm_display_mode *mode) in drm_rk1000_select_output() argument
186 mode->hdisplay = 720; in drm_rk1000_select_output()
187 mode->hsync_start = 732; in drm_rk1000_select_output()
188 mode->hsync_end = 738; in drm_rk1000_select_output()
189 mode->htotal = 864; in drm_rk1000_select_output()
190 mode->vdisplay = 576; in drm_rk1000_select_output()
191 mode->vsync_start = 582; in drm_rk1000_select_output()
192 mode->vsync_end = 588; in drm_rk1000_select_output()
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H A Drockchip_spl_display.c47 struct drm_display_mode *mode = &state->conn_state.mode; in rockchip_spl_display_init() local
89 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); in rockchip_spl_display_init()
131 memcpy(&spl_disp_info->mode, &conn_state->mode, sizeof(conn_state->mode)); in rockchip_spl_display_transmit_info_to_uboot()
140 struct drm_display_mode *mode; in spl_init_display() local
168 mode = &state->conn_state.mode; in spl_init_display()
173 mode->clock, mode->flags, in spl_init_display()
174 mode->hdisplay, mode->hsync_start, in spl_init_display()
175 mode->hsync_end, mode->htotal, in spl_init_display()
176 mode->vdisplay, mode->vsync_start, in spl_init_display()
177 mode->vsync_end, mode->vtotal, in spl_init_display()
H A Drockchip_vop.c31 static inline int us_to_vertical_line(struct drm_display_mode *mode, int us) in us_to_vertical_line() argument
33 return us * mode->clock / mode->htotal / 1000; in us_to_vertical_line()
205 struct drm_display_mode *mode = &conn_state->mode; in vop_post_config() local
206 u16 vtotal = mode->crtc_vtotal; in vop_post_config()
207 u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start; in vop_post_config()
208 u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start; in vop_post_config()
209 u16 hdisplay = mode->crtc_hdisplay; in vop_post_config()
210 u16 vdisplay = mode->crtc_vdisplay; in vop_post_config()
216 if (mode->flags & DRM_MODE_FLAG_INTERLACE) in vop_post_config()
238 if (mode->flags & DRM_MODE_FLAG_INTERLACE) { in vop_post_config()
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H A Dmax96755f.c22 struct drm_display_mode *mode = &priv->mode; in max96755f_mipi_dsi_rx_config() local
40 vact = mode->vdisplay; in max96755f_mipi_dsi_rx_config()
41 vsa = mode->vsync_end - mode->vsync_start; in max96755f_mipi_dsi_rx_config()
42 vfp = mode->vsync_start - mode->vdisplay; in max96755f_mipi_dsi_rx_config()
43 vbp = mode->vtotal - mode->vsync_end; in max96755f_mipi_dsi_rx_config()
44 hact = mode->hdisplay; in max96755f_mipi_dsi_rx_config()
45 hsa = mode->hsync_end - mode->hsync_start; in max96755f_mipi_dsi_rx_config()
46 hfp = mode->hsync_start - mode->hdisplay; in max96755f_mipi_dsi_rx_config()
47 hbp = mode->htotal - mode->hsync_end; in max96755f_mipi_dsi_rx_config()
136 const struct drm_display_mode *mode) in max96755f_bridge_mode_set() argument
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H A Dinno_hdmi.c201 static void inno_hdmi_set_pwr_mode(struct inno_hdmi *hdmi, int mode) in inno_hdmi_set_pwr_mode() argument
206 switch (mode) { in inno_hdmi_set_pwr_mode()
239 dev_err(hdmi->dev, "Unknown power mode %d\n", mode); in inno_hdmi_set_pwr_mode()
305 struct drm_display_mode *mode) in inno_hdmi_config_video_vsi() argument
311 mode); in inno_hdmi_config_video_vsi()
318 struct drm_display_mode *mode) in inno_hdmi_config_video_avi() argument
323 rc = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, mode, false); in inno_hdmi_config_video_avi()
418 struct drm_display_mode *mode) in inno_hdmi_config_video_timing() argument
424 value |= mode->flags & DRM_MODE_FLAG_PHSYNC ? BIT(4) : 0; in inno_hdmi_config_video_timing()
425 value |= mode->flags & DRM_MODE_FLAG_PVSYNC ? BIT(5) : 0; in inno_hdmi_config_video_timing()
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/rk3399_rockchip-uboot/drivers/video/sunxi/
H A Dlcdc.c16 static int lcdc_get_clk_delay(const struct display_timing *mode, int tcon) in lcdc_get_clk_delay() argument
20 delay = mode->vfront_porch.typ + mode->vsync_len.typ + in lcdc_get_clk_delay()
21 mode->vback_porch.typ; in lcdc_get_clk_delay()
22 if (mode->flags & DISPLAY_FLAGS_INTERLACED) in lcdc_get_clk_delay()
71 const struct display_timing *mode, in lcdc_tcon0_mode_set() argument
83 clk_delay = lcdc_get_clk_delay(mode, 0); in lcdc_tcon0_mode_set()
90 writel(SUNXI_LCDC_X(mode->hactive.typ) | in lcdc_tcon0_mode_set()
91 SUNXI_LCDC_Y(mode->vactive.typ), &lcdc->tcon0_timing_active); in lcdc_tcon0_mode_set()
93 bp = mode->hsync_len.typ + mode->hback_porch.typ; in lcdc_tcon0_mode_set()
94 total = mode->hactive.typ + mode->hfront_porch.typ + bp; in lcdc_tcon0_mode_set()
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H A Dsunxi_display.c205 static int sunxi_hdmi_edid_get_mode(struct ctfb_res_modes *mode) in sunxi_hdmi_edid_get_mode() argument
277 r = video_edid_dtd_to_ctfb_res_modes(t, mode); in sunxi_hdmi_edid_get_mode()
367 static void sunxi_frontend_mode_set(const struct ctfb_res_modes *mode, in sunxi_frontend_mode_set() argument
375 writel(mode->xres * 4, &de_fe->ch0_stride); in sunxi_frontend_mode_set()
379 writel(SUNXI_DE_FE_HEIGHT(mode->yres) | SUNXI_DE_FE_WIDTH(mode->xres), in sunxi_frontend_mode_set()
381 writel(SUNXI_DE_FE_HEIGHT(mode->yres) | SUNXI_DE_FE_WIDTH(mode->xres), in sunxi_frontend_mode_set()
386 writel(SUNXI_DE_FE_HEIGHT(mode->yres) | SUNXI_DE_FE_WIDTH(mode->xres), in sunxi_frontend_mode_set()
388 writel(SUNXI_DE_FE_HEIGHT(mode->yres) | SUNXI_DE_FE_WIDTH(mode->xres), in sunxi_frontend_mode_set()
405 static void sunxi_frontend_mode_set(const struct ctfb_res_modes *mode, in sunxi_frontend_mode_set() argument
459 setbits_le32(&de_be->mode, SUNXI_DE_BE_MODE_ENABLE); in sunxi_composer_init()
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/rk3399_rockchip-uboot/drivers/power/pmic/
H A Dpmic_max77686.c119 unsigned int val, ret, adr, mode; in max77686_set_ldo_mode() local
131 mode = MAX77686_LDO_MODE_OFF; in max77686_set_ldo_mode()
145 mode = MAX77686_LDO_MODE_STANDBY; in max77686_set_ldo_mode()
148 mode = 0xff; in max77686_set_ldo_mode()
152 mode = MAX77686_LDO_MODE_LPM; in max77686_set_ldo_mode()
155 mode = MAX77686_LDO_MODE_ON; in max77686_set_ldo_mode()
158 mode = 0xff; in max77686_set_ldo_mode()
161 if (mode == 0xff) { in max77686_set_ldo_mode()
172 val |= mode; in max77686_set_ldo_mode()
180 unsigned int val, ret, mask, adr, size, mode, mode_shift; in max77686_set_buck_mode() local
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/rk3399_rockchip-uboot/board/samsung/common/
H A Dmisc.c258 static int mode_leave_menu(int mode) in mode_leave_menu() argument
270 switch (mode) { in mode_leave_menu()
279 cmd = find_cmd(mode_name[mode][1]); in mode_leave_menu()
281 printf("Enter: %s %s\n", mode_name[mode][0], in mode_leave_menu()
282 mode_info[mode]); in mode_leave_menu()
283 lcd_printf("\n\n\t%s %s\n", mode_name[mode][0], in mode_leave_menu()
284 mode_info[mode]); in mode_leave_menu()
287 cmd_result = run_command(mode_cmd[mode], 0); in mode_leave_menu()
293 mode_name[mode][0]); in mode_leave_menu()
301 mode_name[mode][0]); in mode_leave_menu()
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/rk3399_rockchip-uboot/drivers/spi/
H A Dmpc8xxx_spi.c25 unsigned int max_hz, unsigned int mode) in spi_setup_slave() argument
57 spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; in spi_init()
58 spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); /* Use SYSCLK / 8 in spi_init()
108 spi->mode &= ~SPI_MODE_EN; in spi_xfer()
112 spi->mode = (spi->mode & 0xff0fffff) | in spi_xfer()
115 spi->mode = (spi->mode & 0xff0fffff) | in spi_xfer()
118 spi->mode = (spi->mode & 0xff0fffff); in spi_xfer()
124 spi->mode |= SPI_MODE_EN; in spi_xfer()
H A Dspi-uclass.c21 static int spi_set_speed_mode(struct udevice *bus, int speed, int mode) in spi_set_speed_mode() argument
37 ret = ops->set_mode(bus, mode); in spi_set_speed_mode()
54 uint speed, mode; in dm_spi_claim_bus() local
57 mode = slave->mode; in dm_spi_claim_bus()
68 if (speed != spi->speed || mode != spi->mode) { in dm_spi_claim_bus()
69 int ret = spi_set_speed_mode(bus, speed, slave->mode); in dm_spi_claim_bus()
75 spi->mode = mode; in dm_spi_claim_bus()
218 slave->mode = plat->mode; in spi_child_pre_probe()
326 int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, in spi_get_bus_and_cs() argument
371 plat->mode = mode; in spi_get_bus_and_cs()
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/rk3399_rockchip-uboot/include/
H A Dgeneric-phy.h43 enum phy_mode mode; member
160 int (*validate)(struct phy *phy, enum phy_mode mode, int submode,
191 int (*set_mode)(struct phy *phy, enum phy_mode mode, int submode);
234 int generic_phy_validate(struct phy *phy, enum phy_mode mode, int submode,
253 int generic_phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode);
254 #define generic_phy_set_mode(phy, mode) \ argument
255 generic_phy_set_mode_ext(phy, mode, 0)
259 return phy->attrs.mode; in generic_phy_get_mode()
341 static inline int generic_phy_validate(struct phy *phy, enum phy_mode mode, in generic_phy_validate() argument
370 static inline int generic_phy_set_mode_ext(struct phy *phy, enum phy_mode mode, in generic_phy_set_mode_ext() argument
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/rk3399_rockchip-uboot/arch/arm/mach-zynq/
H A Dspl.c39 u32 mode; in spl_boot_device() local
45 mode = BOOT_DEVICE_SPI; in spl_boot_device()
49 mode = BOOT_DEVICE_NAND; in spl_boot_device()
52 mode = BOOT_DEVICE_NOR; in spl_boot_device()
57 mode = BOOT_DEVICE_MMC1; in spl_boot_device()
61 mode = BOOT_DEVICE_RAM; in spl_boot_device()
68 return mode; in spl_boot_device()
/rk3399_rockchip-uboot/arch/arm/mach-imx/
H A Dvideo.c19 panel = dev->mode.name; in board_video_skip()
25 panel = displays[0].mode.name; in board_video_skip()
31 if (!strcmp(panel, displays[i].mode.name)) in board_video_skip()
37 ret = ipuv3_fb_init(&displays[i].mode, displays[i].di ? 1 : 0, in board_video_skip()
44 displays[i].mode.name, in board_video_skip()
45 displays[i].mode.xres, in board_video_skip()
46 displays[i].mode.yres); in board_video_skip()
49 displays[i].mode.name, ret); in board_video_skip()
/rk3399_rockchip-uboot/fs/reiserfs/
H A Dmode_string.c28 #warning mode type bitflag value assumption(s) violated! falling back to larger version
51 const char *bb_mode_string(int mode) in bb_mode_string() argument
58 *p = type_chars[ (mode >> 12) & 0xf ]; in bb_mode_string()
64 if (mode & mode_flags[i+j]) { in bb_mode_string()
69 if (mode & mode_flags[i+j]) { in bb_mode_string()
91 const char *bb_mode_string(int mode) in bb_mode_string() argument
98 *p = type_chars[ (mode >> 12) & 0xf ]; in bb_mode_string()
105 if (mode & m) { in bb_mode_string()
112 if (mode & (010000 >> i)) { in bb_mode_string()
/rk3399_rockchip-uboot/drivers/power/regulator/
H A Dmax77686.c417 unsigned int adr, mode; in max77686_ldo_mode() local
448 mode = MAX77686_LDO_MODE_OFF; in max77686_ldo_mode()
464 mode = MAX77686_LDO_MODE_LPM; in max77686_ldo_mode()
479 mode = MAX77686_LDO_MODE_STANDBY; in max77686_ldo_mode()
486 mode = MAX77686_LDO_MODE_STANDBY_LPM; in max77686_ldo_mode()
489 mode = MAX77686_LDO_MODE_ON; in max77686_ldo_mode()
492 mode = 0xff; in max77686_ldo_mode()
495 if (mode == 0xff) { in max77686_ldo_mode()
501 val |= mode; in max77686_ldo_mode()
542 unsigned int mask, adr, mode, mode_shift; in max77686_buck_mode() local
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/rk3399_rockchip-uboot/lib/zlib/
H A Dinflate.c17 state->mode = HEAD; in inflateReset()
354 if (state->mode == TYPE) state->mode = TYPEDO; /* skip check */ in inflate()
360 switch (state->mode) { in inflate()
363 state->mode = TYPEDO; in inflate()
372 state->mode = FLAGS; in inflate()
384 state->mode = BAD; in inflate()
389 state->mode = BAD; in inflate()
396 state->mode = BAD; in inflate()
402 state->mode = hold & 0x200 ? DICTID : TYPE; in inflate()
411 state->mode = BAD; in inflate()
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/rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/
H A Dddr3_training_centralization.c32 static int ddr3_tip_centralization(u32 dev_num, u32 mode);
58 static int ddr3_tip_centralization(u32 dev_num, u32 mode) in ddr3_tip_centralization() argument
82 u8 cons_tap = (mode == CENTRAL_TX) ? (64) : (0); in ddr3_tip_centralization()
96 if (mode == CENTRAL_TX) { in ddr3_tip_centralization()
113 bus_end_window[mode][if_id][bus_id] = in ddr3_tip_centralization()
115 bus_start_window[mode][if_id][bus_id] = 0; in ddr3_tip_centralization()
160 ((mode == in ddr3_tip_centralization()
289 bus_end_window[mode][if_id][bus_id] = in ddr3_tip_centralization()
290 GET_MIN(bus_end_window[mode][if_id] in ddr3_tip_centralization()
293 bus_start_window[mode][if_id][bus_id] = in ddr3_tip_centralization()
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/rk3399_rockchip-uboot/lib/efi_loader/
H A Defi_console.c52 int *mode, char *uga_exists, char *std_in_locked) in efi_cin_get_mode() argument
54 EFI_ENTRY("%p, %p, %p, %p", this, mode, uga_exists, std_in_locked); in efi_cin_get_mode()
56 if (mode) in efi_cin_get_mode()
57 *mode = EFI_CONSOLE_MODE_TEXT; in efi_cin_get_mode()
67 struct efi_console_control_protocol *this, int mode) in efi_cin_set_mode() argument
69 EFI_ENTRY("%p, %d", this, mode); in efi_cin_set_mode()
90 .mode = 0,
151 struct cout_mode *mode; in efi_cout_output_string() local
154 mode = &efi_cout_modes[efi_con_mode.mode]; in efi_cout_output_string()
162 } else if (efi_con_mode.cursor_column > mode->columns) { in efi_cout_output_string()
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/rk3399_rockchip-uboot/drivers/sysreset/
H A Dsysreset-syscon-reboot.c24 static int syscon_reboot_request_by_mode(struct udevice *dev, const char *mode) in syscon_reboot_request_by_mode() argument
31 if (!mode) in syscon_reboot_request_by_mode()
34 command = calloc(1, strlen(mode) + sizeof(prefix)); in syscon_reboot_request_by_mode()
39 strcat(command, mode); in syscon_reboot_request_by_mode()
44 if (!strcmp(static_defined_command[i].name, mode)) { in syscon_reboot_request_by_mode()
51 printf("## Reboot mode: %s(%x)\n\n", mode, magic); in syscon_reboot_request_by_mode()
/rk3399_rockchip-uboot/arch/arc/lib/
H A Dlibgcc2.h33 typedef int QItype __attribute__ ((mode (QI)));
34 typedef unsigned int UQItype __attribute__ ((mode (QI)));
35 typedef int HItype __attribute__ ((mode (HI)));
36 typedef unsigned int UHItype __attribute__ ((mode (HI)));
39 typedef int SItype __attribute__ ((mode (SI)));
40 typedef unsigned int USItype __attribute__ ((mode (SI)));
43 typedef int DItype __attribute__ ((mode (DI)));
44 typedef unsigned int UDItype __attribute__ ((mode (DI)));
47 typedef int TItype __attribute__ ((mode (TI)));
48 typedef unsigned int UTItype __attribute__ ((mode (TI)));
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