Lines Matching refs:mode
31 static inline int us_to_vertical_line(struct drm_display_mode *mode, int us) in us_to_vertical_line() argument
33 return us * mode->clock / mode->htotal / 1000; in us_to_vertical_line()
205 struct drm_display_mode *mode = &conn_state->mode; in vop_post_config() local
206 u16 vtotal = mode->crtc_vtotal; in vop_post_config()
207 u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start; in vop_post_config()
208 u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start; in vop_post_config()
209 u16 hdisplay = mode->crtc_hdisplay; in vop_post_config()
210 u16 vdisplay = mode->crtc_vdisplay; in vop_post_config()
216 if (mode->flags & DRM_MODE_FLAG_INTERLACE) in vop_post_config()
238 if (mode->flags & DRM_MODE_FLAG_INTERLACE) { in vop_post_config()
301 static void vop_set_out_mode(struct vop *vop, u32 mode) in vop_set_out_mode() argument
306 VOP_CTRL_SET(vop, out_mode, mode); in vop_set_out_mode()
308 ret = readx_poll_timeout(vop_mode_done, vop, val, val == mode, 1000 * 1000); in vop_set_out_mode()
310 printf("wait for setting mode 0x%x timeout\n", mode); in vop_set_out_mode()
317 struct drm_display_mode *mode = &conn_state->mode; in rockchip_vop_init() local
322 u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; in rockchip_vop_init()
323 u16 hdisplay = mode->crtc_hdisplay; in rockchip_vop_init()
324 u16 htotal = mode->crtc_htotal; in rockchip_vop_init()
325 u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start; in rockchip_vop_init()
327 u16 vdisplay = mode->crtc_vdisplay; in rockchip_vop_init()
328 u16 vtotal = mode->crtc_vtotal; in rockchip_vop_init()
329 u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; in rockchip_vop_init()
330 u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start; in rockchip_vop_init()
371 vop->regs, mode->crtc_hdisplay, mode->vdisplay, in rockchip_vop_init()
372 mode->flags & DRM_MODE_FLAG_INTERLACE ? "i" : "p", in rockchip_vop_init()
373 drm_mode_vrefresh(mode), in rockchip_vop_init()
383 ret = clk_set_rate(&crtc_state->dclk, mode->crtc_clock * 1000); in rockchip_vop_init()
388 printf("VOP:0x%8p set crtc_clock to %dKHz, get %dHz\n", vop->regs, mode->crtc_clock, ret); in rockchip_vop_init()
422 val |= (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1; in rockchip_vop_init()
423 val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1); in rockchip_vop_init()
613 if (mode->flags & DRM_MODE_FLAG_INTERLACE) { in rockchip_vop_init()
634 !!(mode->flags & DRM_MODE_FLAG_DBLCLK) || in rockchip_vop_init()
639 act_end - us_to_vertical_line(mode, 1000)); in rockchip_vop_init()
654 static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src, in scl_vop_cal_scale() argument
661 if (mode == SCALE_UP) in scl_vop_cal_scale()
663 else if (mode == SCALE_DOWN) in scl_vop_cal_scale()
666 if (mode == SCALE_UP) { in scl_vop_cal_scale()
671 } else if (mode == SCALE_DOWN) { in scl_vop_cal_scale()
841 struct drm_display_mode *mode = &conn_state->mode; in rockchip_vop_set_plane() local
860 (mode->flags & DRM_MODE_FLAG_INTERLACE)) in rockchip_vop_set_plane()
869 dsp_stx = crtc_x + mode->crtc_htotal - mode->crtc_hsync_start; in rockchip_vop_set_plane()
870 dsp_sty = crtc_y + mode->crtc_vtotal - mode->crtc_vsync_start; in rockchip_vop_set_plane()
872 (mode->flags & DRM_MODE_FLAG_INTERLACE)) in rockchip_vop_set_plane()
873 dsp_sty = crtc_y / 2 + mode->crtc_vtotal - mode->crtc_vsync_start; in rockchip_vop_set_plane()
881 if (mode->flags & DRM_MODE_FLAG_YMIRROR) in rockchip_vop_set_plane()
885 if (mode->flags & DRM_MODE_FLAG_XMIRROR) in rockchip_vop_set_plane()
904 VOP_WIN_SET(vop, interlace_read, (mode->flags & DRM_MODE_FLAG_INTERLACE) ? 1 : 0); in rockchip_vop_set_plane()
1007 struct drm_display_mode *mode = &conn_state->mode; in rockchip_vop_send_mcu_cmd() local
1056 ret = clk_set_rate(&crtc_state->dclk, mode->crtc_clock * 1000); in rockchip_vop_send_mcu_cmd()
1070 struct drm_display_mode *mode = &conn_state->mode; in rockchip_vop_mode_valid() local
1073 drm_display_mode_to_videomode(mode, &vm); in rockchip_vop_mode_valid()
1115 struct drm_display_mode *mode = &conn_state->mode; in rockchip_vop_mode_fixup() local
1117 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V | CRTC_STEREO_DOUBLE); in rockchip_vop_mode_fixup()
1122 if (mode->flags & DRM_MODE_FLAG_DBLCLK || in rockchip_vop_mode_fixup()
1125 mode->crtc_clock *= 2; in rockchip_vop_mode_fixup()
1127 mode->crtc_clock *= rockchip_drm_get_cycles_per_pixel(conn_state->bus_format); in rockchip_vop_mode_fixup()
1129 mode->crtc_clock *= crtc_state->mcu_timing.mcu_pix_total + 1; in rockchip_vop_mode_fixup()