205 static int sunxi_hdmi_edid_get_mode(struct ctfb_res_modes *mode)  in sunxi_hdmi_edid_get_mode()  argument
277 		r = video_edid_dtd_to_ctfb_res_modes(t, mode);  in sunxi_hdmi_edid_get_mode()
367 static void sunxi_frontend_mode_set(const struct ctfb_res_modes *mode,  in sunxi_frontend_mode_set()  argument
375 	writel(mode->xres * 4, &de_fe->ch0_stride);  in sunxi_frontend_mode_set()
379 	writel(SUNXI_DE_FE_HEIGHT(mode->yres) | SUNXI_DE_FE_WIDTH(mode->xres),  in sunxi_frontend_mode_set()
381 	writel(SUNXI_DE_FE_HEIGHT(mode->yres) | SUNXI_DE_FE_WIDTH(mode->xres),  in sunxi_frontend_mode_set()
386 	writel(SUNXI_DE_FE_HEIGHT(mode->yres) | SUNXI_DE_FE_WIDTH(mode->xres),  in sunxi_frontend_mode_set()
388 	writel(SUNXI_DE_FE_HEIGHT(mode->yres) | SUNXI_DE_FE_WIDTH(mode->xres),  in sunxi_frontend_mode_set()
405 static void sunxi_frontend_mode_set(const struct ctfb_res_modes *mode,  in sunxi_frontend_mode_set()  argument
459 	setbits_le32(&de_be->mode, SUNXI_DE_BE_MODE_ENABLE);  in sunxi_composer_init()
468 static void sunxi_composer_mode_set(const struct ctfb_res_modes *mode,  in sunxi_composer_mode_set()  argument
475 	sunxi_frontend_mode_set(mode, address);  in sunxi_composer_mode_set()
477 	writel(SUNXI_DE_BE_HEIGHT(mode->yres) | SUNXI_DE_BE_WIDTH(mode->xres),  in sunxi_composer_mode_set()
479 	writel(SUNXI_DE_BE_HEIGHT(mode->yres) | SUNXI_DE_BE_WIDTH(mode->xres),  in sunxi_composer_mode_set()
482 	writel(SUNXI_DE_BE_LAYER_STRIDE(mode->xres), &de_be->layer0_stride);  in sunxi_composer_mode_set()
490 	setbits_le32(&de_be->mode, SUNXI_DE_BE_MODE_LAYER0_ENABLE);  in sunxi_composer_mode_set()
491 	if (mode->vmode == FB_VMODE_INTERLACED)  in sunxi_composer_mode_set()
492 		setbits_le32(&de_be->mode,  in sunxi_composer_mode_set()
515 	setbits_le32(&de_be->mode, SUNXI_DE_BE_MODE_START);  in sunxi_composer_enable()
725 static void sunxi_ctfb_mode_to_display_timing(const struct ctfb_res_modes *mode,  in sunxi_ctfb_mode_to_display_timing()  argument
728 	timing->pixelclock.typ = mode->pixclock_khz * 1000;  in sunxi_ctfb_mode_to_display_timing()
730 	timing->hactive.typ = mode->xres;  in sunxi_ctfb_mode_to_display_timing()
731 	timing->hfront_porch.typ = mode->right_margin;  in sunxi_ctfb_mode_to_display_timing()
732 	timing->hback_porch.typ = mode->left_margin;  in sunxi_ctfb_mode_to_display_timing()
733 	timing->hsync_len.typ = mode->hsync_len;  in sunxi_ctfb_mode_to_display_timing()
735 	timing->vactive.typ = mode->yres;  in sunxi_ctfb_mode_to_display_timing()
736 	timing->vfront_porch.typ = mode->lower_margin;  in sunxi_ctfb_mode_to_display_timing()
737 	timing->vback_porch.typ = mode->upper_margin;  in sunxi_ctfb_mode_to_display_timing()
738 	timing->vsync_len.typ = mode->vsync_len;  in sunxi_ctfb_mode_to_display_timing()
740 	if (mode->sync & FB_SYNC_HOR_HIGH_ACT)  in sunxi_ctfb_mode_to_display_timing()
744 	if (mode->sync & FB_SYNC_VERT_HIGH_ACT)  in sunxi_ctfb_mode_to_display_timing()
748 	if (mode->vmode == FB_VMODE_INTERLACED)  in sunxi_ctfb_mode_to_display_timing()
752 static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,  argument
776 	sunxi_lcdc_pll_set(0, mode->pixclock_khz, &clk_div, &clk_double);
778 	sunxi_ctfb_mode_to_display_timing(mode, &timing);
784 static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode,  argument
792 	sunxi_ctfb_mode_to_display_timing(mode, &timing);
801 	sunxi_lcdc_pll_set(1, mode->pixclock_khz, clk_div, clk_double);
807 static void sunxi_hdmi_setup_info_frames(const struct ctfb_res_modes *mode)  argument
824 	if (mode->pixclock_khz <= 27000)
829 	if (mode->xres * 100 / mode->yres < 156)
854 static void sunxi_hdmi_mode_set(const struct ctfb_res_modes *mode,  argument
865 		sunxi_hdmi_setup_info_frames(mode);
884 	writel(SUNXI_HDMI_Y(mode->yres) | SUNXI_HDMI_X(mode->xres),
887 	x = mode->hsync_len + mode->left_margin;
888 	y = mode->vsync_len + mode->upper_margin;
891 	x = mode->right_margin;
892 	y = mode->lower_margin;
895 	x = mode->hsync_len;
896 	y = mode->vsync_len;
899 	if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
902 	if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
986 static int sunxi_ssd2828_init(const struct ctfb_res_modes *mode)  argument
1015 	return ssd2828_init(&cfg, mode);
1026 static void sunxi_mode_set(const struct ctfb_res_modes *mode,  argument
1041 		sunxi_composer_mode_set(mode, address);
1042 		sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 0);
1043 		sunxi_hdmi_mode_set(mode, clk_div, clk_double);
1072 		sunxi_composer_mode_set(mode, address);
1073 		sunxi_lcdc_tcon0_mode_set(mode, false);
1077 		sunxi_ssd2828_init(mode);
1083 		sunxi_composer_mode_set(mode, address);
1084 		sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 1);
1090 		sunxi_composer_mode_set(mode, address);
1091 		sunxi_lcdc_tcon0_mode_set(mode, true);
1102 		sunxi_composer_mode_set(mode, address);
1103 		sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 0);
1185 	const struct ctfb_res_modes *mode;  local
1198 	video_get_ctfb_res_modes(RES_MODE_1024x768, 24, &mode,
1229 				mode = &custom;
1255 		mode = &custom;
1276 			mode = &composite_video_modes[0];
1278 			mode = &composite_video_modes[1];
1290 		(mode->xres * mode->yres * 4 + 0xfff) & ~0xfff;
1291 	overscan_offset = (overscan_y * mode->xres + overscan_x) * 4;
1305 	       mode->xres, mode->yres,
1306 	       (mode->vmode == FB_VMODE_INTERLACED) ? "i" : "",
1322 	sunxi_mode_set(mode, fb_dma_addr);
1331 	graphic_device->winSizeX = mode->xres - 2 * overscan_x;
1332 	graphic_device->winSizeY = mode->yres - 2 * overscan_y;
1333 	graphic_device->plnSizeX = mode->xres * graphic_device->gdfBytesPP;