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Searched refs:l2cache (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/
H A Dspl_minimal.c18 ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; in cpu_init_f() local
20 out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR); in cpu_init_f()
23 out_be32(&l2cache->l2errdis, in cpu_init_f()
27 out_be32(&l2cache->l2ctl, in cpu_init_f()
H A Dcpu_init.c527 struct ccsr_cluster_l2 __iomem *l2cache; in enable_cluster_l2() local
547 l2cache = (void __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2 + i * 0x40000); in enable_cluster_l2()
563 clrsetbits_be32(&l2cache->l2csr1, 0xff, 32 + i * 2 + 1); in enable_cluster_l2()
565 printf("enable l2 for cluster %d %p\n", i, l2cache); in enable_cluster_l2()
567 out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC); in enable_cluster_l2()
568 while ((in_be32(&l2cache->l2csr0) in enable_cluster_l2()
571 out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE|L2CSR0_L2REP_MODE); in enable_cluster_l2()
587 ccsr_l2cache_t *l2cache = (void __iomem *)CONFIG_SYS_MPC85xx_L2_ADDR; in l2cache_init() local
589 struct ccsr_cluster_l2 * l2cache = (void __iomem *)CONFIG_SYS_FSL_CLUSTER_1_L2; in l2cache_init() local
602 cache_ctl = l2cache->l2ctl; in l2cache_init()
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H A Dcpu_init_early.c89 ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; in cpu_init_early_f() local
143 out_be32(&l2cache->l2srbar0, SRAM_BASE_ADDR); in cpu_init_early_f()
145 out_be32(&l2cache->l2errdis, in cpu_init_early_f()
148 out_be32(&l2cache->l2ctl, in cpu_init_early_f()
168 clrbits_be32(&l2cache->l2ctl, in cpu_init_early_f()
171 out_be32(&l2cache->l2srbar0, 0x0); in cpu_init_early_f()
H A Dfdt.c220 volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; in l2cache_size() local
221 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3; in l2cache_size()
296 struct ccsr_cluster_l2 *l2cache = in ft_fixup_l2cache() local
298 u32 l2cfg0 = in_be32(&l2cache->l2cfg0); in ft_fixup_l2cache()