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/rk3399_rockchip-uboot/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier.h82 #define __UNIPHIER_PINCTRL_GROUP(grp) \ argument
84 .name = #grp, \
85 .pins = grp##_pins, \
86 .num_pins = ARRAY_SIZE(grp##_pins), \
87 .muxvals = grp##_muxvals + \
88 BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
89 ARRAY_SIZE(grp##_muxvals)), \
99 #define UNIPHIER_PINCTRL_GROUP(grp) \ argument
100 { .num_pins = ARRAY_SIZE(grp##_pins) + ARRAY_SIZE(grp##_muxvals) }
103 #define UNIPHIER_PINCTRL_GROUP(grp) __UNIPHIER_PINCTRL_GROUP(grp) argument
[all …]
H A Dpinctrl-uniphier-core.c200 const struct uniphier_pinctrl_group *grp = in uniphier_pinconf_group_set() local
204 for (i = 0; i < grp->num_pins; i++) { in uniphier_pinconf_group_set()
205 ret = uniphier_pinconf_set_one(dev, grp->pins[i], param, arg); in uniphier_pinconf_group_set()
272 const struct uniphier_pinctrl_group *grp = in uniphier_pinmux_group_set() local
276 for (i = 0; i < grp->num_pins; i++) in uniphier_pinmux_group_set()
277 uniphier_pinmux_set_one(dev, grp->pins[i], grp->muxvals[i]); in uniphier_pinmux_group_set()
/rk3399_rockchip-uboot/drivers/crypto/rockchip/
H A Dcrypto_ecc.c42 #define RK_GET_GRPOUP_NBYTES(grp) ((grp)->p_len) argument
45 grp->curve_name = #G; \
46 grp->wide = G ## _wide;\
47 grp->p = G ## _p; \
48 grp->p_len = sizeof(G ## _p); \
49 grp->a = G ## _a; \
50 grp->a_len = sizeof(G ## _a); \
51 grp->n = G ## _n; \
52 grp->n_len = sizeof(G ## _n); \
53 grp->gx = G ## _gx; \
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Dpinmux-common.c85 #define MUX_REG(grp) _R(0x80 + ((tegra_soc_pingroups[grp].ctl_id / 16) * 4)) argument
86 #define MUX_SHIFT(grp) ((tegra_soc_pingroups[grp].ctl_id % 16) * 2) argument
88 #define PULL_REG(grp) _R(0xa0 + ((tegra_soc_pingroups[grp].pull_id / 16) * 4)) argument
89 #define PULL_SHIFT(grp) ((tegra_soc_pingroups[grp].pull_id % 16) * 2) argument
91 #define TRI_REG(grp) _R(0x14 + (((grp) / 32) * 4)) argument
92 #define TRI_SHIFT(grp) ((grp) % 32) argument
383 u32 *reg = REG(grp); in pinmux_set_schmt()
408 u32 *reg = REG(grp); in pinmux_set_hsm()
516 static void pinmux_set_drvup_slwf(enum pmux_drvgrp grp, int slwf) in pinmux_set_drvup_slwf() argument
518 u32 *reg = DRV_REG(grp); in pinmux_set_drvup_slwf()
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/rk3399_rockchip-uboot/arch/arm/mach-mvebu/serdes/axp/
H A Dboard_env_spec.h101 #define GPP_DATA_OUT_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x00) argument
103 #define GPP_DATA_OUT_EN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x04) argument
104 #define GPP_BLINK_EN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x08) argument
105 #define GPP_DATA_IN_POL_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x0C) argument
106 #define GPP_DATA_IN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x10) argument
107 #define GPP_INT_CAUSE_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x14) argument
108 #define GPP_INT_MASK_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x18) argument
109 #define GPP_INT_LVL_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x1C) argument
110 #define GPP_OUT_SET_REG(grp) (0x18130 + ((grp) * 0x40)) argument
112 #define GPP_OUT_CLEAR_REG(grp) (0x18134 + ((grp) * 0x40)) argument
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/
H A Dddr.c579 const struct mx6sx_iomux_grp_regs *grp) in mx6sx_dram_iocfg() argument
588 writel(grp->grp_ddr_type, &mx6_grp_iomux->grp_ddr_type); in mx6sx_dram_iocfg()
589 writel(grp->grp_ddrpke, &mx6_grp_iomux->grp_ddrpke); in mx6sx_dram_iocfg()
597 writel(grp->grp_addds, &mx6_grp_iomux->grp_addds); in mx6sx_dram_iocfg()
606 writel(grp->grp_ctlds, &mx6_grp_iomux->grp_ctlds); in mx6sx_dram_iocfg()
609 writel(grp->grp_ddrmode_ctl, &mx6_grp_iomux->grp_ddrmode_ctl); in mx6sx_dram_iocfg()
618 writel(grp->grp_ddrmode, &mx6_grp_iomux->grp_ddrmode); in mx6sx_dram_iocfg()
619 writel(grp->grp_b0ds, &mx6_grp_iomux->grp_b0ds); in mx6sx_dram_iocfg()
620 writel(grp->grp_b1ds, &mx6_grp_iomux->grp_b1ds); in mx6sx_dram_iocfg()
622 writel(grp->grp_b2ds, &mx6_grp_iomux->grp_b2ds); in mx6sx_dram_iocfg()
[all …]
/rk3399_rockchip-uboot/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-37xx.c208 static int armada_37xx_get_func_reg(struct armada_37xx_pin_group *grp, in armada_37xx_get_func_reg() argument
214 if (!strcmp(grp->funcs[f], func)) in armada_37xx_get_func_reg()
257 struct armada_37xx_pin_group *grp) in armada_37xx_pmx_set_by_name() argument
261 unsigned int mask = grp->reg_mask; in armada_37xx_pmx_set_by_name()
265 name, grp->name); in armada_37xx_pmx_set_by_name()
267 func = armada_37xx_get_func_reg(grp, name); in armada_37xx_pmx_set_by_name()
272 val = grp->val[func]; in armada_37xx_pmx_set_by_name()
284 struct armada_37xx_pin_group *grp = &info->groups[group_selector]; in armada_37xx_pmx_group_set() local
287 return armada_37xx_pmx_set_by_name(dev, name, grp); in armada_37xx_pmx_group_set()
340 struct armada_37xx_pin_group *grp = &info->groups[n]; in armada_37xx_fill_group() local
[all …]
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dimx7-colibri.dts52 pinctrl_i2c4: i2c4-grp {
59 pinctrl_i2c4_gpio: i2c4-gpio-grp {
66 pinctrl_uart1: uart1-grp {
75 pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
84 pinctrl_i2c1: i2c1-grp {
91 pinctrl_i2c1_gpio: i2c1-gpio-grp {
/rk3399_rockchip-uboot/drivers/pinctrl/meson/
H A Dpinctrl-meson.h93 #define GROUP(grp, r, b) \ argument
95 .name = #grp, \
96 .pins = grp ## _pins, \
97 .num_pins = ARRAY_SIZE(grp ## _pins), \
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/
H A Dfuncmux.c16 #define PINMUX(grp, mux, pupd, tri) \ argument
17 {PMUX_PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri}
211 enum pmux_pingrp grp[] = {PMUX_PINGRP_KBCA, in funcmux_select() enum
217 for (i = 0; i < ARRAY_SIZE(grp); i++) { in funcmux_select()
218 pinmux_tristate_disable(grp[i]); in funcmux_select()
219 pinmux_set_func(grp[i], PMUX_FUNC_KBC); in funcmux_select()
220 pinmux_set_pullupdown(grp[i], PMUX_PULL_UP); in funcmux_select()
/rk3399_rockchip-uboot/drivers/ddr/altera/
H A Dsequencer.c259 static void scc_mgr_set(u32 off, u32 grp, u32 val) in scc_mgr_set() argument
261 writel(val, SDR_PHYGRP_SCCGRP_ADDRESS | off | (grp << 2)); in scc_mgr_set()
376 static void scc_mgr_set_all_ranks(const u32 off, const u32 grp, const u32 val, in scc_mgr_set_all_ranks() argument
383 scc_mgr_set(off, grp, val); in scc_mgr_set_all_ranks()
386 writel(grp, &sdr_scc_mgr->dqs_ena); in scc_mgr_set_all_ranks()
1481 rw_mgr_mem_calibrate_read_test_all_ranks(const u32 grp, const u32 num_tries, in rw_mgr_mem_calibrate_read_test_all_ranks() argument
1486 return rw_mgr_mem_calibrate_read_test(0, grp, num_tries, all_correct, in rw_mgr_mem_calibrate_read_test_all_ranks()
1496 static void rw_mgr_incr_vfifo(const u32 grp) in rw_mgr_incr_vfifo() argument
1498 writel(grp, &phy_mgr_cmd->inc_vfifo_hard_phy); in rw_mgr_incr_vfifo()
1507 static void rw_mgr_decr_vfifo(const u32 grp) in rw_mgr_decr_vfifo() argument
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/rk3399_rockchip-uboot/arch/arm/mach-mvebu/serdes/a38x/
H A Dsys_env_lib.h241 #define GPP_DATA_OUT_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x00) argument
242 #define GPP_DATA_OUT_EN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x04) argument
243 #define GPP_DATA_IN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x10) argument
/rk3399_rockchip-uboot/drivers/video/drm/display-serdes/maxim/
H A Dmaxim-max96752.c363 struct group_desc *grp; in max96752_pinctrl_set_grp_mux() local
373 grp = &serdes->chip_data->pinctrl_info->groups[group_selector]; in max96752_pinctrl_set_grp_mux()
374 if (!grp) { in max96752_pinctrl_set_grp_mux()
381 func->data, grp->name, grp->data, grp->num_pins); in max96752_pinctrl_set_grp_mux()
388 for (i = 0; i < grp->num_pins; i++) { in max96752_pinctrl_set_grp_mux()
389 offset = grp->pins[i] - pinctrl->pin_base; in max96752_pinctrl_set_grp_mux()
422 if (grp->data) { in max96752_pinctrl_set_grp_mux()
423 struct serdes_group_data *gdata = grp->data; in max96752_pinctrl_set_grp_mux()
H A Dmaxim-max96755.c460 struct group_desc *grp; in max96755_pinctrl_set_grp_mux() local
470 grp = &serdes->chip_data->pinctrl_info->groups[group_selector]; in max96755_pinctrl_set_grp_mux()
471 if (!grp) { in max96755_pinctrl_set_grp_mux()
478 func->data, grp->name, grp->data, grp->num_pins); in max96755_pinctrl_set_grp_mux()
484 for (i = 0; i < grp->num_pins; i++) { in max96755_pinctrl_set_grp_mux()
485 offset = grp->pins[i] - pinctrl->pin_base; in max96755_pinctrl_set_grp_mux()
517 if (grp->data) { in max96755_pinctrl_set_grp_mux()
518 struct serdes_group_data *gdata = grp->data; in max96755_pinctrl_set_grp_mux()
H A Dmaxim-max96772.c540 struct group_desc *grp; in max96772_pinctrl_set_grp_mux() local
550 grp = &serdes->chip_data->pinctrl_info->groups[group_selector]; in max96772_pinctrl_set_grp_mux()
551 if (!grp) { in max96772_pinctrl_set_grp_mux()
558 func->data, grp->name, grp->data, grp->num_pins); in max96772_pinctrl_set_grp_mux()
564 for (i = 0; i < grp->num_pins; i++) { in max96772_pinctrl_set_grp_mux()
565 offset = grp->pins[i] - pinctrl->pin_base; in max96772_pinctrl_set_grp_mux()
598 if (grp->data) { in max96772_pinctrl_set_grp_mux()
599 struct serdes_group_data *gdata = grp->data; in max96772_pinctrl_set_grp_mux()
H A Dmaxim-max96789.c460 struct group_desc *grp; in max96789_pinctrl_set_grp_mux() local
470 grp = &serdes->chip_data->pinctrl_info->groups[group_selector]; in max96789_pinctrl_set_grp_mux()
471 if (!grp) { in max96789_pinctrl_set_grp_mux()
478 func->data, grp->name, grp->data, grp->num_pins); in max96789_pinctrl_set_grp_mux()
484 for (i = 0; i < grp->num_pins; i++) { in max96789_pinctrl_set_grp_mux()
485 offset = grp->pins[i] - pinctrl->pin_base; in max96789_pinctrl_set_grp_mux()
517 if (grp->data) { in max96789_pinctrl_set_grp_mux()
518 struct serdes_group_data *gdata = grp->data; in max96789_pinctrl_set_grp_mux()
H A Dmaxim-max96745.c564 struct group_desc *grp; in max96745_pinctrl_set_grp_mux() local
573 grp = &serdes->chip_data->pinctrl_info->groups[group_selector]; in max96745_pinctrl_set_grp_mux()
574 if (!grp) { in max96745_pinctrl_set_grp_mux()
581 func->data, grp->name, grp->data, grp->num_pins); in max96745_pinctrl_set_grp_mux()
586 for (i = 0; i < grp->num_pins; i++) { in max96745_pinctrl_set_grp_mux()
587 offset = grp->pins[i] - pinctrl->pin_base; in max96745_pinctrl_set_grp_mux()
/rk3399_rockchip-uboot/drivers/pinctrl/
H A Dpinctrl-max96755f.c338 const struct group_desc *grp = &max96755f_groups[group_selector]; in max96755f_pinmux_set() local
342 for (i = 0; i < grp->num_configs; i++) { in max96755f_pinmux_set()
343 const struct config_desc *config = &grp->configs[i]; in max96755f_pinmux_set()
351 for (i = 0; i < grp->num_pins; i++) { in max96755f_pinmux_set()
352 ret = dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(grp->pins[i]), in max96755f_pinmux_set()
361 ret = dm_i2c_reg_clrset(dev->parent, GPIO_B_REG(grp->pins[i]), in max96755f_pinmux_set()
370 GPIO_C_REG(grp->pins[i]), in max96755f_pinmux_set()
H A Dpinctrl-max96745.c355 const struct group_desc *grp = &max96745_groups[group_selector]; in max96745_pinmux_set() local
359 for (i = 0; i < grp->num_pins; i++) { in max96745_pinmux_set()
360 dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(grp->pins[i]), in max96745_pinmux_set()
365 dm_i2c_reg_clrset(dev->parent, GPIO_B_REG(grp->pins[i]), in max96745_pinmux_set()
370 dm_i2c_reg_clrset(dev->parent, GPIO_C_REG(grp->pins[i]), in max96745_pinmux_set()
374 dm_i2c_reg_clrset(dev->parent, GPIO_D_REG(grp->pins[i]), in max96745_pinmux_set()
/rk3399_rockchip-uboot/drivers/video/drm/display-serdes/rohm/
H A Drohm-bu18rl82.c347 struct group_desc *grp; in bu18rl82_pinctrl_set_grp_mux() local
356 grp = &serdes->chip_data->pinctrl_info->groups[group_selector]; in bu18rl82_pinctrl_set_grp_mux()
357 if (!grp) { in bu18rl82_pinctrl_set_grp_mux()
364 func->data, grp->name, grp->data, grp->num_pins); in bu18rl82_pinctrl_set_grp_mux()
369 for (i = 0; i < grp->num_pins; i++) { in bu18rl82_pinctrl_set_grp_mux()
370 offset = grp->pins[i] - pinctrl->pin_base; in bu18rl82_pinctrl_set_grp_mux()
H A Drohm-bu18tl82.c330 struct group_desc *grp; in bu18tl82_pinctrl_set_grp_mux() local
339 grp = &serdes->chip_data->pinctrl_info->groups[group_selector]; in bu18tl82_pinctrl_set_grp_mux()
340 if (!grp) { in bu18tl82_pinctrl_set_grp_mux()
348 grp->name, grp->data, grp->num_pins); in bu18tl82_pinctrl_set_grp_mux()
353 for (i = 0; i < grp->num_pins; i++) { in bu18tl82_pinctrl_set_grp_mux()
354 offset = grp->pins[i] - pinctrl->pin_base; in bu18tl82_pinctrl_set_grp_mux()
/rk3399_rockchip-uboot/drivers/net/phy/
H A Dmicrel_ksz90x1.c82 const struct ksz90x1_reg_field *grp; member
123 val[i] = dev_read_u32_default(dev, ofcfg->grp[i].name, ~0); in ksz90x1_of_config_group()
124 offset = ofcfg->grp[i].off; in ksz90x1_of_config_group()
127 regval |= ofcfg->grp[i].dflt << offset; in ksz90x1_of_config_group()
132 max = (1 << ofcfg->grp[i].size) - 1; in ksz90x1_of_config_group()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra/
H A Dpinmux.h236 u32 grp:16; /* pin group PMUX_MIPIPADCTRLGRP_x */ member
/rk3399_rockchip-uboot/include/
H A Dtwl4030.h244 #define MSG_BROADCAST(devgrp, grp, type, type2, state) \ argument
245 ((devgrp) << 13 | 1 << 12 | (grp) << 9 | (type2) << 7 \
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra124/
H A Dpinmux.c308 #define MIPIPADCTRL_GRP(grp, f0, f1) \ argument

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