xref: /rk3399_rockchip-uboot/arch/arm/dts/imx7-colibri.dts (revision a375ff8e14bea0a5cbfff99d6456aa8d9a3320ab)
1e60f7490SStefan Agner/*
2e60f7490SStefan Agner * Copyright 2016 Toradex AG
3e60f7490SStefan Agner *
4e60f7490SStefan Agner * SPDX-License-Identifier:     GPL-2.0+ or X11
5e60f7490SStefan Agner */
6e60f7490SStefan Agner
7e60f7490SStefan Agner/dts-v1/;
8e60f7490SStefan Agner#include <dt-bindings/gpio/gpio.h>
9*993274f4SPeng Fan#include "imx7d.dtsi"
10e60f7490SStefan Agner
11e60f7490SStefan Agner/ {
12e60f7490SStefan Agner	model = "Toradex Colibri iMX7S/D";
13e60f7490SStefan Agner	compatible = "toradex,imx7-colibri", "fsl,imx7";
14e60f7490SStefan Agner
15e60f7490SStefan Agner	chosen {
16e60f7490SStefan Agner		stdout-path = &uart1;
17e60f7490SStefan Agner	};
18e60f7490SStefan Agner};
19e60f7490SStefan Agner
20e60f7490SStefan Agner&i2c1 {
21e60f7490SStefan Agner	pinctrl-names = "default", "gpio";
22e60f7490SStefan Agner	pinctrl-0 = <&pinctrl_i2c1>;
23e60f7490SStefan Agner	pinctrl-1 = <&pinctrl_i2c1_gpio>;
24e60f7490SStefan Agner	sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
25e60f7490SStefan Agner	scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
26e60f7490SStefan Agner	status = "okay";
27cced7e5bSStefan Agner
28cced7e5bSStefan Agner	rn5t567@33 {
29cced7e5bSStefan Agner		compatible = "ricoh,rn5t567";
30cced7e5bSStefan Agner		reg = <0x33>;
31cced7e5bSStefan Agner	};
32e60f7490SStefan Agner};
33e60f7490SStefan Agner
34e60f7490SStefan Agner&i2c4 {
35e60f7490SStefan Agner	pinctrl-names = "default", "gpio";
36e60f7490SStefan Agner	pinctrl-0 = <&pinctrl_i2c4>;
37e60f7490SStefan Agner	pinctrl-1 = <&pinctrl_i2c4_gpio>;
38e60f7490SStefan Agner	sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
39e60f7490SStefan Agner	scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
40e60f7490SStefan Agner	status = "okay";
41e60f7490SStefan Agner};
42e60f7490SStefan Agner
43e60f7490SStefan Agner&uart1 {
44e60f7490SStefan Agner	pinctrl-names = "default";
45e60f7490SStefan Agner	pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
46e60f7490SStefan Agner	uart-has-rtscts;
47e60f7490SStefan Agner	fsl,dte-mode;
48e60f7490SStefan Agner	status = "okay";
49e60f7490SStefan Agner};
50e60f7490SStefan Agner
51e60f7490SStefan Agner&iomuxc {
52e60f7490SStefan Agner	pinctrl_i2c4: i2c4-grp {
53e60f7490SStefan Agner		fsl,pins = <
54e60f7490SStefan Agner			MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA	0x4000007f
55e60f7490SStefan Agner			MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL	0x4000007f
56e60f7490SStefan Agner		>;
57e60f7490SStefan Agner	};
58e60f7490SStefan Agner
59e60f7490SStefan Agner	pinctrl_i2c4_gpio: i2c4-gpio-grp {
60e60f7490SStefan Agner			fsl,pins = <
61e60f7490SStefan Agner			MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9	0x4000007f
62e60f7490SStefan Agner			MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8	0x4000007f
63e60f7490SStefan Agner		>;
64e60f7490SStefan Agner	};
65e60f7490SStefan Agner
66e60f7490SStefan Agner	pinctrl_uart1: uart1-grp {
67e60f7490SStefan Agner		fsl,pins = <
68e60f7490SStefan Agner			MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX	0x79
69e60f7490SStefan Agner			MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX	0x79
70e60f7490SStefan Agner			MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS	0x79
71e60f7490SStefan Agner			MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS	0x79
72e60f7490SStefan Agner		>;
73e60f7490SStefan Agner	};
74e60f7490SStefan Agner
75e60f7490SStefan Agner	pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
76e60f7490SStefan Agner		fsl,pins = <
77e60f7490SStefan Agner			MX7D_PAD_SD2_DATA1__GPIO5_IO15		0x14 /* DCD */
78e60f7490SStefan Agner			MX7D_PAD_SD2_DATA0__GPIO5_IO14		0x14 /* DTR */
79e60f7490SStefan Agner		>;
80e60f7490SStefan Agner	};
81e60f7490SStefan Agner};
82e60f7490SStefan Agner
83e60f7490SStefan Agner&iomuxc_lpsr {
84e60f7490SStefan Agner	pinctrl_i2c1: i2c1-grp {
85e60f7490SStefan Agner		fsl,pins = <
86*993274f4SPeng Fan			MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA	0x4000007f
87*993274f4SPeng Fan			MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL	0x4000007f
88e60f7490SStefan Agner		>;
89e60f7490SStefan Agner	};
90e60f7490SStefan Agner
91e60f7490SStefan Agner	pinctrl_i2c1_gpio: i2c1-gpio-grp {
92e60f7490SStefan Agner		fsl,pins = <
93*993274f4SPeng Fan			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x4000007f
94*993274f4SPeng Fan			MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4	0x4000007f
95e60f7490SStefan Agner		>;
96e60f7490SStefan Agner	};
97e60f7490SStefan Agner};
98