| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | s5pc110-pinctrl.dtsi | 14 gpio-controller; 15 #gpio-cells = <2>; 19 gpio-controller; 20 #gpio-cells = <2>; 24 gpio-controller; 25 #gpio-cells = <2>; 29 gpio-controller; 30 #gpio-cells = <2>; 34 gpio-controller; 35 #gpio-cells = <2>; [all …]
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| H A D | s5pc100-pinctrl.dtsi | 12 gpio-controller; 13 #gpio-cells = <2>; 17 gpio-controller; 18 #gpio-cells = <2>; 22 gpio-controller; 23 #gpio-cells = <2>; 27 gpio-controller; 28 #gpio-cells = <2>; 32 gpio-controller; 33 #gpio-cells = <2>; [all …]
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| H A D | exynos5250-pinctrl.dtsi | 18 gpio-controller; 19 #gpio-cells = <2>; 26 gpio-controller; 27 #gpio-cells = <2>; 34 gpio-controller; 35 #gpio-cells = <2>; 42 gpio-controller; 43 #gpio-cells = <2>; 50 gpio-controller; 51 #gpio-cells = <2>; [all …]
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| H A D | exynos4x12-pinctrl.dtsi | 18 gpio-controller; 19 #gpio-cells = <2>; 26 gpio-controller; 27 #gpio-cells = <2>; 34 gpio-controller; 35 #gpio-cells = <2>; 42 gpio-controller; 43 #gpio-cells = <2>; 50 gpio-controller; 51 #gpio-cells = <2>; [all …]
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| H A D | exynos4210-pinctrl.dtsi | 20 gpio-controller; 21 #gpio-cells = <2>; 28 gpio-controller; 29 #gpio-cells = <2>; 36 gpio-controller; 37 #gpio-cells = <2>; 44 gpio-controller; 45 #gpio-cells = <2>; 52 gpio-controller; 53 #gpio-cells = <2>; [all …]
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| H A D | exynos54xx-pinctrl.dtsi | 20 gpio-controller; 21 #gpio-cells = <2>; 28 gpio-controller; 29 #gpio-cells = <2>; 39 gpio-controller; 40 #gpio-cells = <2>; 50 gpio-controller; 51 #gpio-cells = <2>; 58 gpio-controller; 59 #gpio-cells = <2>; [all …]
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| H A D | uniphier-pro4.dtsi | 119 port0x: gpio@55000008 { 120 compatible = "socionext,uniphier-gpio"; 122 gpio-controller; 123 #gpio-cells = <2>; 126 port1x: gpio@55000010 { 127 compatible = "socionext,uniphier-gpio"; 129 gpio-controller; 130 #gpio-cells = <2>; 133 port2x: gpio@55000018 { 134 compatible = "socionext,uniphier-gpio"; [all …]
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| H A D | keystone-k2hk.dtsi | 47 compatible = "ti,keystone-dsp-gpio"; 48 gpio-controller; 49 #gpio-cells = <2>; 50 gpio,syscon-dev = <&devctrl 0x240>; 54 compatible = "ti,keystone-dsp-gpio"; 55 gpio-controller; 56 #gpio-cells = <2>; 57 gpio,syscon-dev = <&devctrl 0x244>; 61 compatible = "ti,keystone-dsp-gpio"; 62 gpio-controller; [all …]
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| H A D | uniphier-pxs2.dtsi | 181 port0x: gpio@55000008 { 182 compatible = "socionext,uniphier-gpio"; 184 gpio-controller; 185 #gpio-cells = <2>; 188 port1x: gpio@55000010 { 189 compatible = "socionext,uniphier-gpio"; 191 gpio-controller; 192 #gpio-cells = <2>; 195 port2x: gpio@55000018 { 196 compatible = "socionext,uniphier-gpio"; [all …]
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| H A D | uniphier-pro5.dtsi | 206 port0x: gpio@55000008 { 207 compatible = "socionext,uniphier-gpio"; 209 gpio-controller; 210 #gpio-cells = <2>; 213 port1x: gpio@55000010 { 214 compatible = "socionext,uniphier-gpio"; 216 gpio-controller; 217 #gpio-cells = <2>; 220 port2x: gpio@55000018 { 221 compatible = "socionext,uniphier-gpio"; [all …]
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| /rk3399_rockchip-uboot/drivers/gpio/ |
| H A D | adi_gpio2.c | 20 static void gpio_error(unsigned gpio) in gpio_error() argument 22 printf("adi_gpio2: GPIO %d wasn't requested!\n", gpio); in gpio_error() 56 static DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM); 59 inline int check_gpio(unsigned gpio) in check_gpio() argument 62 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 || in check_gpio() 63 gpio == GPIO_PH14 || gpio == GPIO_PH15 || in check_gpio() 64 gpio == GPIO_PJ14 || gpio == GPIO_PJ15) in check_gpio() 67 if (gpio >= MAX_GPIOS) in check_gpio() 72 static void port_setup(unsigned gpio, unsigned short usage) in port_setup() argument 76 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); in port_setup() [all …]
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| H A D | mvgpio.c | 22 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument 24 if (gpio >= MV_MAX_GPIO) { in gpio_request() 25 printf("%s: Invalid GPIO requested %d\n", __func__, gpio); in gpio_request() 31 int gpio_free(unsigned gpio) in gpio_free() argument 36 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument 40 if (gpio >= MV_MAX_GPIO) { in gpio_direction_input() 41 printf("%s: Invalid GPIO %d\n", __func__, gpio); in gpio_direction_input() 45 gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio)); in gpio_direction_input() 46 writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gcdr); in gpio_direction_input() 50 int gpio_direction_output(unsigned gpio, int value) in gpio_direction_output() argument [all …]
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| H A D | mpc83xx_gpio.c | 37 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument 39 if (gpio >= MAX_NUM_GPIOS) in gpio_request() 45 int gpio_free(unsigned gpio) in gpio_free() argument 52 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument 60 ctrlr = gpio >> 5; in gpio_direction_input() 61 line = gpio & (0x1F); in gpio_direction_input() 66 clrbits_be32(&im->gpio[ctrlr].dir, line_mask); in gpio_direction_input() 72 int gpio_direction_output(unsigned gpio, int value) in gpio_direction_output() argument 84 gpio_set_value(gpio, value); in gpio_direction_output() 87 ctrlr = gpio >> 5; in gpio_direction_output() [all …]
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| H A D | tegra_gpio.c | 46 static int get_config(unsigned gpio) in get_config() argument 49 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in get_config() 53 u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); in get_config() 54 type = (u >> GPIO_BIT(gpio)) & 1; in get_config() 57 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO"); in get_config() 63 static void set_config(unsigned gpio, int type) in set_config() argument 66 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in set_config() 70 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO"); in set_config() 72 u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); in set_config() 74 u |= 1 << GPIO_BIT(gpio); in set_config() [all …]
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| H A D | s5p_gpio.c | 22 #define CON_SFR(gpio, cfg) ((cfg) << ((gpio) << 2)) argument 23 #define CON_SFR_UNSHIFT(val, gpio) ((val) >> ((gpio) << 2)) argument 25 #define DAT_MASK(gpio) (0x1 << (gpio)) argument 26 #define DAT_SET(gpio) (0x1 << (gpio)) argument 28 #define PULL_MASK(gpio) (0x3 << ((gpio) << 1)) argument 29 #define PULL_MODE(gpio, pull) ((pull) << ((gpio) << 1)) argument 31 #define DRV_MASK(gpio) (0x3 << ((gpio) << 1)) argument 32 #define DRV_SET(gpio, mode) ((mode) << ((gpio) << 1)) argument 33 #define RATE_MASK(gpio) (0x1 << (gpio + 16)) argument 34 #define RATE_SET(gpio) (0x1 << (gpio + 16)) argument [all …]
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| H A D | spear_gpio.c | 17 static int gpio_direction(unsigned gpio, in gpio_direction() argument 26 val |= 1 << gpio; in gpio_direction() 28 val &= ~(1 << gpio); in gpio_direction() 35 int gpio_set_value(unsigned gpio, int value) in gpio_set_value() argument 40 writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]); in gpio_set_value() 42 writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]); in gpio_set_value() 47 int gpio_get_value(unsigned gpio) in gpio_get_value() argument 52 val = readl(®s->gpiodata[DATA_REG_ADDR(gpio)]); in gpio_get_value() 57 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument 59 if (gpio >= SPEAR_GPIO_COUNT) in gpio_request() [all …]
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| H A D | omap_gpio.c | 45 static inline int get_gpio_index(int gpio) in get_gpio_index() argument 47 return gpio & 0x1f; in get_gpio_index() 50 int gpio_is_valid(int gpio) in gpio_is_valid() argument 52 return (gpio >= 0) && (gpio < OMAP_MAX_GPIO); in gpio_is_valid() 55 static void _set_gpio_direction(const struct gpio_bank *bank, int gpio, in _set_gpio_direction() argument 65 l |= 1 << gpio; in _set_gpio_direction() 67 l &= ~(1 << gpio); in _set_gpio_direction() 75 static int _get_gpio_direction(const struct gpio_bank *bank, int gpio) in _get_gpio_direction() argument 84 if (v & (1 << gpio)) in _get_gpio_direction() 90 static void _set_gpio_dataout(const struct gpio_bank *bank, int gpio, in _set_gpio_dataout() argument [all …]
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| H A D | xilinx_gpio.c | 48 static struct xilinx_gpio_priv *gpio_get_controller(unsigned gpio) in gpio_get_controller() argument 55 if (gpio >= priv->gpio_min && gpio <= priv->gpio_max) { in gpio_get_controller() 66 static char *get_name(unsigned gpio) in get_name() argument 73 priv = gpio_get_controller(gpio); in get_name() 75 gpio_priv = gpio - priv->gpio_min; in get_name() 84 static int gpio_get_output_value(unsigned gpio) in gpio_get_output_value() argument 87 struct xilinx_gpio_priv *priv = gpio_get_controller(gpio); in gpio_get_output_value() 90 gpio_priv = gpio - priv->gpio_min; in gpio_get_output_value() 101 static int gpio_get_input_value(unsigned gpio) in gpio_get_input_value() argument 105 struct xilinx_gpio_priv *priv = gpio_get_controller(gpio); in gpio_get_input_value() [all …]
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| H A D | kona_gpio.c | 17 #define GPIO_BANK(gpio) ((gpio) >> 5) argument 18 #define GPIO_BITMASK(gpio) \ argument 19 (1UL << ((gpio) & (GPIO_PER_BANK - 1))) 46 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument 51 off = GPIO_PWD_STATUS(GPIO_BANK(gpio)); in gpio_request() 52 value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio); in gpio_request() 58 int gpio_free(unsigned gpio) in gpio_free() argument 63 off = GPIO_PWD_STATUS(GPIO_BANK(gpio)); in gpio_free() 64 value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio); in gpio_free() 70 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument [all …]
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| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf5445x/ |
| H A D | cpu_init.c | 79 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cpu_init_f() local 90 out_8(&gpio->par_fbctl, in cpu_init_f() 94 out_8(&gpio->par_be, in cpu_init_f() 143 out_8(&gpio->par_cani2c, 0xF0); in cpu_init_f() 145 out_be16(&gpio->pcr_b, 0x003C); in cpu_init_f() 147 out_8(&gpio->srcr_cani2c, 0x03); in cpu_init_f() 151 out_8(&gpio->par_ssi0h, 0xA0); in cpu_init_f() 153 out_8(&gpio->par_ssi0h, 0xA8); in cpu_init_f() 155 out_8(&gpio->par_ssi0l, 0x2); in cpu_init_f() 157 out_8(&gpio->par_cani2c, 0xAA); in cpu_init_f() [all …]
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| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | mpc85xx_gpio.h | 23 ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); in mpc85xx_gpio_set() local 30 dir |= (in_be32(&gpio->gpdir) & ~mask); in mpc85xx_gpio_set() 31 val |= (in_be32(&gpio->gpdat) & ~mask); in mpc85xx_gpio_set() 38 out_be32(&gpio->gpdat, val); in mpc85xx_gpio_set() 39 out_be32(&gpio->gpdir, dir); in mpc85xx_gpio_set() 59 ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); in mpc85xx_gpio_get() local 62 return in_be32(&gpio->gpdat) & mask; in mpc85xx_gpio_get() 69 static inline int gpio_request(unsigned gpio, const char *label) in gpio_request() argument 75 static inline int gpio_free(unsigned gpio) in gpio_free() argument 81 static inline int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument [all …]
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| /rk3399_rockchip-uboot/board/renesas/sh7753evb/ |
| H A D | sh7753evb.c | 24 struct gpio_regs *gpio = GPIO_BASE; in init_gpio() local 28 writew(0x0000, &gpio->pacr); /* GETHER */ in init_gpio() 29 writew(0x0001, &gpio->pbcr); /* INTC */ in init_gpio() 30 writew(0x0000, &gpio->pccr); /* PWMU, INTC */ in init_gpio() 31 writew(0x0000, &gpio->pdcr); /* SPI0 */ in init_gpio() 32 writew(0xeaff, &gpio->pecr); /* GPIO */ in init_gpio() 33 writew(0x0000, &gpio->pfcr); /* WDT */ in init_gpio() 34 writew(0x0004, &gpio->pgcr); /* SPI0, GETHER MDIO gate(PTG1) */ in init_gpio() 35 writew(0x0000, &gpio->phcr); /* SPI1 */ in init_gpio() 36 writew(0x0000, &gpio->picr); /* SDHI */ in init_gpio() [all …]
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| /rk3399_rockchip-uboot/drivers/misc/ |
| H A D | smsc_sio1007.c | 68 void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type) in sio1007_gpio_config() argument 72 if (gpio < 0 || gpio > SIO1007_GPIO_NUM) in sio1007_gpio_config() 74 if (gpio >= GPIO_NUM_PER_GROUP) { in sio1007_gpio_config() 76 gpio -= GPIO_NUM_PER_GROUP; in sio1007_gpio_config() 83 sio1007_clrsetbits(port, reg, 1 << gpio, dir << gpio); in sio1007_gpio_config() 84 sio1007_clrsetbits(port, reg + 1, 1 << gpio, pol << gpio); in sio1007_gpio_config() 85 sio1007_clrsetbits(port, reg + 2, 1 << gpio, type << gpio); in sio1007_gpio_config() 91 int sio1007_gpio_get_value(int port, int gpio) in sio1007_gpio_get_value() argument 96 if (gpio < 0 || gpio > SIO1007_GPIO_NUM) in sio1007_gpio_get_value() 98 if (gpio >= GPIO_NUM_PER_GROUP) { in sio1007_gpio_get_value() [all …]
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| /rk3399_rockchip-uboot/board/renesas/sh7752evb/ |
| H A D | sh7752evb.c | 24 struct gpio_regs *gpio = GPIO_BASE; in init_gpio() local 28 writew(0x0000, &gpio->pacr); /* GETHER */ in init_gpio() 29 writew(0x0001, &gpio->pbcr); /* INTC */ in init_gpio() 30 writew(0x0000, &gpio->pccr); /* PWMU, INTC */ in init_gpio() 31 writew(0xeaff, &gpio->pecr); /* GPIO */ in init_gpio() 32 writew(0x0000, &gpio->pfcr); /* WDT */ in init_gpio() 33 writew(0x0000, &gpio->phcr); /* SPI1 */ in init_gpio() 34 writew(0x0000, &gpio->picr); /* SDHI */ in init_gpio() 35 writew(0x0003, &gpio->pkcr); /* SerMux */ in init_gpio() 36 writew(0x0000, &gpio->plcr); /* SerMux */ in init_gpio() [all …]
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| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf532x/ |
| H A D | cpu_init.c | 27 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cpu_init_f() local 41 setbits_8(&gpio->par_cs, GPIO_PAR_CS0_CS0); in cpu_init_f() 49 setbits_8(&gpio->par_cs, GPIO_PAR_CS1_CS1); in cpu_init_f() 71 setbits_8(&gpio->par_cs, GPIO_PAR_CS4); in cpu_init_f() 79 setbits_8(&gpio->par_cs, GPIO_PAR_CS5); in cpu_init_f() 86 out_8(&gpio->par_feci2c, in cpu_init_f() 119 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in uart_port_conf() local 124 clrbits_8(&gpio->par_uart, in uart_port_conf() 126 setbits_8(&gpio->par_uart, in uart_port_conf() 131 clrbits_8(&gpio->par_simp1h, in uart_port_conf() [all …]
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