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Searched refs:enr (Results 1 – 8 of 8) sorted by relevance

/rk3399_rockchip-uboot/drivers/spi/
H A Dzynq_spi.c47 u32 enr; /* 0x14 */ member
103 writel(~confr, &regs->enr); in zynq_spi_init_hw()
123 writel(ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr); in zynq_spi_init_hw()
191 writel(ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr); in zynq_spi_claim_bus()
204 writel(~confr, &regs->enr); in zynq_spi_release_bus()
H A Dzynq_qspi.c60 u32 enr; /* 0x14 */ member
126 writel(~ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr); in zynq_qspi_init_hw()
156 writel(ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr); in zynq_qspi_init_hw()
499 writel(ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr); in zynq_qspi_claim_bus()
510 writel(~ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr); in zynq_qspi_release_bus()
H A Drk_spi.h18 u32 enr; member
H A Drk_spi.c69 debug("ssienr: \t\t0x%08x\n", readl(&regs->enr)); in rkspi_dump_regs()
86 writel(enable ? 1 : 0, &regs->enr); in rkspi_enable_chip()
/rk3399_rockchip-uboot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_arria10.h17 u32 enr; member
44 u32 enr; member
/rk3399_rockchip-uboot/examples/standalone/
H A Drkspi.h13 u32 enr; member
H A Drkspi.c50 debug("ssienr: \t\t0x%08x\n", readl(&regs->enr)); in rkspi_dump_regs()
67 writel(enable ? 1 : 0, &regs->enr); in rkspi_enable_chip()
/rk3399_rockchip-uboot/arch/arm/mach-socfpga/
H A Dclock_manager_arria10.c568 &clock_manager_base->main_pll.enr); in cm_full_cfg()