| /rk3399_rockchip-uboot/drivers/mtd/nand/raw/ |
| H A D | fsmc_nand.c | 262 const u_char *data, u_char *ecc) in fsmc_read_hwecc() argument 281 ecc[0] = (u_char) (ecc_tmp >> 0); in fsmc_read_hwecc() 282 ecc[1] = (u_char) (ecc_tmp >> 8); in fsmc_read_hwecc() 283 ecc[2] = (u_char) (ecc_tmp >> 16); in fsmc_read_hwecc() 284 ecc[3] = (u_char) (ecc_tmp >> 24); in fsmc_read_hwecc() 287 ecc[4] = (u_char) (ecc_tmp >> 0); in fsmc_read_hwecc() 288 ecc[5] = (u_char) (ecc_tmp >> 8); in fsmc_read_hwecc() 289 ecc[6] = (u_char) (ecc_tmp >> 16); in fsmc_read_hwecc() 290 ecc[7] = (u_char) (ecc_tmp >> 24); in fsmc_read_hwecc() 293 ecc[8] = (u_char) (ecc_tmp >> 0); in fsmc_read_hwecc() [all …]
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| H A D | rockchip_nand_v9.c | 217 struct nand_ecc_ctrl *ecc, in rockchip_nand_hw_ecc_setup() argument 224 ecc->strength = strength; in rockchip_nand_hw_ecc_setup() 225 ecc->bytes = DIV_ROUND_UP(ecc->strength * 14, 8); in rockchip_nand_hw_ecc_setup() 226 ecc->bytes = ALIGN(ecc->bytes, 2); in rockchip_nand_hw_ecc_setup() 228 switch (ecc->strength) { in rockchip_nand_hw_ecc_setup() 287 struct nand_ecc_ctrl *ecc = &chip->ecc; in rockchip_nand_read_extra_oob() local 288 int offset = ((ecc->bytes + ecc->prepad) * ecc->steps); in rockchip_nand_read_extra_oob() 302 struct nand_ecc_ctrl *ecc = &chip->ecc; in rockchip_nand_write_extra_oob() local 303 int offset = ((ecc->bytes + ecc->prepad) * ecc->steps); in rockchip_nand_write_extra_oob() 321 struct nand_ecc_ctrl *ecc = &chip->ecc; in rockchip_nand_hw_syndrome_pio_read_page() local [all …]
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| H A D | rockchip_nand.c | 211 struct nand_ecc_ctrl *ecc, in rockchip_nand_hw_ecc_setup() argument 218 ecc->strength = strength; in rockchip_nand_hw_ecc_setup() 219 ecc->bytes = DIV_ROUND_UP(ecc->strength * 14, 8); in rockchip_nand_hw_ecc_setup() 220 ecc->bytes = ALIGN(ecc->bytes, 2); in rockchip_nand_hw_ecc_setup() 222 switch (ecc->strength) { in rockchip_nand_hw_ecc_setup() 286 struct nand_ecc_ctrl *ecc = &chip->ecc; in rockchip_nand_read_extra_oob() local 287 int offset = ((ecc->bytes + ecc->prepad) * ecc->steps); in rockchip_nand_read_extra_oob() 301 struct nand_ecc_ctrl *ecc = &chip->ecc; in rockchip_nand_write_extra_oob() local 302 int offset = ((ecc->bytes + ecc->prepad) * ecc->steps); in rockchip_nand_write_extra_oob() 320 struct nand_ecc_ctrl *ecc = &chip->ecc; in rockchip_nand_hw_syndrome_pio_read_page() local [all …]
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| H A D | sunxi_nand.c | 685 static u16 sunxi_nfc_randomizer_state(struct mtd_info *mtd, int page, bool ecc) in sunxi_nfc_randomizer_state() argument 693 if (ecc) { in sunxi_nfc_randomizer_state() 704 int page, bool ecc) in sunxi_nfc_randomizer_config() argument 715 state = sunxi_nfc_randomizer_state(mtd, page, ecc); in sunxi_nfc_randomizer_config() 754 bool ecc, int page) in sunxi_nfc_randomizer_write_buf() argument 756 sunxi_nfc_randomizer_config(mtd, page, ecc); in sunxi_nfc_randomizer_write_buf() 763 int len, bool ecc, int page) in sunxi_nfc_randomizer_read_buf() argument 765 sunxi_nfc_randomizer_config(mtd, page, ecc); in sunxi_nfc_randomizer_read_buf() 775 struct sunxi_nand_hw_ecc *data = nand->ecc.priv; in sunxi_nfc_hw_ecc_enable() 783 if (nand->ecc.size == 512) in sunxi_nfc_hw_ecc_enable() [all …]
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| H A D | mxc_nand.c | 391 int eccpitch = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; 399 for (i = 0; i < chip->ecc.steps; i++) { 400 toread = min_t(int, length, chip->ecc.prepad); 406 bufpoi += chip->ecc.bytes; 407 host->col_addr += chip->ecc.bytes; 408 length -= chip->ecc.bytes; 410 toread = min_t(int, length, chip->ecc.postpad); 422 mtd->writesize + chip->ecc.prepad, page); 423 bufpoi = buf + chip->ecc.prepad; 424 length = mtd->oobsize - chip->ecc.prepad; [all …]
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| H A D | omap_gpmc.c | 328 for (i = 0; i < chip->ecc.bytes; i++) in omap_calculate_ecc() 334 ecc_code[chip->ecc.bytes - 1] = 0x00; in omap_calculate_ecc() 497 struct nand_ecc_ctrl *ecc = &chip->ecc; in omap_correct_data_bch() local 507 for (i = 0; i < ecc->bytes && !ecc_flag; i++) { in omap_correct_data_bch() 516 for (i = 0; i < ecc->bytes && !ecc_flag; i++) { in omap_correct_data_bch() 530 omap_reverse_list(calc_ecc, ecc->bytes - 1); in omap_correct_data_bch() 534 omap_reverse_list(calc_ecc, ecc->bytes); in omap_correct_data_bch() 550 error_max = SECTOR_BYTES + (ecc->bytes - 1); in omap_correct_data_bch() 553 error_max = SECTOR_BYTES + ecc->bytes; in omap_correct_data_bch() 587 int i, eccsize = chip->ecc.size; in omap_read_page_bch() [all …]
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| H A D | nand_base.c | 1716 void *ecc, int ecclen, in nand_check_erased_ecc_chunk() argument 1729 ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold); in nand_check_erased_ecc_chunk() 1744 memset(ecc, 0xff, ecclen); in nand_check_erased_ecc_chunk() 1796 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome() 1797 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome() 1801 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome() 1808 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome() 1809 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_raw_syndrome() 1814 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome() 1823 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome() [all …]
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| H A D | davinci_nand.c | 168 u_int32_t ecc = 0; in nand_davinci_readecc() local 170 ecc = __raw_readl(&(davinci_emif_regs->nandfecc[ in nand_davinci_readecc() 173 return ecc; in nand_davinci_readecc() 236 if ((diff >> (12 + 3)) < this->ecc.size) { in nand_davinci_correct_data() 374 saved_ecc_layout = chip->ecc.layout; in nand_davinci_write_page() 375 chip->ecc.layout = &nand_keystone_rbl_4bit_layout_oobfirst; in nand_davinci_write_page() 376 mtd->oobavail = chip->ecc.layout->oobavail; in nand_davinci_write_page() 382 status = chip->ecc.write_page_raw(mtd, chip, buf, in nand_davinci_write_page() 385 status = chip->ecc.write_page(mtd, chip, buf, in nand_davinci_write_page() 405 chip->ecc.layout = saved_ecc_layout; in nand_davinci_write_page() [all …]
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| H A D | zynq_nand.c | 566 int i, eccsteps, eccsize = chip->ecc.size; in zynq_nand_write_page_hwecc() 569 u32 *eccpos = chip->ecc.layout->eccpos; in zynq_nand_write_page_hwecc() 574 for (eccsteps = chip->ecc.steps; (eccsteps - 1); eccsteps--) { in zynq_nand_write_page_hwecc() 589 chip->ecc.calculate(mtd, p, &ecc_calc[0]); in zynq_nand_write_page_hwecc() 591 for (i = 0; i < chip->ecc.total; i++) in zynq_nand_write_page_hwecc() 624 int i, eccsize = chip->ecc.size; in zynq_nand_write_page_swecc() 625 int eccbytes = chip->ecc.bytes; in zynq_nand_write_page_swecc() 626 int eccsteps = chip->ecc.steps; in zynq_nand_write_page_swecc() 629 u32 *eccpos = chip->ecc.layout->eccpos; in zynq_nand_write_page_swecc() 633 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in zynq_nand_write_page_swecc() [all …]
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| H A D | nand_bch.c | 45 struct nand_bch_control *nbc = chip->ecc.priv; in nand_bch_calculate_ecc() 48 memset(code, 0, chip->ecc.bytes); in nand_bch_calculate_ecc() 49 encode_bch(nbc->bch, buf, chip->ecc.size, code); in nand_bch_calculate_ecc() 52 for (i = 0; i < chip->ecc.bytes; i++) in nand_bch_calculate_ecc() 71 struct nand_bch_control *nbc = chip->ecc.priv; in nand_bch_correct_data() 75 count = decode_bch(nbc->bch, NULL, chip->ecc.size, read_ecc, calc_ecc, in nand_bch_correct_data() 79 if (errloc[i] < (chip->ecc.size*8)) in nand_bch_correct_data() 114 struct nand_ecclayout *layout = nand->ecc.layout; in nand_bch_init() 117 unsigned int eccsize = nand->ecc.size; in nand_bch_init() 118 unsigned int eccbytes = nand->ecc.bytes; in nand_bch_init() [all …]
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| H A D | atmel_nand.c | 437 static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, in pmecc_correct_data() argument 468 err_byte = ecc[tmp]; in pmecc_correct_data() 469 ecc[tmp] ^= (1 << bit_pos); in pmecc_correct_data() 471 pos = tmp + nand_chip->ecc.layout->eccpos[0]; in pmecc_correct_data() 473 pos, bit_pos, err_byte, ecc[tmp]); in pmecc_correct_data() 484 u8 *ecc) in pmecc_correction() argument 495 eccbytes = nand_chip->ecc.bytes; in pmecc_correction() 497 if (ecc[i] != 0xff) in pmecc_correction() 518 pmecc_correct_data(mtd, buf_pos, ecc, i, in pmecc_correction() 533 int eccsize = chip->ecc.size; in atmel_nand_pmecc_read_page() [all …]
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| H A D | lpc32xx_nand_slc.c | 37 u32 ecc; member 103 #define lpc32xx_dmac_set_ecc() ((u32)&lpc32xx_nand_slc_regs->ecc) 333 static u32 slc_ecc_copy_to_buffer(u8 *spare, const u32 *ecc, int count) in slc_ecc_copy_to_buffer() argument 338 u32 ce = ecc[i / CONFIG_SYS_NAND_ECCBYTES]; in slc_ecc_copy_to_buffer() 419 uint32_t *eccpos = chip->ecc.layout->eccpos; in lpc32xx_read_page_hwecc() 430 lpc32xx_dma_read_buf(mtd, p, chip->ecc.size * chip->ecc.steps); in lpc32xx_read_page_hwecc() 434 for (i = 0; i < chip->ecc.total; i++) in lpc32xx_read_page_hwecc() 437 stat = chip->ecc.correct(mtd, p, &ecc_code[0], &ecc_calc[0]); in lpc32xx_read_page_hwecc() 457 uint32_t *eccpos = chip->ecc.layout->eccpos; in lpc32xx_write_page_hwecc() 467 lpc32xx_dma_write_buf(mtd, p, chip->ecc.size * chip->ecc.steps); in lpc32xx_write_page_hwecc() [all …]
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| H A D | stm32_fmc2_nand.c | 219 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_setup() 222 } else if (chip->ecc.strength == FMC2_ECC_BCH4) { in stm32_fmc2_setup() 319 if (chip->ecc.strength != FMC2_ECC_HAM) { in stm32_fmc2_hwctl() 340 u8 *ecc) in stm32_fmc2_ham_calculate() argument 356 ecc[0] = heccr; in stm32_fmc2_ham_calculate() 357 ecc[1] = heccr >> 8; in stm32_fmc2_ham_calculate() 358 ecc[2] = heccr >> 16; in stm32_fmc2_ham_calculate() 425 u8 *ecc) in stm32_fmc2_bch_calculate() argument 442 ecc[0] = bchpbr; in stm32_fmc2_bch_calculate() 443 ecc[1] = bchpbr >> 8; in stm32_fmc2_bch_calculate() [all …]
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| H A D | nand_spl_simple.c | 162 this->ecc.hwctl(mtd, NAND_ECC_READ); in nand_read_page() 164 this->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_read_page() 165 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page() 186 if (this->ecc.mode != NAND_ECC_SOFT) in nand_read_page() 187 this->ecc.hwctl(mtd, NAND_ECC_READ); in nand_read_page() 189 this->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_read_page() 205 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page() 224 if (nand_chip.ecc.mode == NAND_ECC_SOFT) { in nand_init() 225 nand_chip.ecc.calculate = nand_calculate_ecc; in nand_init() 226 nand_chip.ecc.correct = nand_correct_data; in nand_init()
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| H A D | lpc32xx_nand_mlc.c | 110 } ecc[4]; member 266 memcpy(&oob->ecc[i], lpc32xx_nand_mlc_registers->buff, 10); in lpc32xx_read_page_hwecc() 308 memcpy(&oob->ecc[i], lpc32xx_nand_mlc_registers->data, 10); in lpc32xx_read_page_raw() 366 memcpy(&oob->ecc[i], lpc32xx_nand_mlc_registers->buff, 10); in lpc32xx_read_oob() 456 memcpy(lpc32xx_nand_mlc_registers->buff, &oob->ecc[i], 10); in lpc32xx_write_page_raw() 564 lpc32xx_chip.ecc.mode = NAND_ECC_HW; in board_nand_init() 565 lpc32xx_chip.ecc.layout = &lpc32xx_largepage_ecclayout; in board_nand_init() 566 lpc32xx_chip.ecc.size = 512; in board_nand_init() 567 lpc32xx_chip.ecc.bytes = 10; in board_nand_init() 568 lpc32xx_chip.ecc.strength = 4; in board_nand_init() [all …]
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| H A D | denali.c | 314 int ecc_steps = chip->ecc.steps; in denali_check_erased_page() 315 int ecc_size = chip->ecc.size; in denali_check_erased_page() 316 int ecc_bytes = chip->ecc.bytes; in denali_check_erased_page() 320 chip->ecc.total); in denali_check_erased_page() 331 chip->ecc.strength); in denali_check_erased_page() 364 *uncor_ecc_flags = GENMASK(chip->ecc.steps - 1, 0); in denali_hw_ecc_fixup() 385 unsigned int ecc_size = denali->nand.ecc.size; in denali_sw_ecc_fixup() 639 int ecc_steps = chip->ecc.steps; in denali_oob_xfer() 640 int ecc_size = chip->ecc.size; in denali_oob_xfer() 641 int ecc_bytes = chip->ecc.bytes; in denali_oob_xfer() [all …]
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| H A D | fsl_ifc_nand.c | 294 int sector_start = bufnum * chip->ecc.steps; in fsl_ifc_run_command() 295 int sector_end = sector_start + chip->ecc.steps - 1; in fsl_ifc_run_command() 390 if (chip->ecc.mode == NAND_ECC_HW) in fsl_ifc_cmdfunc() 711 u8 *ecc = chip->oob_poi; in check_erased_page() local 712 const int ecc_size = chip->ecc.bytes; in check_erased_page() 713 const int pkt_size = chip->ecc.size; in check_erased_page() 717 ecc += 8; in check_erased_page() 719 for (i = 0; i < chip->ecc.steps; i++) { in check_erased_page() 720 res = nand_check_erased_ecc_chunk(buf, pkt_size, ecc, ecc_size, in check_erased_page() 721 NULL, 0, chip->ecc.strength); in check_erased_page() [all …]
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| H A D | vf610_nfc.c | 561 int flips_threshold = nfc->chip.ecc.strength / 2; in vf610_nfc_correct_data() 577 flips = count_written_bits(dat, nfc->chip.ecc.size, flips_threshold); in vf610_nfc_correct_data() 584 memset(dat, 0xff, nfc->chip.ecc.size); in vf610_nfc_correct_data() 592 int eccsize = chip->ecc.size; in vf610_nfc_read_page() 675 chip->ecc.size = PAGE_2K; in vf610_nfc_nand_init() 717 if (chip->ecc.size != mtd->writesize) { in vf610_nfc_nand_init() 718 dev_err(nfc->dev, "ecc size: %d\n", chip->ecc.size); in vf610_nfc_nand_init() 729 mtd->ecclayout = chip->ecc.layout; in vf610_nfc_nand_init() 730 chip->ecc.read_page = vf610_nfc_read_page; in vf610_nfc_nand_init() 731 chip->ecc.write_page = vf610_nfc_write_page; in vf610_nfc_nand_init() [all …]
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| H A D | pxa3xx_nand.c | 1256 chip->ecc.read_page_raw(mtd, chip, buf, oob_required, page); in pxa3xx_nand_read_page_hwecc() 1259 NULL, 0, chip->ecc.strength); in pxa3xx_nand_read_page_hwecc() 1341 return chip->ecc.read_page_raw(mtd, chip, chip->buffers->databuf, true, in pxa3xx_nand_read_oob_raw() 1521 struct nand_ecc_ctrl *ecc, in pxa_ecc_init() argument 1530 ecc->mode = NAND_ECC_HW; in pxa_ecc_init() 1531 ecc->size = 512; in pxa_ecc_init() 1532 ecc->strength = 1; in pxa_ecc_init() 1540 ecc->mode = NAND_ECC_HW; in pxa_ecc_init() 1541 ecc->size = 512; in pxa_ecc_init() 1542 ecc->strength = 1; in pxa_ecc_init() [all …]
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| /rk3399_rockchip-uboot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 99 u32 ecc; in ddr3_pbs_tx() local 136 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_pbs_tx() 142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx() 143 dram_info->num_of_std_pups + ecc; in ddr3_pbs_tx() 145 if (ecc) { in ddr3_pbs_tx() 162 reg |= (dram_info->ecc_ena * ecc << in ddr3_pbs_tx() 166 if (ecc) in ddr3_pbs_tx() [all …]
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| H A D | ddr3_dqs.c | 68 int ddr3_find_adll_limits(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, int is_tx); 71 static int ddr3_center_calc(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, 73 int ddr3_special_pattern_i_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, 75 int ddr3_special_pattern_ii_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, 77 int ddr3_set_dqs_centralization_results(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, 133 u32 cs, ecc, reg; in ddr3_dqs_centralization_rx() local 156 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_dqs_centralization_rx() 162 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_rx() 165 if (ecc) in ddr3_dqs_centralization_rx() 173 ecc, 0); in ddr3_dqs_centralization_rx() [all …]
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| H A D | ddr3_read_leveling.c | 46 int ratio_2to1, u32 ecc, 50 int ratio_2to1, u32 ecc, 182 u32 reg, cs, ecc, pup_num, phase, delay, pup; in ddr3_read_leveling_sw() local 206 for (ecc = 0; ecc <= (dram_info->ecc_ena); ecc++) { in ddr3_read_leveling_sw() 211 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_read_leveling_sw() 214 if (ecc) in ddr3_read_leveling_sw() 247 ecc, in ddr3_read_leveling_sw() 255 ecc, in ddr3_read_leveling_sw() 337 u32 *locked_sum, u32 ecc, int *first_octet_locked, in overrun() argument 345 idx = pup + ecc * ECC_BIT; in overrun() [all …]
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| /rk3399_rockchip-uboot/drivers/rkflash/ |
| H A D | sfc_nand.c | 464 u8 ecc; in sfc_nand_get_ecc_status0() local 480 ecc = (status >> 4) & 0x03; in sfc_nand_get_ecc_status0() 482 if (ecc <= 1) in sfc_nand_get_ecc_status0() 484 else if (ecc == 2) in sfc_nand_get_ecc_status0() 505 u8 ecc; in sfc_nand_get_ecc_status1() local 521 ecc = (status >> 4) & 0x03; in sfc_nand_get_ecc_status1() 523 if (ecc == 0) in sfc_nand_get_ecc_status1() 525 else if (ecc == 1) in sfc_nand_get_ecc_status1() 547 u8 ecc; in sfc_nand_get_ecc_status2() local 568 ecc = (status >> 4) & 0x03; in sfc_nand_get_ecc_status2() [all …]
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.mpc83xx.ddrecc | 18 the 'ecc testdw' 'ecc testword' command (see example 'Injecting Multiple-Bit 24 Use cases for DDR 'ecc' command: 29 => ecc captureclear 30 => ecc errdetectclr all 31 => ecc sbecnt 0 39 => ecc injectdatahi 1 43 => ecc testdw 200000 10 47 => ecc status 83 => ecc injectdatahi 1 84 => ecc injectdatalo 1 [all …]
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| /rk3399_rockchip-uboot/fs/yaffs2/ |
| H A D | yaffs_tagscompat.c | 36 unsigned ecc = 0; in yaffs_calc_tags_ecc() local 39 tags->ecc = 0; in yaffs_calc_tags_ecc() 45 ecc ^= bit; in yaffs_calc_tags_ecc() 48 tags->ecc = ecc; in yaffs_calc_tags_ecc() 53 unsigned ecc = tags->ecc; in yaffs_check_tags_ecc() local 57 ecc ^= tags->ecc; in yaffs_check_tags_ecc() 59 if (ecc && ecc <= 64) { in yaffs_check_tags_ecc() 63 ecc--; in yaffs_check_tags_ecc() 65 b[ecc / 8] ^= (1 << (ecc & 7)); in yaffs_check_tags_ecc() 71 } else if (ecc) { in yaffs_check_tags_ecc()
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