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Searched refs:drm_dp_dpcd_readb (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/drivers/video/drm/
H A Danalogix_dp.c88 ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data); in analogix_dp_enable_rx_to_enhanced_mode()
129 ret = drm_dp_dpcd_readb(&dp->aux, DP_EDP_CONFIGURATION_CAP, in analogix_dp_set_enhanced_mode()
159 ret = drm_dp_dpcd_readb(&dp->aux, DP_EDP_CONFIGURATION_SET, &data); in analogix_dp_enable_sink_to_assr_mode()
366 drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &dpcd); in analogix_dp_tps3_supported()
473 retval = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED, &link_align); in analogix_dp_process_equalizer_training()
640 ret = drm_dp_dpcd_readb(&dp->aux, DP_EDP_DPCD_REV, &data); in analogix_dp_get_max_rx_bandwidth()
662 ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LINK_RATE, &data); in analogix_dp_get_max_rx_bandwidth()
682 ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); in analogix_dp_get_max_rx_lane_count()
712 drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD, &dpcd); in analogix_dp_init_training()
848 ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, in analogix_dp_enable_scramble()
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H A Ddw-dp.c542 ret = drm_dp_dpcd_readb(&dp->aux, DP_SET_POWER, &value); in dw_dp_link_power_up()
568 ret = drm_dp_dpcd_readb(&dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST, in dw_dp_link_probe()
/rk3399_rockchip-uboot/include/drm/
H A Ddrm_dp_helper.h1207 static inline ssize_t drm_dp_dpcd_readb(struct drm_dp_aux *aux, in drm_dp_dpcd_readb() function