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Searched refs:dev_read_u32_default (Results 1 – 25 of 96) sorted by relevance

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/rk3399_rockchip-uboot/drivers/video/rk_eink/
H A Drk_eink_display.c886 plat->width = dev_read_u32_default(dev, "panel,width", 0); in rockchip_eink_display_ofdata_to_platdata()
887 plat->height = dev_read_u32_default(dev, "panel,height", 0); in rockchip_eink_display_ofdata_to_platdata()
888 plat->vir_width = dev_read_u32_default(dev, "panel,vir_width", plat->width); in rockchip_eink_display_ofdata_to_platdata()
889 plat->vir_height = dev_read_u32_default(dev, "panel,vir_height", plat->height); in rockchip_eink_display_ofdata_to_platdata()
890 plat->sdck = dev_read_u32_default(dev, "panel,sdck", 0); in rockchip_eink_display_ofdata_to_platdata()
891 plat->lsl = dev_read_u32_default(dev, "panel,lsl", 0); in rockchip_eink_display_ofdata_to_platdata()
892 plat->lbl = dev_read_u32_default(dev, "panel,lbl", 0); in rockchip_eink_display_ofdata_to_platdata()
893 plat->ldl = dev_read_u32_default(dev, "panel,ldl", 0); in rockchip_eink_display_ofdata_to_platdata()
894 plat->lel = dev_read_u32_default(dev, "panel,lel", 0); in rockchip_eink_display_ofdata_to_platdata()
895 plat->gdck_sta = dev_read_u32_default(dev, "panel,gdck-sta", 0); in rockchip_eink_display_ofdata_to_platdata()
[all …]
/rk3399_rockchip-uboot/drivers/video/drm/
H A Drockchip_tve.c446 tve->preferred_mode = dev_read_u32_default(tve->dev, "rockchip,tvemode", -1); in tve_parse_dt()
454 tve->lumafilter0 = dev_read_u32_default(tve->dev, "rockchip,lumafilter0", 0); in tve_parse_dt()
460 tve->lumafilter1 = dev_read_u32_default(tve->dev, "rockchip,lumafilter1", 0); in tve_parse_dt()
466 tve->lumafilter2 = dev_read_u32_default(tve->dev, "rockchip,lumafilter2", 0); in tve_parse_dt()
472 tve->lumafilter3 = dev_read_u32_default(tve->dev, "rockchip,lumafilter3", 0); in tve_parse_dt()
478 tve->lumafilter4 = dev_read_u32_default(tve->dev, "rockchip,lumafilter4", 0); in tve_parse_dt()
484 tve->lumafilter5 = dev_read_u32_default(tve->dev, "rockchip,lumafilter5", 0); in tve_parse_dt()
490 tve->lumafilter6 = dev_read_u32_default(tve->dev, "rockchip,lumafilter6", 0); in tve_parse_dt()
496 tve->lumafilter7 = dev_read_u32_default(tve->dev, "rockchip,lumafilter7", 0); in tve_parse_dt()
502 tve->upsample_mode = dev_read_u32_default(tve->dev, "rockchip,tve-upsample", -1); in tve_parse_dt()
[all …]
H A Drockchip_panel.c430 plat->delay.prepare = dev_read_u32_default(dev, "prepare-delay-ms", 0); in rockchip_panel_ofdata_to_platdata()
431 plat->delay.unprepare = dev_read_u32_default(dev, "unprepare-delay-ms", 0); in rockchip_panel_ofdata_to_platdata()
432 plat->delay.enable = dev_read_u32_default(dev, "enable-delay-ms", 0); in rockchip_panel_ofdata_to_platdata()
433 plat->delay.disable = dev_read_u32_default(dev, "disable-delay-ms", 0); in rockchip_panel_ofdata_to_platdata()
434 plat->delay.init = dev_read_u32_default(dev, "init-delay-ms", 0); in rockchip_panel_ofdata_to_platdata()
435 plat->delay.reset = dev_read_u32_default(dev, "reset-delay-ms", 0); in rockchip_panel_ofdata_to_platdata()
437 plat->bus_format = dev_read_u32_default(dev, "bus-format", in rockchip_panel_ofdata_to_platdata()
439 plat->bpc = dev_read_u32_default(dev, "bpc", 8); in rockchip_panel_ofdata_to_platdata()
H A Dmax96755f.c166 device->lanes = dev_read_u32_default(dev, "dsi,lanes", 4); in max96755f_bridge_bind()
167 device->format = dev_read_u32_default(dev, "dsi,format", in max96755f_bridge_bind()
170 device->channel = dev_read_u32_default(dev, "reg", 0); in max96755f_bridge_bind()
190 priv->num_lanes = dev_read_u32_default(dev, "dsi,lanes", 4); in max96755f_bridge_probe()
H A Drohm-bu18tl82.c226 device->lanes = dev_read_u32_default(dev, "dsi,lanes", 4); in bu18tl82_probe()
227 device->format = dev_read_u32_default(dev, "dsi,format", in bu18tl82_probe()
232 device->channel = dev_read_u32_default(dev, "reg", 0); in bu18tl82_probe()
/rk3399_rockchip-uboot/drivers/input/
H A Dadc_key.c33 up_threshold = dev_read_u32_default(dev_get_parent(dev), in adc_key_ofdata_to_platdata()
38 uc_key->code = dev_read_u32_default(dev, "linux,code", -ENODATA); in adc_key_ofdata_to_platdata()
42 voltage = dev_read_u32_default(dev, "press-threshold-microvolt", -ENODATA); in adc_key_ofdata_to_platdata()
H A Drk_key.c21 uc_key->code = dev_read_u32_default(dev, "linux,code", -ENODATA); in rk_key_ofdata_to_platdata()
32 uc_key->center = dev_read_u32_default(dev, "rockchip,adc_value", 0); in rk_key_ofdata_to_platdata()
H A Dgpio_key.c21 uc_key->code = dev_read_u32_default(dev, "linux,code", -ENODATA); in gpio_key_ofdata_to_platdata()
H A Dcros_ec_keyb.c170 config->key_rows = dev_read_u32_default(dev, "keypad,num-rows", 0); in cros_ec_keyb_decode_fdt()
171 config->key_cols = dev_read_u32_default(dev, "keypad,num-columns", 0); in cros_ec_keyb_decode_fdt()
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Dpanel.c194 panel->delay.prepare = dev_read_u32_default(dev, "panel-prepare-delay-ms", 0); in rk628_panel_info_get()
195 panel->delay.enable = dev_read_u32_default(dev, "panel-enable-delay-ms", 0); in rk628_panel_info_get()
196 panel->delay.disable = dev_read_u32_default(dev, "panel-disable-delay-ms", 0); in rk628_panel_info_get()
197 panel->delay.unprepare = dev_read_u32_default(dev, "panel-unprepare-delay-ms", 0); in rk628_panel_info_get()
198 panel->delay.reset = dev_read_u32_default(dev, "panel-reset-delay-ms", 0); in rk628_panel_info_get()
199 panel->delay.init = dev_read_u32_default(dev, "panel-init-delay-ms", 0); in rk628_panel_info_get()
/rk3399_rockchip-uboot/drivers/video/drm/display-serdes/
H A Dserdes-i2c.c152 serdes->id_serdes_bridge_split = dev_read_u32_default(dev, "id-serdes-bridge-split", 0); in serdes_i2c_probe()
160 serdes->reg_hw = dev_read_u32_default(dev, "reg-hw", 0); in serdes_i2c_probe()
161 serdes->reg_use = dev_read_u32_default(dev, "reg", 0); in serdes_i2c_probe()
162 serdes->link_use = dev_read_u32_default(dev, "link", 0); in serdes_i2c_probe()
163 serdes->id_serdes_panel_split = dev_read_u32_default(dev, "id-serdes-panel-split", 0); in serdes_i2c_probe()
H A Dserdes-bridge-split.c136 device->lanes = dev_read_u32_default(dev->parent, "dsi,lanes", 4); in serdes_bridge_split_probe()
137 device->format = dev_read_u32_default(dev->parent, "dsi,format", in serdes_bridge_split_probe()
140 device->channel = dev_read_u32_default(dev->parent, "reg", 0); in serdes_bridge_split_probe()
H A Dserdes-bridge.c148 device->lanes = dev_read_u32_default(dev->parent, "dsi,lanes", 4); in serdes_bridge_probe()
149 device->format = dev_read_u32_default(dev->parent, "dsi,format", in serdes_bridge_probe()
152 device->channel = dev_read_u32_default(dev->parent, "reg", 0); in serdes_bridge_probe()
/rk3399_rockchip-uboot/drivers/power/fuel_gauge/
H A Dspl_fg_rk817.c123 battery->bat_res_up = dev_read_u32_default(dev, "bat_res_up", -1); in rk817_fg_ofdata_to_platdata()
129 battery->bat_res_down = dev_read_u32_default(dev, "bat_res_down", -1); in rk817_fg_ofdata_to_platdata()
135 battery->virtual_power = dev_read_u32_default(dev, "virtual_power", -1); in rk817_fg_ofdata_to_platdata()
H A Dfg_cw201x.c176 cw201x->hw_id_check = dev_read_u32_default(dev, "hw_id_check", 0); in cw201x_ofdata_to_platdata()
197 cw201x->divider_res1 = dev_read_u32_default(dev, "divider_res1", 0); in cw201x_ofdata_to_platdata()
198 cw201x->divider_res2 = dev_read_u32_default(dev, "divider_res2", 0); in cw201x_ofdata_to_platdata()
/rk3399_rockchip-uboot/drivers/power/
H A Dcharge_animation.c198 dev_read_u32_default(dev, "rockchip,uboot-charge-on", 0); in charge_animation_ofdata_to_platdata()
200 dev_read_u32_default(dev, "rockchip,android-charge-on", 0); in charge_animation_ofdata_to_platdata()
203 dev_read_u32_default(dev, "rockchip,uboot-exit-charge-auto", 0); in charge_animation_ofdata_to_platdata()
205 dev_read_u32_default(dev, "rockchip,uboot-exit-charge-level", 0); in charge_animation_ofdata_to_platdata()
207 dev_read_u32_default(dev, "rockchip,uboot-exit-charge-voltage", 0); in charge_animation_ofdata_to_platdata()
210 dev_read_u32_default(dev, "rockchip,uboot-low-power-voltage", 0); in charge_animation_ofdata_to_platdata()
213 dev_read_u32_default(dev, "rockchip,screen-on-voltage", 0); in charge_animation_ofdata_to_platdata()
215 dev_read_u32_default(dev, "rockchip,system-suspend", 0); in charge_animation_ofdata_to_platdata()
218 dev_read_u32_default(dev, "rockchip,auto-wakeup-interval", 0); in charge_animation_ofdata_to_platdata()
220 dev_read_u32_default(dev, "rockchip,auto-wakeup-screen-invert", 0); in charge_animation_ofdata_to_platdata()
[all …]
/rk3399_rockchip-uboot/drivers/power/regulator/
H A Dpwm_regulator.c109 priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1); in pwm_regulator_ofdata_to_platdata()
117 priv->init_voltage = dev_read_u32_default(dev, "rockchip,pwm_voltage", in pwm_regulator_ofdata_to_platdata()
H A Dregulator-uclass.c450 uc_pdata->min_uV = dev_read_u32_default(dev, "regulator-min-microvolt", in regulator_pre_probe()
452 uc_pdata->max_uV = dev_read_u32_default(dev, "regulator-max-microvolt", in regulator_pre_probe()
454 uc_pdata->init_uV = dev_read_u32_default(dev, "regulator-init-microvolt", in regulator_pre_probe()
456 uc_pdata->min_uA = dev_read_u32_default(dev, "regulator-min-microamp", in regulator_pre_probe()
458 uc_pdata->max_uA = dev_read_u32_default(dev, "regulator-max-microamp", in regulator_pre_probe()
463 uc_pdata->ramp_delay = dev_read_u32_default(dev, "regulator-ramp-delay", in regulator_pre_probe()
/rk3399_rockchip-uboot/drivers/spi/
H A Dspi-uclass.c175 spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); in spi_post_probe()
447 plat->cs = dev_read_u32_default(dev, "reg", -1); in spi_slave_ofdata_to_platdata()
448 plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency", in spi_slave_ofdata_to_platdata()
462 value = dev_read_u32_default(dev, "spi-tx-bus-width", 1); in spi_slave_ofdata_to_platdata()
480 value = dev_read_u32_default(dev, "spi-rx-bus-width", 1); in spi_slave_ofdata_to_platdata()
H A Drk_spi.c213 dev_read_u32_default(bus, "spi-max-frequency", 50000000); in rockchip_spi_ofdata_to_platdata()
215 dev_read_u32_default(bus, "spi-deactivate-delay", 0); in rockchip_spi_ofdata_to_platdata()
217 dev_read_u32_default(bus, "spi-activate-delay", 0); in rockchip_spi_ofdata_to_platdata()
219 rsd_nsecs = dev_read_u32_default(bus, "rx-sample-delay-ns", 0); in rockchip_spi_ofdata_to_platdata()
/rk3399_rockchip-uboot/drivers/clk/
H A Dclk_fixed_rate.c32 to_clk_fixed_rate(dev)->fixed_rate = dev_read_u32_default(dev, in clk_fixed_rate_ofdata_to_platdata()
/rk3399_rockchip-uboot/drivers/sysreset/
H A Dsysreset-syscon-reboot.c41 magic = dev_read_u32_default(dev, command, BOOT_NORMAL); in syscon_reboot_request_by_mode()
/rk3399_rockchip-uboot/drivers/power/pmic/
H A Drk8xx.c673 phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA); in rk8xx_ofdata_to_platdata()
692 val = dev_read_u32_default(dev, "long-press-off-time-sec", 0); in rk8xx_ofdata_to_platdata()
702 val = dev_read_u32_default(dev, "long-press-restart", 0); in rk8xx_ofdata_to_platdata()
708 rk8xx->not_save_power_en = dev_read_u32_default(dev, "not-save-power-en", 0); in rk8xx_ofdata_to_platdata()
710 rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0); in rk8xx_ofdata_to_platdata()
714 rk8xx->pwr_ctr[0] = dev_read_u32_default(dev, "pwrctrl1_output", -1); in rk8xx_ofdata_to_platdata()
715 rk8xx->pwr_ctr[1] = dev_read_u32_default(dev, "pwrctrl2_output", -1); in rk8xx_ofdata_to_platdata()
716 rk8xx->pwr_ctr[2] = dev_read_u32_default(dev, "pwrctrl3_output", -1); in rk8xx_ofdata_to_platdata()
/rk3399_rockchip-uboot/drivers/mmc/
H A Drockchip_dw_mmc.c102 host->buswidth = dev_read_u32_default(dev, "bus-width", 4); in rockchip_dwmmc_ofdata_to_platdata()
112 priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); in rockchip_dwmmc_ofdata_to_platdata()
123 int val = dev_read_u32_default(dev, "max-frequency", -EINVAL); in rockchip_dwmmc_ofdata_to_platdata()
444 dev_read_u32_default(dev, "default-sample-phase", 0); in rockchip_dwmmc_probe()
/rk3399_rockchip-uboot/drivers/firmware/scmi/
H A Dsmccc_agent.c58 func_id = dev_read_u32_default(dev, "arm,smc-id", -ENODATA); in scmi_smccc_probe()

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